blob: 54cf72b3bf8a0346e94666d47ba7bac67840df6b [file] [log] [blame]
developer65907502025-01-23 16:55:05 +08001// SPDX-License-Identifier: GPL-2.0
2
3#include "mt7987a-u-boot.dtsi"
4#include "mt7987-netsys-u-boot.dtsi"
5
6/ {
7 model = "mt7987";
8 compatible = "mediatek,mt7987", "mediatek,mt7987-emmc-rfb";
9};
10
11&eth0 {
12 status = "okay";
13 pinctrl-names = "default";
14 pinctrl-0 = <&mdio0_pins>;
15 phy-mode = "2500base-x";
16 mediatek,switch = "auto";
17 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
18
19 fixed-link {
20 speed = <2500>;
21 full-duplex;
22 pause;
23 };
24};
25
26&mmc0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&mmc_pins_default>;
29 max-frequency = <48000000>;
30 bus-width = <8>;
31 cap-mmc-highspeed;
32 cap-mmc-hw-reset;
33 vmmc-supply = <&reg_3p3v>;
34 vqmmc-supply = <&reg_3p3v>;
35 non-removable;
36 status = "okay";
37};
38
39&spi2 {
40 pinctrl-names = "default";
41 pinctrl-0 = <&spi2_flash_pins>;
42 #address-cells = <1>;
43 #size-cells = <0>;
44 status = "okay";
45 must_tx;
46 enhance_timing;
47 dma_ext;
48 ipm_design;
49 support_quad;
50 tick_dly = <2>;
51 sample_sel = <0>;
52
53 /delete-node/ spi_nor@0;
54 spi_nor@0 {
55 compatible = "jedec,spi-nor";
56 reg = <0>;
57 spi-max-frequency = <52000000>;
58 spi-rx-bus-width = <4>;
59 spi-tx-bus-width = <4>;
60 };
61};