| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Ilya Yanok | d2452ea | 2011-11-28 06:37:35 +0000 | [diff] [blame] | 2 | /* |
| 3 | * |
| 4 | * DaVinci EMAC initialization. |
| 5 | * |
| 6 | * (C) Copyright 2011, Ilya Yanok, Emcraft Systems |
| Ilya Yanok | d2452ea | 2011-11-28 06:37:35 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 10 | #include <net.h> |
| Ilya Yanok | d2452ea | 2011-11-28 06:37:35 +0000 | [diff] [blame] | 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/am35x_def.h> |
| 13 | |
| 14 | /* |
| 15 | * Initializes on-chip ethernet controllers. |
| 16 | * to override, implement board_eth_init() |
| 17 | */ |
| Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 18 | int cpu_eth_init(struct bd_info *bis) |
| Ilya Yanok | d2452ea | 2011-11-28 06:37:35 +0000 | [diff] [blame] | 19 | { |
| 20 | u32 reset; |
| 21 | |
| 22 | /* ensure that the module is out of reset */ |
| 23 | reset = readl(&am35x_scm_general_regs->ip_sw_reset); |
| 24 | reset &= ~CPGMACSS_SW_RST; |
| 25 | writel(reset, &am35x_scm_general_regs->ip_sw_reset); |
| 26 | |
| Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 27 | return 0; |
| Ilya Yanok | d2452ea | 2011-11-28 06:37:35 +0000 | [diff] [blame] | 28 | } |