| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Nobuhiro Iwamatsu | 6d02035 | 2015-02-12 13:48:04 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
| 4 | * Copyright (c) 2014 Renesas Electronics Corporation |
| Nobuhiro Iwamatsu | 6d02035 | 2015-02-12 13:48:04 +0900 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __serial_sh_h |
| 8 | #define __serial_sh_h |
| 9 | |
| 10 | enum sh_clk_mode { |
| 11 | INT_CLK, |
| 12 | EXT_CLK, |
| 13 | }; |
| 14 | |
| 15 | enum sh_serial_type { |
| 16 | PORT_SCI, |
| 17 | PORT_SCIF, |
| 18 | PORT_SCIFA, |
| 19 | PORT_SCIFB, |
| Hai Pham | 19923d8 | 2023-02-28 22:29:19 +0100 | [diff] [blame] | 20 | PORT_HSCIF, |
| Nobuhiro Iwamatsu | 6d02035 | 2015-02-12 13:48:04 +0900 | [diff] [blame] | 21 | }; |
| 22 | |
| 23 | /* |
| 24 | * Information about SCIF port |
| 25 | * |
| 26 | * @base: Register base address |
| 27 | * @clk: Input clock rate, used for calculating the baud rate divisor |
| 28 | * @clk_mode: Clock mode, set internal (INT) or external (EXT) |
| 29 | * @type: Type of SCIF |
| 30 | */ |
| Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 31 | struct sh_serial_plat { |
| Nobuhiro Iwamatsu | 6d02035 | 2015-02-12 13:48:04 +0900 | [diff] [blame] | 32 | unsigned long base; |
| 33 | unsigned int clk; |
| 34 | enum sh_clk_mode clk_mode; |
| 35 | enum sh_serial_type type; |
| 36 | }; |
| 37 | #endif /* __serial_sh_h */ |