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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Michael Trimarchi241f7512008-11-28 13:20:46 +01002/*-
3 * Copyright (c) 2007-2008, Juniper Networks, Inc.
michael0a326102008-12-10 17:55:19 +01004 * Copyright (c) 2008, Excito Elektronik i Skåne AB
Remy Böhmer33e87482008-12-13 22:51:58 +01005 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
6 *
Michael Trimarchi241f7512008-11-28 13:20:46 +01007 * All rights reserved.
Michael Trimarchi241f7512008-11-28 13:20:46 +01008 */
Michael Trimarchi241f7512008-11-28 13:20:46 +01009#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -070010#include <cpu_func.h>
Simon Glassa194b252015-03-25 12:22:29 -060011#include <dm.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000012#include <errno.h>
michael0a326102008-12-10 17:55:19 +010013#include <asm/byteorder.h>
Simon Glass274e0b02020-05-10 11:39:56 -060014#include <asm/cache.h>
Lucas Stach835e11e2012-09-06 08:00:13 +020015#include <asm/unaligned.h>
Michael Trimarchi241f7512008-11-28 13:20:46 +010016#include <usb.h>
17#include <asm/io.h>
michael0a326102008-12-10 17:55:19 +010018#include <malloc.h>
Simon Glass2dd337a2015-09-02 17:24:58 -060019#include <memalign.h>
Stefan Roese86b34cf2010-11-26 15:43:28 +010020#include <watchdog.h>
Simon Glass9bc15642020-02-03 07:36:16 -070021#include <dm/device_compat.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000022#include <linux/compiler.h>
Jean-Christophe PLAGNIOL-VILLARD8f6bcf42009-04-03 12:46:58 +020023
24#include "ehci.h"
Michael Trimarchi241f7512008-11-28 13:20:46 +010025
Lucas Stach3494a4c2012-09-26 00:14:35 +020026#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
27#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
28#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +010029
Julius Werner5c1a1ad2013-09-24 10:53:07 -070030/*
31 * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
32 * Let's time out after 8 to have a little safety margin on top of that.
33 */
34#define HCHALT_TIMEOUT (8 * 1000)
35
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +010036#if !CONFIG_IS_ENABLED(DM_USB)
Marek Vasutfd349a12013-07-10 03:16:31 +020037static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
Simon Glassa194b252015-03-25 12:22:29 -060038#endif
Tom Rini2cabcf72012-07-15 22:14:24 +000039
40#define ALIGN_END_ADDR(type, ptr, size) \
Rob Herringf14d54b2015-03-17 15:46:37 -050041 ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
Michael Trimarchi241f7512008-11-28 13:20:46 +010042
michael0a326102008-12-10 17:55:19 +010043static struct descriptor {
44 struct usb_hub_descriptor hub;
45 struct usb_device_descriptor device;
46 struct usb_linux_config_descriptor config;
47 struct usb_linux_interface_descriptor interface;
48 struct usb_endpoint_descriptor endpoint;
49} __attribute__ ((packed)) descriptor = {
50 {
51 0x8, /* bDescLength */
52 0x29, /* bDescriptorType: hub descriptor */
53 2, /* bNrPorts -- runtime modified */
54 0, /* wHubCharacteristics */
Vincent Palatin8277b502011-12-05 14:52:22 -080055 10, /* bPwrOn2PwrGood */
michael0a326102008-12-10 17:55:19 +010056 0, /* bHubCntrCurrent */
Bin Meng0d66b3a2017-07-19 21:50:00 +080057 { /* Device removable */
58 } /* at most 7 ports! XXX */
michael0a326102008-12-10 17:55:19 +010059 },
60 {
61 0x12, /* bLength */
62 1, /* bDescriptorType: UDESC_DEVICE */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030063 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
michael0a326102008-12-10 17:55:19 +010064 9, /* bDeviceClass: UDCLASS_HUB */
65 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
66 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
67 64, /* bMaxPacketSize: 64 bytes */
68 0x0000, /* idVendor */
69 0x0000, /* idProduct */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030070 cpu_to_le16(0x0100), /* bcdDevice */
michael0a326102008-12-10 17:55:19 +010071 1, /* iManufacturer */
72 2, /* iProduct */
73 0, /* iSerialNumber */
74 1 /* bNumConfigurations: 1 */
75 },
76 {
77 0x9,
78 2, /* bDescriptorType: UDESC_CONFIG */
79 cpu_to_le16(0x19),
80 1, /* bNumInterface */
81 1, /* bConfigurationValue */
82 0, /* iConfiguration */
83 0x40, /* bmAttributes: UC_SELF_POWER */
84 0 /* bMaxPower */
85 },
86 {
87 0x9, /* bLength */
88 4, /* bDescriptorType: UDESC_INTERFACE */
89 0, /* bInterfaceNumber */
90 0, /* bAlternateSetting */
91 1, /* bNumEndpoints */
92 9, /* bInterfaceClass: UICLASS_HUB */
93 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
94 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
95 0 /* iInterface */
96 },
97 {
98 0x7, /* bLength */
99 5, /* bDescriptorType: UDESC_ENDPOINT */
100 0x81, /* bEndpointAddress:
101 * UE_DIR_IN | EHCI_INTR_ENDPT
102 */
103 3, /* bmAttributes: UE_INTERRUPT */
Tom Rix83b9e1d2009-10-31 12:37:38 -0500104 8, /* wMaxPacketSize */
michael0a326102008-12-10 17:55:19 +0100105 255 /* bInterval */
106 },
Michael Trimarchi241f7512008-11-28 13:20:46 +0100107};
108
Remy Böhmer33e87482008-12-13 22:51:58 +0100109#if defined(CONFIG_EHCI_IS_TDI)
110#define ehci_is_TDI() (1)
111#else
112#define ehci_is_TDI() (0)
113#endif
114
Simon Glasscb7cf602015-03-25 12:22:25 -0600115static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
116{
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +0100117#if CONFIG_IS_ENABLED(DM_USB)
Hans de Goede6be39d12015-05-05 11:54:33 +0200118 return dev_get_priv(usb_get_bus(udev->dev));
Simon Glassa194b252015-03-25 12:22:29 -0600119#else
Simon Glasscb7cf602015-03-25 12:22:25 -0600120 return udev->controller;
Simon Glassa194b252015-03-25 12:22:29 -0600121#endif
Simon Glasscb7cf602015-03-25 12:22:25 -0600122}
123
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600124static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000125{
126 return PORTSC_PSPD(reg);
127}
128
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600129static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000130{
131 uint32_t tmp;
132 uint32_t *reg_ptr;
133
Simon Glass2d387ab2015-03-25 12:22:23 -0600134 reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
Jim Lin54f3dfe2013-03-27 00:52:32 +0000135 tmp = ehci_readl(reg_ptr);
136 tmp |= USBMODE_CM_HC;
137#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
138 tmp |= USBMODE_BE;
Marek Vasutd9fa0482016-01-23 21:04:46 +0100139#else
140 tmp &= ~USBMODE_BE;
Jim Lin54f3dfe2013-03-27 00:52:32 +0000141#endif
142 ehci_writel(reg_ptr, tmp);
143}
144
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600145static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
Simon Glasscc0dc6b2015-03-25 12:22:21 -0600146 uint32_t *reg)
Marek Vasut09734772011-07-11 02:37:01 +0200147{
148 mdelay(50);
149}
150
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600151static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
Simon Glass0bec1282015-03-25 12:22:17 -0600152{
Bin Mengc6336ee2017-07-19 21:50:05 +0800153 int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
154
155 if (port < 0 || port >= max_ports) {
Simon Glass0bec1282015-03-25 12:22:17 -0600156 /* Printing the message would cause a scan failure! */
Bin Mengc6336ee2017-07-19 21:50:05 +0800157 debug("The request port(%u) exceeds maximum port number\n",
158 port);
Simon Glass0bec1282015-03-25 12:22:17 -0600159 return NULL;
160 }
161
Simon Glassdfbf1862015-03-25 12:22:24 -0600162 return (uint32_t *)&ctrl->hcor->or_portsc[port];
Simon Glass0bec1282015-03-25 12:22:17 -0600163}
164
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100165static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
michael0a326102008-12-10 17:55:19 +0100166{
michael0bf2a032008-12-11 13:43:55 +0100167 uint32_t result;
168 do {
169 result = ehci_readl(ptr);
Wolfgang Denkcdc5a7a2010-10-22 14:23:00 +0200170 udelay(5);
michael0bf2a032008-12-11 13:43:55 +0100171 if (result == ~(uint32_t)0)
172 return -1;
173 result &= mask;
174 if (result == done)
175 return 0;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100176 usec--;
177 } while (usec > 0);
michael0bf2a032008-12-11 13:43:55 +0100178 return -1;
179}
180
Simon Glass302696b2015-03-25 12:22:28 -0600181static int ehci_reset(struct ehci_ctrl *ctrl)
michael0bf2a032008-12-11 13:43:55 +0100182{
183 uint32_t cmd;
michael0bf2a032008-12-11 13:43:55 +0100184 int ret = 0;
185
Simon Glass302696b2015-03-25 12:22:28 -0600186 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Stefan Roese745af442010-11-26 15:44:00 +0100187 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
Simon Glass302696b2015-03-25 12:22:28 -0600188 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
189 ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200190 CMD_RESET, 0, 250 * 1000);
michael0bf2a032008-12-11 13:43:55 +0100191 if (ret < 0) {
192 printf("EHCI fail to reset\n");
193 goto out;
194 }
195
Jim Lin54f3dfe2013-03-27 00:52:32 +0000196 if (ehci_is_TDI())
Simon Glass302696b2015-03-25 12:22:28 -0600197 ctrl->ops.set_usb_mode(ctrl);
Simon Glass5978cdb2012-02-27 10:52:47 +0000198
199#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
Simon Glass302696b2015-03-25 12:22:28 -0600200 cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200201 cmd &= ~TXFIFO_THRESH_MASK;
Simon Glass5978cdb2012-02-27 10:52:47 +0000202 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
Simon Glass302696b2015-03-25 12:22:28 -0600203 ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
Simon Glass5978cdb2012-02-27 10:52:47 +0000204#endif
michael0bf2a032008-12-11 13:43:55 +0100205out:
206 return ret;
michael0a326102008-12-10 17:55:19 +0100207}
Michael Trimarchi241f7512008-11-28 13:20:46 +0100208
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700209static int ehci_shutdown(struct ehci_ctrl *ctrl)
210{
211 int i, ret = 0;
212 uint32_t cmd, reg;
Bin Mengc6336ee2017-07-19 21:50:05 +0800213 int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700214
215 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Peng Fanba397ba2016-06-15 13:15:46 +0800216 /* If not run, directly return */
217 if (!(cmd & CMD_RUN))
218 return 0;
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700219 cmd &= ~(CMD_PSE | CMD_ASE);
220 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
221 ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
222 100 * 1000);
223
224 if (!ret) {
Bin Mengc6336ee2017-07-19 21:50:05 +0800225 for (i = 0; i < max_ports; i++) {
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700226 reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
227 reg |= EHCI_PS_SUSP;
228 ehci_writel(&ctrl->hcor->or_portsc[i], reg);
229 }
230
231 cmd &= ~CMD_RUN;
232 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
233 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
234 HCHALT_TIMEOUT);
235 }
236
237 if (ret)
238 puts("EHCI failed to shut down host controller.\n");
239
240 return ret;
241}
242
Michael Trimarchi241f7512008-11-28 13:20:46 +0100243static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
244{
Marek Vasutff24dc32012-04-09 04:07:46 +0200245 uint32_t delta, next;
Marek Vasutcadf42c2016-02-26 19:23:27 +0100246 unsigned long addr = (unsigned long)buf;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100247 int idx;
248
Ilya Yanokfb113712012-07-15 04:43:49 +0000249 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
Marek Vasutff24dc32012-04-09 04:07:46 +0200250 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
251
Ilya Yanokfb113712012-07-15 04:43:49 +0000252 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
253
Michael Trimarchi241f7512008-11-28 13:20:46 +0100254 idx = 0;
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200255 while (idx < QT_BUFFER_CNT) {
Marek Vasutdf0b6242016-01-23 21:04:46 +0100256 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
Wolfgang Denkebb829f2010-10-19 16:13:15 +0200257 td->qt_buffer_hi[idx] = 0;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200258 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100259 delta = next - addr;
260 if (delta >= sz)
261 break;
262 sz -= delta;
263 addr = next;
264 idx++;
265 }
266
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200267 if (idx == QT_BUFFER_CNT) {
Rob Herringf14d54b2015-03-17 15:46:37 -0500268 printf("out of buffer pointers (%zu bytes left)\n", sz);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100269 return -1;
270 }
271
272 return 0;
273}
274
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000275static inline u8 ehci_encode_speed(enum usb_device_speed speed)
276{
277 #define QH_HIGH_SPEED 2
278 #define QH_FULL_SPEED 0
279 #define QH_LOW_SPEED 1
280 if (speed == USB_SPEED_HIGH)
281 return QH_HIGH_SPEED;
282 if (speed == USB_SPEED_LOW)
283 return QH_LOW_SPEED;
284 return QH_FULL_SPEED;
285}
286
Simon Glassa194b252015-03-25 12:22:29 -0600287static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
Hans de Goededa166772014-09-20 16:51:22 +0200288 struct QH *qh)
289{
Stefan Brünsa0105682015-12-22 01:21:03 +0100290 uint8_t portnr = 0;
291 uint8_t hubaddr = 0;
Hans de Goededa166772014-09-20 16:51:22 +0200292
Simon Glassa194b252015-03-25 12:22:29 -0600293 if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
Hans de Goededa166772014-09-20 16:51:22 +0200294 return;
295
Stefan Brünsa0105682015-12-22 01:21:03 +0100296 usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
Hans de Goededa166772014-09-20 16:51:22 +0200297
Stefan Brünsa0105682015-12-22 01:21:03 +0100298 qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
299 QH_ENDPT2_HUBADDR(hubaddr));
Hans de Goededa166772014-09-20 16:51:22 +0200300}
301
Marek Vasut118a9032020-04-06 14:29:44 +0200302static int ehci_enable_async(struct ehci_ctrl *ctrl)
303{
304 u32 cmd;
305 int ret;
306
307 /* Enable async. schedule. */
308 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
309 if (cmd & CMD_ASE)
310 return 0;
311
312 cmd |= CMD_ASE;
313 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
314
315 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
316 100 * 1000);
317 if (ret < 0)
318 printf("EHCI fail timeout STS_ASS set\n");
319
320 return ret;
321}
322
323static int ehci_disable_async(struct ehci_ctrl *ctrl)
324{
325 u32 cmd;
326 int ret;
327
328 if (ctrl->async_locked)
329 return 0;
330
331 /* Disable async schedule. */
332 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
333 if (!(cmd & CMD_ASE))
334 return 0;
335
336 cmd &= ~CMD_ASE;
337 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
338
339 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
340 100 * 1000);
341 if (ret < 0)
342 printf("EHCI fail timeout STS_ASS reset\n");
343
344 return ret;
345}
346
Michael Trimarchi241f7512008-11-28 13:20:46 +0100347static int
348ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
349 int length, struct devrequest *req)
350{
Tom Rini2cabcf72012-07-15 22:14:24 +0000351 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200352 struct qTD *qtd;
353 int qtd_count = 0;
Marek Vasut4f668312012-04-08 23:32:05 +0200354 int qtd_counter = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100355 volatile struct qTD *vtd;
356 unsigned long ts;
357 uint32_t *tdp;
Marek Vasut569c2a52019-10-06 16:13:38 +0200358 uint32_t endpt, maxpacket, token, usbsts, qhtoken;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100359 uint32_t c, toggle;
Simon Glassfd7f5132011-02-07 14:42:16 -0800360 int timeout;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100361 int ret = 0;
Simon Glasscb7cf602015-03-25 12:22:25 -0600362 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100363
michael0a326102008-12-10 17:55:19 +0100364 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
Michael Trimarchi241f7512008-11-28 13:20:46 +0100365 buffer, length, req);
366 if (req != NULL)
michael0a326102008-12-10 17:55:19 +0100367 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100368 req->request, req->request,
369 req->requesttype, req->requesttype,
370 le16_to_cpu(req->value), le16_to_cpu(req->value),
michael0a326102008-12-10 17:55:19 +0100371 le16_to_cpu(req->index));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100372
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200373#define PKT_ALIGN 512
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200374 /*
375 * The USB transfer is split into qTD transfers. Eeach qTD transfer is
376 * described by a transfer descriptor (the qTD). The qTDs form a linked
377 * list with a queue head (QH).
378 *
379 * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
380 * have its beginning in a qTD transfer and its end in the following
381 * one, so the qTD transfer lengths have to be chosen accordingly.
382 *
383 * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
384 * single pages. The first data buffer can start at any offset within a
385 * page (not considering the cache-line alignment issues), while the
386 * following buffers must be page-aligned. There is no alignment
387 * constraint on the size of a qTD transfer.
388 */
389 if (req != NULL)
390 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
391 qtd_count += 1 + 1;
392 if (length > 0 || req == NULL) {
393 /*
394 * Determine the qTD transfer size that will be used for the
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200395 * data payload (not considering the first qTD transfer, which
396 * may be longer or shorter, and the final one, which may be
397 * shorter).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200398 *
399 * In order to keep each packet within a qTD transfer, the qTD
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200400 * transfer size is aligned to PKT_ALIGN, which is a multiple of
401 * wMaxPacketSize (except in some cases for interrupt transfers,
402 * see comment in submit_int_msg()).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200403 *
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200404 * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200405 * QT_BUFFER_CNT full pages will be used.
406 */
407 int xfr_sz = QT_BUFFER_CNT;
408 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200409 * However, if the input buffer is not aligned to PKT_ALIGN, the
410 * qTD transfer size will be one page shorter, and the first qTD
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200411 * data buffer of each transfer will be page-unaligned.
412 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500413 if ((unsigned long)buffer & (PKT_ALIGN - 1))
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200414 xfr_sz--;
415 /* Convert the qTD transfer size to bytes. */
416 xfr_sz *= EHCI_PAGE_SIZE;
417 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200418 * Approximate by excess the number of qTDs that will be
419 * required for the data payload. The exact formula is way more
420 * complicated and saves at most 2 qTDs, i.e. a total of 128
421 * bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200422 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200423 qtd_count += 2 + length / xfr_sz;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200424 }
425/*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200426 * Threshold value based on the worst-case total size of the allocated qTDs for
427 * a mass-storage transfer of 65535 blocks of 512 bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200428 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200429#if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200430#warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
431#endif
432 qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
433 if (qtd == NULL) {
434 printf("unable to allocate TDs\n");
435 return -1;
436 }
437
Tom Rini2cabcf72012-07-15 22:14:24 +0000438 memset(qh, 0, sizeof(struct QH));
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200439 memset(qtd, 0, qtd_count * sizeof(*qtd));
Marek Vasut4f668312012-04-08 23:32:05 +0200440
Marek Vasutff24dc32012-04-09 04:07:46 +0200441 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
442
Marek Vasut285c8b32012-04-09 04:13:00 +0200443 /*
444 * Setup QH (3.6 in ehci-r10.pdf)
445 *
446 * qh_link ................. 03-00 H
447 * qh_endpt1 ............... 07-04 H
448 * qh_endpt2 ............... 0B-08 H
449 * - qh_curtd
450 * qh_overlay.qt_next ...... 13-10 H
451 * - qh_overlay.qt_altnext
452 */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100453 qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000454 c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200455 maxpacket = usb_maxpacket(dev, pipe);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200456 endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200457 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200458 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200459 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
460 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
Chris Packham434f0582018-10-04 20:03:53 +1300461
462 /* Force FS for fsl HS quirk */
463 if (!ctrl->has_fsl_erratum_a005275)
464 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
465 else
466 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
467
Tom Rini2cabcf72012-07-15 22:14:24 +0000468 qh->qh_endpt1 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200469 endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
Tom Rini2cabcf72012-07-15 22:14:24 +0000470 qh->qh_endpt2 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200471 ehci_update_endpt2_dev_n_port(dev, qh);
Tom Rini2cabcf72012-07-15 22:14:24 +0000472 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
Stephen Warren1907e5a2014-02-07 09:53:50 -0700473 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100474
Tom Rini2cabcf72012-07-15 22:14:24 +0000475 tdp = &qh->qh_overlay.qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100476 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200477 /*
478 * Setup request qTD (3.5 in ehci-r10.pdf)
479 *
480 * qt_next ................ 03-00 H
481 * qt_altnext ............. 07-04 H
482 * qt_token ............... 0B-08 H
483 *
484 * [ buffer, buffer_hi ] loaded with "req".
485 */
Marek Vasut4f668312012-04-08 23:32:05 +0200486 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
487 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200488 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
489 QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
490 QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
491 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200492 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200493 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
494 printf("unable to construct SETUP TD\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100495 goto fail;
496 }
Marek Vasut285c8b32012-04-09 04:13:00 +0200497 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100498 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Marek Vasut4f668312012-04-08 23:32:05 +0200499 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100500 toggle = 1;
501 }
502
503 if (length > 0 || req == NULL) {
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200504 uint8_t *buf_ptr = buffer;
505 int left_length = length;
506
507 do {
508 /*
509 * Determine the size of this qTD transfer. By default,
510 * QT_BUFFER_CNT full pages can be used.
511 */
512 int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
513 /*
514 * However, if the input buffer is not page-aligned, the
515 * portion of the first page before the buffer start
516 * offset within that page is unusable.
517 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500518 xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200519 /*
520 * In order to keep each packet within a qTD transfer,
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200521 * align the qTD transfer size to PKT_ALIGN.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200522 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200523 xfr_bytes &= ~(PKT_ALIGN - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200524 /*
525 * This transfer may be shorter than the available qTD
526 * transfer size that has just been computed.
527 */
528 xfr_bytes = min(xfr_bytes, left_length);
529
530 /*
531 * Setup request qTD (3.5 in ehci-r10.pdf)
532 *
533 * qt_next ................ 03-00 H
534 * qt_altnext ............. 07-04 H
535 * qt_token ............... 0B-08 H
536 *
537 * [ buffer, buffer_hi ] loaded with "buffer".
538 */
539 qtd[qtd_counter].qt_next =
540 cpu_to_hc32(QT_NEXT_TERMINATE);
541 qtd[qtd_counter].qt_altnext =
542 cpu_to_hc32(QT_NEXT_TERMINATE);
543 token = QT_TOKEN_DT(toggle) |
544 QT_TOKEN_TOTALBYTES(xfr_bytes) |
545 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
546 QT_TOKEN_CERR(3) |
547 QT_TOKEN_PID(usb_pipein(pipe) ?
548 QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
549 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
550 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
551 if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
552 xfr_bytes)) {
553 printf("unable to construct DATA TD\n");
554 goto fail;
555 }
556 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100557 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200558 tdp = &qtd[qtd_counter++].qt_next;
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200559 /*
560 * Data toggle has to be adjusted since the qTD transfer
561 * size is not always an even multiple of
562 * wMaxPacketSize.
563 */
564 if ((xfr_bytes / maxpacket) & 1)
565 toggle ^= 1;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200566 buf_ptr += xfr_bytes;
567 left_length -= xfr_bytes;
568 } while (left_length > 0);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100569 }
570
571 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200572 /*
573 * Setup request qTD (3.5 in ehci-r10.pdf)
574 *
575 * qt_next ................ 03-00 H
576 * qt_altnext ............. 07-04 H
577 * qt_token ............... 0B-08 H
578 */
Marek Vasut4f668312012-04-08 23:32:05 +0200579 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
580 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200581 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200582 QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
583 QT_TOKEN_PID(usb_pipein(pipe) ?
584 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
585 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200586 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Marek Vasut285c8b32012-04-09 04:13:00 +0200587 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100588 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Marek Vasut4f668312012-04-08 23:32:05 +0200589 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100590 }
591
Marek Vasutdf0b6242016-01-23 21:04:46 +0100592 ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100593
Stefan Roese25983c12009-01-21 17:12:19 +0100594 /* Flush dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500595 flush_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200596 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500597 flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
598 flush_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200599 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Stefan Roese25983c12009-01-21 17:12:19 +0100600
Lucas Stach3494a4c2012-09-26 00:14:35 +0200601 usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
602 ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100603
Marek Vasut118a9032020-04-06 14:29:44 +0200604 ret = ehci_enable_async(ctrl);
605 if (ret)
606 goto fail;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100607
608 /* Wait for TDs to be processed. */
609 ts = get_timer(0);
Marek Vasut4f668312012-04-08 23:32:05 +0200610 vtd = &qtd[qtd_counter - 1];
Simon Glassfd7f5132011-02-07 14:42:16 -0800611 timeout = USB_TIMEOUT_MS(pipe);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100612 do {
Stefan Roese25983c12009-01-21 17:12:19 +0100613 /* Invalidate dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500614 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200615 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500616 invalidate_dcache_range((unsigned long)qh,
Tom Rini2cabcf72012-07-15 22:14:24 +0000617 ALIGN_END_ADDR(struct QH, qh, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500618 invalidate_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200619 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Marek Vasutff24dc32012-04-09 04:07:46 +0200620
michael0a326102008-12-10 17:55:19 +0100621 token = hc32_to_cpu(vtd->qt_token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200622 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100623 break;
Stefan Roese86b34cf2010-11-26 15:43:28 +0100624 WATCHDOG_RESET();
Simon Glassfd7f5132011-02-07 14:42:16 -0800625 } while (get_timer(ts) < timeout);
Marek Vasut569c2a52019-10-06 16:13:38 +0200626 qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
627
628 ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
629 flush_dcache_range((unsigned long)&ctrl->qh_list,
630 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Simon Glassfd7f5132011-02-07 14:42:16 -0800631
Ilya Yanokfb113712012-07-15 04:43:49 +0000632 /*
633 * Invalidate the memory area occupied by buffer
634 * Don't try to fix the buffer alignment, if it isn't properly
635 * aligned it's upper layer's fault so let invalidate_dcache_range()
636 * vow about it. But we have to fix the length as it's actual
637 * transfer length and can be unaligned. This is potentially
638 * dangerous operation, it's responsibility of the calling
639 * code to make sure enough space is reserved.
640 */
Dirk Behme78c73562017-11-17 15:28:36 +0100641 if (buffer != NULL && length > 0)
642 invalidate_dcache_range((unsigned long)buffer,
643 ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
Marek Vasutff24dc32012-04-09 04:07:46 +0200644
Simon Glassfd7f5132011-02-07 14:42:16 -0800645 /* Check that the TD processing happened */
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200646 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
Simon Glassfd7f5132011-02-07 14:42:16 -0800647 printf("EHCI timed out on TD - token=%#x\n", token);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100648
Marek Vasut118a9032020-04-06 14:29:44 +0200649 ret = ehci_disable_async(ctrl);
650 if (ret)
651 goto fail;
652
Marek Vasut569c2a52019-10-06 16:13:38 +0200653 if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
654 debug("TOKEN=%#x\n", qhtoken);
655 switch (QT_TOKEN_GET_STATUS(qhtoken) &
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200656 ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100657 case 0:
Marek Vasut569c2a52019-10-06 16:13:38 +0200658 toggle = QT_TOKEN_GET_DT(qhtoken);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100659 usb_settoggle(dev, usb_pipeendpoint(pipe),
660 usb_pipeout(pipe), toggle);
661 dev->status = 0;
662 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200663 case QT_TOKEN_STATUS_HALTED:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100664 dev->status = USB_ST_STALLED;
665 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200666 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
667 case QT_TOKEN_STATUS_DATBUFERR:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100668 dev->status = USB_ST_BUF_ERR;
669 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200670 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
671 case QT_TOKEN_STATUS_BABBLEDET:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100672 dev->status = USB_ST_BABBLE_DET;
673 break;
674 default:
675 dev->status = USB_ST_CRC_ERR;
Marek Vasut569c2a52019-10-06 16:13:38 +0200676 if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
Anatolij Gustschine1e09312010-11-02 11:47:29 +0100677 dev->status |= USB_ST_STALLED;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100678 break;
679 }
Marek Vasut569c2a52019-10-06 16:13:38 +0200680 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100681 } else {
682 dev->act_len = 0;
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800683#ifndef CONFIG_USB_EHCI_FARADAY
michael0a326102008-12-10 17:55:19 +0100684 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
Lucas Stach3494a4c2012-09-26 00:14:35 +0200685 dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
686 ehci_readl(&ctrl->hcor->or_portsc[0]),
687 ehci_readl(&ctrl->hcor->or_portsc[1]));
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800688#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +0100689 }
690
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200691 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100692 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
693
694fail:
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200695 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100696 return -1;
697}
698
Simon Glasscb7cf602015-03-25 12:22:25 -0600699static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
700 void *buffer, int length, struct devrequest *req)
Michael Trimarchi241f7512008-11-28 13:20:46 +0100701{
702 uint8_t tmpbuf[4];
703 u16 typeReq;
michael0a326102008-12-10 17:55:19 +0100704 void *srcptr = NULL;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100705 int len, srclen;
706 uint32_t reg;
Remy Böhmer33e87482008-12-13 22:51:58 +0100707 uint32_t *status_reg;
Julius Wernerd4046702013-02-28 18:08:40 +0000708 int port = le16_to_cpu(req->index) & 0xff;
Simon Glasscb7cf602015-03-25 12:22:25 -0600709 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100710
711 srclen = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100712
michael0a326102008-12-10 17:55:19 +0100713 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100714 req->request, req->request,
715 req->requesttype, req->requesttype,
716 le16_to_cpu(req->value), le16_to_cpu(req->index));
717
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530718 typeReq = req->request | req->requesttype << 8;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100719
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530720 switch (typeReq) {
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800721 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
722 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
723 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600724 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
Kuo-Jung Su6a656df2013-05-15 15:29:21 +0800725 if (!status_reg)
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800726 return -1;
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800727 break;
728 default:
729 status_reg = NULL;
730 break;
731 }
732
733 switch (typeReq) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100734 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
735 switch (le16_to_cpu(req->value) >> 8) {
736 case USB_DT_DEVICE:
michael0a326102008-12-10 17:55:19 +0100737 debug("USB_DT_DEVICE request\n");
738 srcptr = &descriptor.device;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200739 srclen = descriptor.device.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100740 break;
741 case USB_DT_CONFIG:
michael0a326102008-12-10 17:55:19 +0100742 debug("USB_DT_CONFIG config\n");
743 srcptr = &descriptor.config;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200744 srclen = descriptor.config.bLength +
745 descriptor.interface.bLength +
746 descriptor.endpoint.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100747 break;
748 case USB_DT_STRING:
michael0a326102008-12-10 17:55:19 +0100749 debug("USB_DT_STRING config\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100750 switch (le16_to_cpu(req->value) & 0xff) {
751 case 0: /* Language */
752 srcptr = "\4\3\1\0";
753 srclen = 4;
754 break;
755 case 1: /* Vendor */
756 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
757 srclen = 14;
758 break;
759 case 2: /* Product */
760 srcptr = "\52\3E\0H\0C\0I\0 "
761 "\0H\0o\0s\0t\0 "
762 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
763 srclen = 42;
764 break;
765 default:
michael0a326102008-12-10 17:55:19 +0100766 debug("unknown value DT_STRING %x\n",
767 le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100768 goto unknown;
769 }
770 break;
771 default:
michael0a326102008-12-10 17:55:19 +0100772 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100773 goto unknown;
774 }
775 break;
776 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
777 switch (le16_to_cpu(req->value) >> 8) {
778 case USB_DT_HUB:
michael0a326102008-12-10 17:55:19 +0100779 debug("USB_DT_HUB config\n");
780 srcptr = &descriptor.hub;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200781 srclen = descriptor.hub.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100782 break;
783 default:
michael0a326102008-12-10 17:55:19 +0100784 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100785 goto unknown;
786 }
787 break;
788 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
michael0a326102008-12-10 17:55:19 +0100789 debug("USB_REQ_SET_ADDRESS\n");
Lucas Stach3494a4c2012-09-26 00:14:35 +0200790 ctrl->rootdev = le16_to_cpu(req->value);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100791 break;
792 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
michael0a326102008-12-10 17:55:19 +0100793 debug("USB_REQ_SET_CONFIGURATION\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100794 /* Nothing to do */
795 break;
796 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
797 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
798 tmpbuf[1] = 0;
799 srcptr = tmpbuf;
800 srclen = 2;
801 break;
michael0a326102008-12-10 17:55:19 +0100802 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
Michael Trimarchi241f7512008-11-28 13:20:46 +0100803 memset(tmpbuf, 0, 4);
Remy Böhmer33e87482008-12-13 22:51:58 +0100804 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100805 if (reg & EHCI_PS_CS)
806 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
807 if (reg & EHCI_PS_PE)
808 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
809 if (reg & EHCI_PS_SUSP)
810 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
811 if (reg & EHCI_PS_OCA)
812 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300813 if (reg & EHCI_PS_PR)
814 tmpbuf[0] |= USB_PORT_STAT_RESET;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100815 if (reg & EHCI_PS_PP)
816 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
Stefan Roese497f1842009-01-21 17:12:01 +0100817
818 if (ehci_is_TDI()) {
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600819 switch (ctrl->ops.get_port_speed(ctrl, reg)) {
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200820 case PORTSC_PSPD_FS:
Stefan Roese497f1842009-01-21 17:12:01 +0100821 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200822 case PORTSC_PSPD_LS:
Stefan Roese497f1842009-01-21 17:12:01 +0100823 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
824 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200825 case PORTSC_PSPD_HS:
Stefan Roese497f1842009-01-21 17:12:01 +0100826 default:
827 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
828 break;
829 }
830 } else {
831 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
832 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100833
834 if (reg & EHCI_PS_CSC)
835 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
836 if (reg & EHCI_PS_PEC)
837 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
838 if (reg & EHCI_PS_OCC)
839 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
Julius Wernerd4046702013-02-28 18:08:40 +0000840 if (ctrl->portreset & (1 << port))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100841 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
Remy Böhmer33e87482008-12-13 22:51:58 +0100842
Michael Trimarchi241f7512008-11-28 13:20:46 +0100843 srcptr = tmpbuf;
844 srclen = 4;
845 break;
michael0a326102008-12-10 17:55:19 +0100846 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100847 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100848 reg &= ~EHCI_PS_CLEAR;
849 switch (le16_to_cpu(req->value)) {
michael0bf2a032008-12-11 13:43:55 +0100850 case USB_PORT_FEAT_ENABLE:
851 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100852 ehci_writel(status_reg, reg);
michael0bf2a032008-12-11 13:43:55 +0100853 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100854 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200855 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
Remy Böhmer33e87482008-12-13 22:51:58 +0100856 reg |= EHCI_PS_PP;
857 ehci_writel(status_reg, reg);
858 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100859 break;
860 case USB_PORT_FEAT_RESET:
Remy Böhmer33e87482008-12-13 22:51:58 +0100861 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
862 !ehci_is_TDI() &&
863 EHCI_PS_IS_LOWSPEED(reg)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100864 /* Low speed device, give up ownership. */
Remy Böhmer33e87482008-12-13 22:51:58 +0100865 debug("port %d low speed --> companion\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000866 port - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100867 reg |= EHCI_PS_PO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100868 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200869 return -ENXIO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100870 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300871 int ret;
872
Chris Packham434f0582018-10-04 20:03:53 +1300873 /* Disable chirp for HS erratum */
874 if (ctrl->has_fsl_erratum_a005275)
875 reg |= PORTSC_FSL_PFSC;
876
Remy Böhmer33e87482008-12-13 22:51:58 +0100877 reg |= EHCI_PS_PR;
878 reg &= ~EHCI_PS_PE;
879 ehci_writel(status_reg, reg);
880 /*
881 * caller must wait, then call GetPortStatus
882 * usb 2.0 specification say 50 ms resets on
883 * root
884 */
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600885 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
Marek Vasut09734772011-07-11 02:37:01 +0200886
Chris Zhangfddf6d62010-01-06 13:34:04 -0800887 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300888 /*
889 * A host controller must terminate the reset
890 * and stabilize the state of the port within
891 * 2 milliseconds
892 */
893 ret = handshake(status_reg, EHCI_PS_PR, 0,
894 2 * 1000);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200895 if (!ret) {
896 reg = ehci_readl(status_reg);
897 if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
898 == EHCI_PS_CS && !ehci_is_TDI()) {
899 debug("port %d full speed --> companion\n", port - 1);
900 reg &= ~EHCI_PS_CLEAR;
901 reg |= EHCI_PS_PO;
902 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200903 return -ENXIO;
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200904 } else {
905 ctrl->portreset |= 1 << port;
906 }
907 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300908 printf("port(%d) reset error\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000909 port - 1);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200910 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100911 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100912 break;
Julius Wernerd4046702013-02-28 18:08:40 +0000913 case USB_PORT_FEAT_TEST:
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700914 ehci_shutdown(ctrl);
Julius Wernerd4046702013-02-28 18:08:40 +0000915 reg &= ~(0xf << 16);
916 reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
917 ehci_writel(status_reg, reg);
918 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100919 default:
michael0a326102008-12-10 17:55:19 +0100920 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100921 goto unknown;
922 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100923 /* unblock posted writes */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200924 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100925 break;
michael0a326102008-12-10 17:55:19 +0100926 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100927 reg = ehci_readl(status_reg);
Simon Glass0554ba52013-05-10 19:49:00 -0700928 reg &= ~EHCI_PS_CLEAR;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100929 switch (le16_to_cpu(req->value)) {
930 case USB_PORT_FEAT_ENABLE:
931 reg &= ~EHCI_PS_PE;
932 break;
Remy Böhmer33e87482008-12-13 22:51:58 +0100933 case USB_PORT_FEAT_C_ENABLE:
Simon Glass0554ba52013-05-10 19:49:00 -0700934 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100935 break;
936 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200937 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
Simon Glass0554ba52013-05-10 19:49:00 -0700938 reg &= ~EHCI_PS_PP;
939 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100940 case USB_PORT_FEAT_C_CONNECTION:
Simon Glass0554ba52013-05-10 19:49:00 -0700941 reg |= EHCI_PS_CSC;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100942 break;
michael0bf2a032008-12-11 13:43:55 +0100943 case USB_PORT_FEAT_OVER_CURRENT:
Simon Glass0554ba52013-05-10 19:49:00 -0700944 reg |= EHCI_PS_OCC;
michael0bf2a032008-12-11 13:43:55 +0100945 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100946 case USB_PORT_FEAT_C_RESET:
Julius Wernerd4046702013-02-28 18:08:40 +0000947 ctrl->portreset &= ~(1 << port);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100948 break;
949 default:
michael0a326102008-12-10 17:55:19 +0100950 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100951 goto unknown;
952 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100953 ehci_writel(status_reg, reg);
954 /* unblock posted write */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200955 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100956 break;
957 default:
michael0a326102008-12-10 17:55:19 +0100958 debug("Unknown request\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100959 goto unknown;
960 }
961
Mike Frysinger60ce19a2012-03-05 13:47:00 +0000962 mdelay(1);
Masahiro Yamadadb204642014-11-07 03:03:31 +0900963 len = min3(srclen, (int)le16_to_cpu(req->length), length);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100964 if (srcptr != NULL && len > 0)
965 memcpy(buffer, srcptr, len);
michael0a326102008-12-10 17:55:19 +0100966 else
967 debug("Len is 0\n");
968
Michael Trimarchi241f7512008-11-28 13:20:46 +0100969 dev->act_len = len;
970 dev->status = 0;
971 return 0;
972
973unknown:
michael0a326102008-12-10 17:55:19 +0100974 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100975 req->requesttype, req->request, le16_to_cpu(req->value),
976 le16_to_cpu(req->index), le16_to_cpu(req->length));
977
978 dev->act_len = 0;
979 dev->status = USB_ST_STALLED;
980 return -1;
981}
982
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900983static const struct ehci_ops default_ehci_ops = {
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600984 .set_usb_mode = ehci_set_usbmode,
985 .get_port_speed = ehci_get_port_speed,
986 .powerup_fixup = ehci_powerup_fixup,
987 .get_portsc_register = ehci_get_portsc_register,
988};
989
990static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
Simon Glass0851caa2015-03-25 12:22:19 -0600991{
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600992 if (!ops) {
993 ctrl->ops = default_ehci_ops;
994 } else {
995 ctrl->ops = *ops;
996 if (!ctrl->ops.set_usb_mode)
997 ctrl->ops.set_usb_mode = ehci_set_usbmode;
998 if (!ctrl->ops.get_port_speed)
999 ctrl->ops.get_port_speed = ehci_get_port_speed;
1000 if (!ctrl->ops.powerup_fixup)
1001 ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1002 if (!ctrl->ops.get_portsc_register)
1003 ctrl->ops.get_portsc_register =
1004 ehci_get_portsc_register;
1005 }
Simon Glass0851caa2015-03-25 12:22:19 -06001006}
1007
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001008#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001009void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1010{
1011 struct ehci_ctrl *ctrl = &ehcic[index];
1012
1013 ctrl->priv = priv;
1014 ehci_setup_ops(ctrl, ops);
1015}
1016
Simon Glass0851caa2015-03-25 12:22:19 -06001017void *ehci_get_controller_priv(int index)
1018{
1019 return ehcic[index].priv;
1020}
Simon Glassa194b252015-03-25 12:22:29 -06001021#endif
Simon Glass0851caa2015-03-25 12:22:19 -06001022
Simon Glassccc40fd2015-03-25 12:22:26 -06001023static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001024{
Lucas Stach3494a4c2012-09-26 00:14:35 +02001025 struct QH *qh_list;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001026 struct QH *periodic;
Simon Glassccc40fd2015-03-25 12:22:26 -06001027 uint32_t reg;
1028 uint32_t cmd;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001029 int i;
michael0bf2a032008-12-11 13:43:55 +01001030
Vincent Palatin0d6f77c2012-12-12 17:55:22 -08001031 /* Set the high address word (aka segment) for 64-bit controller */
Simon Glassccc40fd2015-03-25 12:22:26 -06001032 if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1033 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
Stefan Roese2e98fc72009-01-21 17:12:10 +01001034
Simon Glassccc40fd2015-03-25 12:22:26 -06001035 qh_list = &ctrl->qh_list;
Lucas Stach3494a4c2012-09-26 00:14:35 +02001036
Michael Trimarchi241f7512008-11-28 13:20:46 +01001037 /* Set head of reclaim list */
Tom Rini2cabcf72012-07-15 22:14:24 +00001038 memset(qh_list, 0, sizeof(*qh_list));
Marek Vasutdf0b6242016-01-23 21:04:46 +01001039 qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001040 qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1041 QH_ENDPT1_EPS(USB_SPEED_HIGH));
Tom Rini2cabcf72012-07-15 22:14:24 +00001042 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1043 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001044 qh_list->qh_overlay.qt_token =
1045 cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
Michael Trimarchi241f7512008-11-28 13:20:46 +01001046
Rob Herringf14d54b2015-03-17 15:46:37 -05001047 flush_dcache_range((unsigned long)qh_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001048 ALIGN_END_ADDR(struct QH, qh_list, 1));
1049
Patrick Georgie55fdac2013-03-06 14:08:31 +00001050 /* Set async. queue head pointer. */
Marek Vasutdf0b6242016-01-23 21:04:46 +01001051 ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001052
1053 /*
1054 * Set up periodic list
1055 * Step 1: Parent QH for all periodic transfers.
1056 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001057 ctrl->periodic_schedules = 0;
1058 periodic = &ctrl->periodic_queue;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001059 memset(periodic, 0, sizeof(*periodic));
1060 periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1061 periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1062 periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1063
Rob Herringf14d54b2015-03-17 15:46:37 -05001064 flush_dcache_range((unsigned long)periodic,
Stephen Warren36dad662013-05-24 15:03:17 -06001065 ALIGN_END_ADDR(struct QH, periodic, 1));
1066
Patrick Georgie55fdac2013-03-06 14:08:31 +00001067 /*
1068 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1069 * In particular, device specifications on polling frequency
1070 * are disregarded. Keyboards seem to send NAK/NYet reliably
1071 * when polled with an empty buffer.
1072 *
1073 * Split Transactions will be spread across microframes using
1074 * S-mask and C-mask.
1075 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001076 if (ctrl->periodic_list == NULL)
1077 ctrl->periodic_list = memalign(4096, 1024 * 4);
Nikita Kiryanov2f13e442013-07-29 13:27:40 +03001078
Simon Glassccc40fd2015-03-25 12:22:26 -06001079 if (!ctrl->periodic_list)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001080 return -ENOMEM;
1081 for (i = 0; i < 1024; i++) {
Simon Glassccc40fd2015-03-25 12:22:26 -06001082 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
Adrian Cox29d05872014-04-10 13:29:45 +01001083 | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001084 }
1085
Simon Glassccc40fd2015-03-25 12:22:26 -06001086 flush_dcache_range((unsigned long)ctrl->periodic_list,
1087 ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001088 1024));
1089
Patrick Georgie55fdac2013-03-06 14:08:31 +00001090 /* Set periodic list base address */
Simon Glassccc40fd2015-03-25 12:22:26 -06001091 ehci_writel(&ctrl->hcor->or_periodiclistbase,
1092 (unsigned long)ctrl->periodic_list);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001093
Simon Glassccc40fd2015-03-25 12:22:26 -06001094 reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
michael0bf2a032008-12-11 13:43:55 +01001095 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
Lucas Stachf5b34082012-09-28 00:26:19 +02001096 debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
Remy Böhmer33e87482008-12-13 22:51:58 +01001097 /* Port Indicators */
1098 if (HCS_INDICATOR(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001099 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1100 | 0x80, &descriptor.hub.wHubCharacteristics);
Remy Böhmer33e87482008-12-13 22:51:58 +01001101 /* Port Power Control */
1102 if (HCS_PPC(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001103 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1104 | 0x01, &descriptor.hub.wHubCharacteristics);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001105
Michael Trimarchi241f7512008-11-28 13:20:46 +01001106 /* Start the host controller. */
Simon Glassccc40fd2015-03-25 12:22:26 -06001107 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Wolfgang Denkfb718e12009-02-12 00:08:39 +01001108 /*
1109 * Philips, Intel, and maybe others need CMD_RUN before the
1110 * root hub will detect new devices (why?); NEC doesn't
1111 */
michael0bf2a032008-12-11 13:43:55 +01001112 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1113 cmd |= CMD_RUN;
Simon Glassccc40fd2015-03-25 12:22:26 -06001114 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael0bf2a032008-12-11 13:43:55 +01001115
Simon Glassccc40fd2015-03-25 12:22:26 -06001116 if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1117 /* take control over the ports */
1118 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1119 cmd |= FLAG_CF;
1120 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1121 }
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +08001122
Remy Böhmer33e87482008-12-13 22:51:58 +01001123 /* unblock posted write */
Simon Glassccc40fd2015-03-25 12:22:26 -06001124 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001125 mdelay(5);
Simon Glassccc40fd2015-03-25 12:22:26 -06001126 reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
Remy Böhmer33e87482008-12-13 22:51:58 +01001127 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001128
Simon Glassccc40fd2015-03-25 12:22:26 -06001129 return 0;
1130}
1131
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001132#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glassccc40fd2015-03-25 12:22:26 -06001133int usb_lowlevel_stop(int index)
1134{
1135 ehci_shutdown(&ehcic[index]);
1136 return ehci_hcd_stop(index);
1137}
1138
1139int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1140{
1141 struct ehci_ctrl *ctrl = &ehcic[index];
1142 uint tweaks = 0;
1143 int rc;
1144
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001145 /**
1146 * Set ops to default_ehci_ops, ehci_hcd_init should call
1147 * ehci_set_controller_priv to change any of these function pointers.
1148 */
1149 ctrl->ops = default_ehci_ops;
1150
Simon Glassccc40fd2015-03-25 12:22:26 -06001151 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1152 if (rc)
1153 return rc;
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001154 if (!ctrl->hccr || !ctrl->hcor)
1155 return -1;
Simon Glassccc40fd2015-03-25 12:22:26 -06001156 if (init == USB_INIT_DEVICE)
1157 goto done;
1158
1159 /* EHCI spec section 4.1 */
Simon Glass302696b2015-03-25 12:22:28 -06001160 if (ehci_reset(ctrl))
Simon Glassccc40fd2015-03-25 12:22:26 -06001161 return -1;
1162
1163#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1164 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1165 if (rc)
1166 return rc;
1167#endif
1168#ifdef CONFIG_USB_EHCI_FARADAY
1169 tweaks |= EHCI_TWEAK_NO_INIT_CF;
1170#endif
1171 rc = ehci_common_init(ctrl, tweaks);
1172 if (rc)
1173 return rc;
1174
1175 ctrl->rootdev = 0;
Troy Kisky7d6bbb92013-10-10 15:27:57 -07001176done:
Lucas Stach3494a4c2012-09-26 00:14:35 +02001177 *controller = &ehcic[index];
Michael Trimarchi241f7512008-11-28 13:20:46 +01001178 return 0;
1179}
Simon Glassa194b252015-03-25 12:22:29 -06001180#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +01001181
Simon Glasscb7cf602015-03-25 12:22:25 -06001182static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1183 void *buffer, int length)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001184{
1185
1186 if (usb_pipetype(pipe) != PIPE_BULK) {
1187 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1188 return -1;
1189 }
1190 return ehci_submit_async(dev, pipe, buffer, length, NULL);
1191}
1192
Simon Glasscb7cf602015-03-25 12:22:25 -06001193static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1194 void *buffer, int length,
1195 struct devrequest *setup)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001196{
Simon Glasscb7cf602015-03-25 12:22:25 -06001197 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001198
1199 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1200 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1201 return -1;
1202 }
1203
Lucas Stach3494a4c2012-09-26 00:14:35 +02001204 if (usb_pipedevice(pipe) == ctrl->rootdev) {
1205 if (!ctrl->rootdev)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001206 dev->speed = USB_SPEED_HIGH;
1207 return ehci_submit_root(dev, pipe, buffer, length, setup);
1208 }
1209 return ehci_submit_async(dev, pipe, buffer, length, setup);
1210}
1211
Patrick Georgie55fdac2013-03-06 14:08:31 +00001212struct int_queue {
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001213 int elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001214 unsigned long pipe;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001215 struct QH *first;
1216 struct QH *current;
1217 struct QH *last;
1218 struct qTD *tds;
1219};
1220
Rob Herringf14d54b2015-03-17 15:46:37 -05001221#define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001222
1223static int
1224enable_periodic(struct ehci_ctrl *ctrl)
1225{
1226 uint32_t cmd;
1227 struct ehci_hcor *hcor = ctrl->hcor;
1228 int ret;
1229
1230 cmd = ehci_readl(&hcor->or_usbcmd);
1231 cmd |= CMD_PSE;
1232 ehci_writel(&hcor->or_usbcmd, cmd);
1233
1234 ret = handshake((uint32_t *)&hcor->or_usbsts,
1235 STS_PSS, STS_PSS, 100 * 1000);
1236 if (ret < 0) {
1237 printf("EHCI failed: timeout when enabling periodic list\n");
1238 return -ETIMEDOUT;
1239 }
1240 udelay(1000);
1241 return 0;
1242}
1243
1244static int
1245disable_periodic(struct ehci_ctrl *ctrl)
1246{
1247 uint32_t cmd;
1248 struct ehci_hcor *hcor = ctrl->hcor;
1249 int ret;
1250
1251 cmd = ehci_readl(&hcor->or_usbcmd);
1252 cmd &= ~CMD_PSE;
1253 ehci_writel(&hcor->or_usbcmd, cmd);
1254
1255 ret = handshake((uint32_t *)&hcor->or_usbsts,
1256 STS_PSS, 0, 100 * 1000);
1257 if (ret < 0) {
1258 printf("EHCI failed: timeout when disabling periodic list\n");
1259 return -ETIMEDOUT;
1260 }
1261 return 0;
1262}
1263
Hans de Goede53ca9de2015-05-11 20:43:52 +02001264static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1265 unsigned long pipe, int queuesize, int elementsize,
1266 void *buffer, int interval)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001267{
Simon Glasscb7cf602015-03-25 12:22:25 -06001268 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001269 struct int_queue *result = NULL;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001270 uint32_t i, toggle;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001271
Hans de Goede7f7cb732014-09-24 14:06:04 +02001272 /*
1273 * Interrupt transfers requiring several transactions are not supported
1274 * because bInterval is ignored.
1275 *
1276 * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1277 * <= PKT_ALIGN if several qTDs are required, while the USB
1278 * specification does not constrain this for interrupt transfers. That
1279 * means that ehci_submit_async() would support interrupt transfers
1280 * requiring several transactions only as long as the transfer size does
1281 * not require more than a single qTD.
1282 */
1283 if (elementsize > usb_maxpacket(dev, pipe)) {
1284 printf("%s: xfers requiring several transactions are not supported.\n",
1285 __func__);
1286 return NULL;
1287 }
1288
Patrick Georgie55fdac2013-03-06 14:08:31 +00001289 debug("Enter create_int_queue\n");
1290 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1291 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1292 return NULL;
1293 }
1294
1295 /* limit to 4 full pages worth of data -
1296 * we can safely fit them in a single TD,
1297 * no matter the alignment
1298 */
1299 if (elementsize >= 16384) {
1300 debug("too large elements for interrupt transfers\n");
1301 return NULL;
1302 }
1303
1304 result = malloc(sizeof(*result));
1305 if (!result) {
1306 debug("ehci intr queue: out of memory\n");
1307 goto fail1;
1308 }
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001309 result->elementsize = elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001310 result->pipe = pipe;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001311 result->first = memalign(USB_DMA_MINALIGN,
1312 sizeof(struct QH) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001313 if (!result->first) {
1314 debug("ehci intr queue: out of memory\n");
1315 goto fail2;
1316 }
1317 result->current = result->first;
1318 result->last = result->first + queuesize - 1;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001319 result->tds = memalign(USB_DMA_MINALIGN,
1320 sizeof(struct qTD) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001321 if (!result->tds) {
1322 debug("ehci intr queue: out of memory\n");
1323 goto fail3;
1324 }
1325 memset(result->first, 0, sizeof(struct QH) * queuesize);
1326 memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1327
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001328 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1329
Patrick Georgie55fdac2013-03-06 14:08:31 +00001330 for (i = 0; i < queuesize; i++) {
1331 struct QH *qh = result->first + i;
1332 struct qTD *td = result->tds + i;
1333 void **buf = &qh->buffer;
1334
Rob Herringf14d54b2015-03-17 15:46:37 -05001335 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001336 if (i == queuesize - 1)
Adrian Cox29d05872014-04-10 13:29:45 +01001337 qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001338
Rob Herringf14d54b2015-03-17 15:46:37 -05001339 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
Adrian Cox29d05872014-04-10 13:29:45 +01001340 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1341 qh->qh_endpt1 =
1342 cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001343 (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1344 (1 << 14) |
1345 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1346 (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
Adrian Cox29d05872014-04-10 13:29:45 +01001347 (usb_pipedevice(pipe) << 0));
1348 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1349 (1 << 0)); /* S-mask: microframe 0 */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001350 if (dev->speed == USB_SPEED_LOW ||
1351 dev->speed == USB_SPEED_FULL) {
Hans de Goededa166772014-09-20 16:51:22 +02001352 /* C-mask: microframes 2-4 */
1353 qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001354 }
Hans de Goededa166772014-09-20 16:51:22 +02001355 ehci_update_endpt2_dev_n_port(dev, qh);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001356
Adrian Cox29d05872014-04-10 13:29:45 +01001357 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1358 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001359 debug("communication direction is '%s'\n",
1360 usb_pipein(pipe) ? "in" : "out");
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001361 td->qt_token = cpu_to_hc32(
1362 QT_TOKEN_DT(toggle) |
1363 (elementsize << 16) |
Patrick Georgie55fdac2013-03-06 14:08:31 +00001364 ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
Adrian Cox29d05872014-04-10 13:29:45 +01001365 0x80); /* active */
1366 td->qt_buffer[0] =
Rob Herringf14d54b2015-03-17 15:46:37 -05001367 cpu_to_hc32((unsigned long)buffer + i * elementsize);
Adrian Cox29d05872014-04-10 13:29:45 +01001368 td->qt_buffer[1] =
1369 cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1370 td->qt_buffer[2] =
1371 cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1372 td->qt_buffer[3] =
1373 cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1374 td->qt_buffer[4] =
1375 cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001376
1377 *buf = buffer + i * elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001378 toggle ^= 1;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001379 }
1380
Rob Herringf14d54b2015-03-17 15:46:37 -05001381 flush_dcache_range((unsigned long)buffer,
Stephen Warren36dad662013-05-24 15:03:17 -06001382 ALIGN_END_ADDR(char, buffer,
1383 queuesize * elementsize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001384 flush_dcache_range((unsigned long)result->first,
Stephen Warren36dad662013-05-24 15:03:17 -06001385 ALIGN_END_ADDR(struct QH, result->first,
1386 queuesize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001387 flush_dcache_range((unsigned long)result->tds,
Stephen Warren36dad662013-05-24 15:03:17 -06001388 ALIGN_END_ADDR(struct qTD, result->tds,
1389 queuesize));
1390
Hans de Goede8ba55ed2014-09-24 14:06:03 +02001391 if (ctrl->periodic_schedules > 0) {
1392 if (disable_periodic(ctrl) < 0) {
1393 debug("FATAL: periodic should never fail, but did");
1394 goto fail3;
1395 }
Patrick Georgie55fdac2013-03-06 14:08:31 +00001396 }
1397
1398 /* hook up to periodic list */
1399 struct QH *list = &ctrl->periodic_queue;
1400 result->last->qh_link = list->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001401 list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001402
Rob Herringf14d54b2015-03-17 15:46:37 -05001403 flush_dcache_range((unsigned long)result->last,
Stephen Warren36dad662013-05-24 15:03:17 -06001404 ALIGN_END_ADDR(struct QH, result->last, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -05001405 flush_dcache_range((unsigned long)list,
Stephen Warren36dad662013-05-24 15:03:17 -06001406 ALIGN_END_ADDR(struct QH, list, 1));
1407
Patrick Georgie55fdac2013-03-06 14:08:31 +00001408 if (enable_periodic(ctrl) < 0) {
1409 debug("FATAL: periodic should never fail, but did");
1410 goto fail3;
1411 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001412 ctrl->periodic_schedules++;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001413
1414 debug("Exit create_int_queue\n");
1415 return result;
1416fail3:
Heinrich Schuchardt4b88d6f2020-04-19 12:02:28 +02001417 free(result->tds);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001418fail2:
Heinrich Schuchardt4b88d6f2020-04-19 12:02:28 +02001419 free(result->first);
1420 free(result);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001421fail1:
1422 return NULL;
1423}
1424
Hans de Goede53ca9de2015-05-11 20:43:52 +02001425static void *_ehci_poll_int_queue(struct usb_device *dev,
1426 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001427{
1428 struct QH *cur = queue->current;
Hans de Goede9db174c2014-09-20 16:51:24 +02001429 struct qTD *cur_td;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001430 uint32_t token, toggle;
1431 unsigned long pipe = queue->pipe;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001432
1433 /* depleted queue */
1434 if (cur == NULL) {
1435 debug("Exit poll_int_queue with completed queue\n");
1436 return NULL;
1437 }
1438 /* still active */
Hans de Goede9db174c2014-09-20 16:51:24 +02001439 cur_td = &queue->tds[queue->current - queue->first];
Rob Herringf14d54b2015-03-17 15:46:37 -05001440 invalidate_dcache_range((unsigned long)cur_td,
Hans de Goede9db174c2014-09-20 16:51:24 +02001441 ALIGN_END_ADDR(struct qTD, cur_td, 1));
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001442 token = hc32_to_cpu(cur_td->qt_token);
1443 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1444 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001445 return NULL;
1446 }
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001447
1448 toggle = QT_TOKEN_GET_DT(token);
1449 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1450
Patrick Georgie55fdac2013-03-06 14:08:31 +00001451 if (!(cur->qh_link & QH_LINK_TERMINATE))
1452 queue->current++;
1453 else
1454 queue->current = NULL;
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001455
Rob Herringf14d54b2015-03-17 15:46:37 -05001456 invalidate_dcache_range((unsigned long)cur->buffer,
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001457 ALIGN_END_ADDR(char, cur->buffer,
1458 queue->elementsize));
1459
Hans de Goede9db174c2014-09-20 16:51:24 +02001460 debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001461 token, cur, queue->first);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001462 return cur->buffer;
1463}
1464
1465/* Do not free buffers associated with QHs, they're owned by someone else */
Hans de Goede53ca9de2015-05-11 20:43:52 +02001466static int _ehci_destroy_int_queue(struct usb_device *dev,
1467 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001468{
Simon Glasscb7cf602015-03-25 12:22:25 -06001469 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001470 int result = -1;
1471 unsigned long timeout;
1472
1473 if (disable_periodic(ctrl) < 0) {
1474 debug("FATAL: periodic should never fail, but did");
1475 goto out;
1476 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001477 ctrl->periodic_schedules--;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001478
1479 struct QH *cur = &ctrl->periodic_queue;
1480 timeout = get_timer(0) + 500; /* abort after 500ms */
Adrian Cox29d05872014-04-10 13:29:45 +01001481 while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001482 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1483 if (NEXT_QH(cur) == queue->first) {
1484 debug("found candidate. removing from chain\n");
1485 cur->qh_link = queue->last->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001486 flush_dcache_range((unsigned long)cur,
Hans de Goede8e00cf62014-09-20 16:51:23 +02001487 ALIGN_END_ADDR(struct QH, cur, 1));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001488 result = 0;
1489 break;
1490 }
1491 cur = NEXT_QH(cur);
1492 if (get_timer(0) > timeout) {
1493 printf("Timeout destroying interrupt endpoint queue\n");
1494 result = -1;
1495 goto out;
1496 }
1497 }
1498
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001499 if (ctrl->periodic_schedules > 0) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001500 result = enable_periodic(ctrl);
1501 if (result < 0)
1502 debug("FATAL: periodic should never fail, but did");
1503 }
1504
1505out:
1506 free(queue->tds);
1507 free(queue->first);
1508 free(queue);
1509
1510 return result;
1511}
1512
Simon Glasscb7cf602015-03-25 12:22:25 -06001513static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001514 void *buffer, int length, int interval,
1515 bool nonblock)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001516{
Patrick Georgie55fdac2013-03-06 14:08:31 +00001517 void *backbuffer;
1518 struct int_queue *queue;
1519 unsigned long timeout;
1520 int result = 0, ret;
1521
Michael Trimarchi241f7512008-11-28 13:20:46 +01001522 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1523 dev, pipe, buffer, length, interval);
Benoît Thébaudeau58c4dfb2012-08-09 23:50:44 +02001524
Hans de Goede53ca9de2015-05-11 20:43:52 +02001525 queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
Hans de Goede7f7cb732014-09-24 14:06:04 +02001526 if (!queue)
1527 return -1;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001528
1529 timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
Hans de Goede53ca9de2015-05-11 20:43:52 +02001530 while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001531 if (get_timer(0) > timeout) {
1532 printf("Timeout poll on interrupt endpoint\n");
1533 result = -ETIMEDOUT;
1534 break;
1535 }
1536
1537 if (backbuffer != buffer) {
Rob Herringf14d54b2015-03-17 15:46:37 -05001538 debug("got wrong buffer back (%p instead of %p)\n",
1539 backbuffer, buffer);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001540 return -EINVAL;
1541 }
1542
Hans de Goede53ca9de2015-05-11 20:43:52 +02001543 ret = _ehci_destroy_int_queue(dev, queue);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001544 if (ret < 0)
1545 return ret;
1546
1547 /* everything worked out fine */
1548 return result;
Marek Vasut9b315fe2011-09-25 21:07:56 +02001549}
Simon Glasscb7cf602015-03-25 12:22:25 -06001550
Marek Vasut118a9032020-04-06 14:29:44 +02001551static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1552{
1553 ctrl->async_locked = lock;
1554
1555 if (lock)
1556 return 0;
1557
1558 return ehci_disable_async(ctrl);
1559}
1560
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001561#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glasscb7cf602015-03-25 12:22:25 -06001562int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1563 void *buffer, int length)
1564{
1565 return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1566}
1567
1568int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1569 int length, struct devrequest *setup)
1570{
1571 return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1572}
1573
1574int submit_int_msg(struct usb_device *dev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001575 void *buffer, int length, int interval, bool nonblock)
Simon Glasscb7cf602015-03-25 12:22:25 -06001576{
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001577 return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1578 nonblock);
Simon Glasscb7cf602015-03-25 12:22:25 -06001579}
Hans de Goede53ca9de2015-05-11 20:43:52 +02001580
1581struct int_queue *create_int_queue(struct usb_device *dev,
1582 unsigned long pipe, int queuesize, int elementsize,
1583 void *buffer, int interval)
1584{
1585 return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1586 buffer, interval);
1587}
1588
1589void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1590{
1591 return _ehci_poll_int_queue(dev, queue);
1592}
1593
1594int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1595{
1596 return _ehci_destroy_int_queue(dev, queue);
1597}
Marek Vasut118a9032020-04-06 14:29:44 +02001598
1599int usb_lock_async(struct usb_device *dev, int lock)
1600{
1601 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1602
1603 return _ehci_lock_async(ctrl, lock);
1604}
Simon Glassa194b252015-03-25 12:22:29 -06001605#endif
1606
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001607#if CONFIG_IS_ENABLED(DM_USB)
Simon Glassa194b252015-03-25 12:22:29 -06001608static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1609 unsigned long pipe, void *buffer, int length,
1610 struct devrequest *setup)
1611{
1612 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1613 dev->name, udev, udev->dev->name, udev->portnr);
1614
1615 return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1616}
1617
1618static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1619 unsigned long pipe, void *buffer, int length)
1620{
1621 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1622 return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1623}
1624
1625static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1626 unsigned long pipe, void *buffer, int length,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001627 int interval, bool nonblock)
Simon Glassa194b252015-03-25 12:22:29 -06001628{
1629 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001630 return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1631 nonblock);
Simon Glassa194b252015-03-25 12:22:29 -06001632}
1633
Hans de Goede0a7fa272015-05-10 14:10:18 +02001634static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1635 struct usb_device *udev, unsigned long pipe, int queuesize,
1636 int elementsize, void *buffer, int interval)
1637{
1638 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1639 return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1640 buffer, interval);
1641}
1642
1643static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1644 struct int_queue *queue)
1645{
1646 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1647 return _ehci_poll_int_queue(udev, queue);
1648}
1649
1650static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1651 struct int_queue *queue)
1652{
1653 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1654 return _ehci_destroy_int_queue(udev, queue);
1655}
1656
Bin Meng0441b872017-09-07 06:13:19 -07001657static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1658{
1659 /*
1660 * EHCD can handle any transfer length as long as there is enough
1661 * free heap space left, hence set the theoretical max number here.
1662 */
1663 *size = SIZE_MAX;
1664
1665 return 0;
1666}
1667
Marek Vasut118a9032020-04-06 14:29:44 +02001668static int ehci_lock_async(struct udevice *dev, int lock)
1669{
1670 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1671
1672 return _ehci_lock_async(ctrl, lock);
1673}
1674
Simon Glassa194b252015-03-25 12:22:29 -06001675int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1676 struct ehci_hcor *hcor, const struct ehci_ops *ops,
1677 uint tweaks, enum usb_init_type init)
1678{
Hans de Goede76bc7f42015-05-05 11:54:35 +02001679 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
Simon Glassa194b252015-03-25 12:22:29 -06001680 struct ehci_ctrl *ctrl = dev_get_priv(dev);
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001681 int ret = -1;
Simon Glassa194b252015-03-25 12:22:29 -06001682
1683 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1684 dev->name, ctrl, hccr, hcor, init);
1685
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001686 if (!ctrl || !hccr || !hcor)
1687 goto err;
1688
Hans de Goede76bc7f42015-05-05 11:54:35 +02001689 priv->desc_before_addr = true;
1690
Simon Glassa194b252015-03-25 12:22:29 -06001691 ehci_setup_ops(ctrl, ops);
1692 ctrl->hccr = hccr;
1693 ctrl->hcor = hcor;
1694 ctrl->priv = ctrl;
1695
Stephen Warren71eced32015-08-20 17:38:05 -06001696 ctrl->init = init;
1697 if (ctrl->init == USB_INIT_DEVICE)
Simon Glassa194b252015-03-25 12:22:29 -06001698 goto done;
Stephen Warren71eced32015-08-20 17:38:05 -06001699
Simon Glassa194b252015-03-25 12:22:29 -06001700 ret = ehci_reset(ctrl);
1701 if (ret)
1702 goto err;
1703
Mateusz Kulikowski3e13f392016-04-03 13:38:26 +02001704 if (ctrl->ops.init_after_reset) {
1705 ret = ctrl->ops.init_after_reset(ctrl);
Mateusz Kulikowskiaab5a5a2016-03-31 23:12:17 +02001706 if (ret)
1707 goto err;
1708 }
1709
Simon Glassa194b252015-03-25 12:22:29 -06001710 ret = ehci_common_init(ctrl, tweaks);
1711 if (ret)
1712 goto err;
1713done:
1714 return 0;
1715err:
1716 free(ctrl);
1717 debug("%s: failed, ret=%d\n", __func__, ret);
1718 return ret;
1719}
1720
1721int ehci_deregister(struct udevice *dev)
1722{
1723 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1724
Stephen Warren71eced32015-08-20 17:38:05 -06001725 if (ctrl->init == USB_INIT_DEVICE)
1726 return 0;
1727
Simon Glassa194b252015-03-25 12:22:29 -06001728 ehci_shutdown(ctrl);
1729
1730 return 0;
1731}
1732
1733struct dm_usb_ops ehci_usb_ops = {
1734 .control = ehci_submit_control_msg,
1735 .bulk = ehci_submit_bulk_msg,
1736 .interrupt = ehci_submit_int_msg,
Hans de Goede0a7fa272015-05-10 14:10:18 +02001737 .create_int_queue = ehci_create_int_queue,
1738 .poll_int_queue = ehci_poll_int_queue,
1739 .destroy_int_queue = ehci_destroy_int_queue,
Bin Meng0441b872017-09-07 06:13:19 -07001740 .get_max_xfer_size = ehci_get_max_xfer_size,
Marek Vasut118a9032020-04-06 14:29:44 +02001741 .lock_async = ehci_lock_async,
Simon Glassa194b252015-03-25 12:22:29 -06001742};
1743
1744#endif
Marek Vasutd9af6cd2018-08-08 14:29:55 +02001745
1746#ifdef CONFIG_PHY
1747int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1748{
1749 int ret;
1750
1751 if (!phy)
1752 return 0;
1753
1754 ret = generic_phy_get_by_index(dev, index, phy);
1755 if (ret) {
1756 if (ret != -ENOENT) {
1757 dev_err(dev, "failed to get usb phy\n");
1758 return ret;
1759 }
1760 } else {
1761 ret = generic_phy_init(phy);
1762 if (ret) {
1763 dev_err(dev, "failed to init usb phy\n");
1764 return ret;
1765 }
1766
1767 ret = generic_phy_power_on(phy);
1768 if (ret) {
1769 dev_err(dev, "failed to power on usb phy\n");
1770 return generic_phy_exit(phy);
1771 }
1772 }
1773
1774 return 0;
1775}
1776
1777int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1778{
1779 int ret = 0;
1780
1781 if (!phy)
1782 return 0;
1783
1784 if (generic_phy_valid(phy)) {
1785 ret = generic_phy_power_off(phy);
1786 if (ret) {
1787 dev_err(dev, "failed to power off usb phy\n");
1788 return ret;
1789 }
1790
1791 ret = generic_phy_exit(phy);
1792 if (ret) {
1793 dev_err(dev, "failed to power off usb phy\n");
1794 return ret;
1795 }
1796 }
1797
1798 return 0;
1799}
1800#else
1801int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1802{
1803 return 0;
1804}
1805
1806int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1807{
1808 return 0;
1809}
1810#endif