blob: 191e12af6a15bcfcf99f0c2effead5ee6bdd3af5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassb1398362015-08-03 08:19:37 -06002/*
3 * Google Spring board device tree source
4 *
5 * Copyright (c) 2013 Google, Inc
6 * Copyright (c) 2014 SUSE LINUX Products GmbH
Simon Glassb1398362015-08-03 08:19:37 -06007 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/input/input.h>
13#include "exynos5250.dtsi"
14
15/ {
16 model = "Google Spring";
17 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
18
19 aliases {
20 i2c0 = "/i2c@12C60000";
21 i2c1 = "/i2c@12C70000";
22 i2c2 = "/i2c@12C80000";
23 i2c3 = "/i2c@12C90000";
24 i2c4 = "/i2c@12CA0000";
25 i2c5 = "/i2c@12CB0000";
26 i2c6 = "/i2c@12CC0000";
27 i2c7 = "/i2c@12CD0000";
28 i2c104 = &cros_ec_ldo_tunnel;
29 spi0 = "/spi@12d20000";
30 spi1 = "/spi@12d30000";
31 spi2 = "/spi@12d40000";
32 spi3 = "/spi@131a0000";
33 spi4 = "/spi@131b0000";
Minkyu Kangbac07eb2018-07-27 16:59:24 +090034 mmc0 = "/mmc@12200000";
Simon Glassb1398362015-08-03 08:19:37 -060035 serial0 = "/serial@12C30000";
36 console = "/serial@12C30000";
Simon Glassb1398362015-08-03 08:19:37 -060037 };
38
39 memory {
40 reg = <0x40000000 0x80000000>;
41 };
42
43 flash@0 {
44 spl { /* spl size override */
45 size = <0x8000>;
46 };
47 };
48
49 chosen {
50 bootargs = "console=tty1";
51 stdout-path = "serial3:115200n8";
52 };
53
54 board-rev {
55 compatible = "google,board-revision";
56 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
57 <&gpy4 2 0>;
58 };
59
Simon Glass11328532015-08-22 18:31:37 -060060 i2c@12C90000 {
61 clock-frequency = <100000>;
62 tpm@20 {
63 reg = <0x20>;
64 compatible = "infineon,slb9645tt";
65 };
66 };
67
Simon Glassb1398362015-08-03 08:19:37 -060068 mmc@12200000 {
69 samsung,bus-width = <8>;
70 samsung,timing = <1 3 3>;
71 samsung,removable = <0>;
72 };
73
74 mmc@12210000 {
75 status = "disabled";
76 };
77
78 mmc@12220000 {
79 /* MMC2 pins are used as GPIO for eDP bridge */
80 status = "disabled";
81 };
82
83 mmc@12230000 {
84 status = "disabled";
85 };
86
87 ehci@12110000 {
88 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
89 status = "okay";
90 };
91
92 xhci@12000000 {
93 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
94 };
95
96 spi@12d30000 {
97 spi-max-frequency = <50000000>;
98 firmware_storage_spi: flash@0 {
99 compatible = "spi-flash";
100 reg = <0>;
101 };
102 };
103
104 tmu@10060000 {
105 samsung,min-temp = <25>;
106 samsung,max-temp = <125>;
107 samsung,start-warning = <95>;
108 samsung,start-tripping = <105>;
109 samsung,hw-tripping = <110>;
110 samsung,efuse-min-value = <40>;
111 samsung,efuse-value = <55>;
112 samsung,efuse-max-value = <100>;
113 samsung,slope = <274761730>;
114 samsung,dc-value = <25>;
115 };
116
117 fimd@14400000 {
118 samsung,vl-freq = <60>;
119 samsung,vl-col = <1366>;
120 samsung,vl-row = <768>;
121 samsung,vl-width = <1366>;
122 samsung,vl-height = <768>;
123
124 samsung,vl-clkp;
125 samsung,vl-dp;
126 samsung,vl-hsp;
127 samsung,vl-vsp;
128
129 samsung,vl-bpix = <4>;
130
131 samsung,vl-hspw = <32>;
132 samsung,vl-hbpd = <80>;
133 samsung,vl-hfpd = <48>;
134 samsung,vl-vspw = <5>;
135 samsung,vl-vbpd = <14>;
136 samsung,vl-vfpd = <3>;
137 samsung,vl-cmd-allow-len = <0xf>;
138
139 samsung,winid = <0>;
140 samsung,interface-mode = <1>;
141 samsung,dp-enabled = <1>;
142 samsung,dual-lcd-enabled = <0>;
143 };
144
145 dp@145b0000 {
146 samsung,lt-status = <0>;
147
148 samsung,master-mode = <0>;
149 samsung,bist-mode = <0>;
150 samsung,bist-pattern = <0>;
151 samsung,h-sync-polarity = <0>;
152 samsung,v-sync-polarity = <0>;
153 samsung,interlaced = <0>;
154 samsung,color-space = <0>;
155 samsung,dynamic-range = <0>;
156 samsung,ycbcr-coeff = <0>;
157 samsung,color-depth = <1>;
158 };
Simon Glass67063672016-02-21 21:08:58 -0700159
160 backlight: backlight {
161 compatible = "pwm-backlight";
162 pwms = <&pwm 0 1000000 0>;
163 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
164 default-brightness-level = <1>;
165 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
166 power-supply = <&fet1>;
167 };
168
169 panel: panel {
170 compatible = "auo,b116xw03";
171 power-supply = <&fet6>;
172 backlight = <&backlight>;
173
174 port {
175 panel_in: endpoint {
176 remote-endpoint = <&bridge_out>;
177 };
178 };
179 };
Simon Glassb1398362015-08-03 08:19:37 -0600180};
181
182&i2c_0 {
183 status = "okay";
184 samsung,i2c-sda-delay = <100>;
185 samsung,i2c-max-bus-freq = <378000>;
186
187 s5m8767-pmic@66 {
188 compatible = "samsung,s5m8767-pmic";
189 reg = <0x66>;
190 interrupt-parent = <&gpx3>;
191 wakeup-source;
192
193 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
194 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
195 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
196
197 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
198 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
199 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
200
201 /*
202 * The following arrays of DVS voltages are not used, since we are
203 * not using GPIOs to control PMIC bucks, but they must be defined
204 * to please the driver.
205 */
206 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
207 <1250000>, <1200000>,
208 <1150000>, <1100000>,
209 <1000000>, <950000>;
210
211 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
212 <1100000>, <1100000>,
213 <1000000>, <1000000>,
214 <1000000>, <1000000>;
215
216 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
217 <1200000>, <1200000>,
218 <1200000>, <1200000>,
219 <1200000>, <1200000>;
220
221 clocks {
222 compatible = "samsung,s5m8767-clk";
223 #clock-cells = <1>;
224 clock-output-names = "en32khz_ap",
225 "en32khz_cp",
226 "en32khz_bt";
227 };
228
229 regulators {
230 ldo4_reg: LDO4 {
231 regulator-name = "P1.0V_LDO_OUT4";
232 regulator-min-microvolt = <1000000>;
233 regulator-max-microvolt = <1000000>;
234 regulator-always-on;
235 op_mode = <0>;
236 };
237
238 ldo5_reg: LDO5 {
239 regulator-name = "P1.8V_LDO_OUT5";
240 regulator-min-microvolt = <1800000>;
241 regulator-max-microvolt = <1800000>;
242 regulator-always-on;
243 op_mode = <0>;
244 };
245
246 ldo6_reg: LDO6 {
247 regulator-name = "vdd_mydp";
248 regulator-min-microvolt = <1200000>;
249 regulator-max-microvolt = <1200000>;
250 regulator-always-on;
251 op_mode = <3>;
252 };
253
254 ldo7_reg: LDO7 {
255 regulator-name = "P1.1V_LDO_OUT7";
256 regulator-min-microvolt = <1100000>;
257 regulator-max-microvolt = <1100000>;
258 regulator-always-on;
259 op_mode = <3>;
260 };
261
262 ldo8_reg: LDO8 {
263 regulator-name = "P1.0V_LDO_OUT8";
264 regulator-min-microvolt = <1000000>;
265 regulator-max-microvolt = <1000000>;
266 regulator-always-on;
267 op_mode = <3>;
268 };
269
270 ldo10_reg: LDO10 {
271 regulator-name = "P1.8V_LDO_OUT10";
272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvolt = <1800000>;
274 regulator-always-on;
275 op_mode = <3>;
276 };
277
278 ldo11_reg: LDO11 {
279 regulator-name = "P1.8V_LDO_OUT11";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
282 regulator-always-on;
283 op_mode = <0>;
284 };
285
286 ldo12_reg: LDO12 {
287 regulator-name = "P3.0V_LDO_OUT12";
288 regulator-min-microvolt = <3000000>;
289 regulator-max-microvolt = <3000000>;
290 regulator-always-on;
291 op_mode = <3>;
292 };
293
294 ldo13_reg: LDO13 {
295 regulator-name = "P1.8V_LDO_OUT13";
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <1800000>;
298 regulator-always-on;
299 op_mode = <0>;
300 };
301
302 ldo14_reg: LDO14 {
303 regulator-name = "P1.8V_LDO_OUT14";
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <1800000>;
306 regulator-always-on;
307 op_mode = <3>;
308 };
309
310 ldo15_reg: LDO15 {
311 regulator-name = "P1.0V_LDO_OUT15";
312 regulator-min-microvolt = <1000000>;
313 regulator-max-microvolt = <1000000>;
314 regulator-always-on;
315 op_mode = <3>;
316 };
317
318 ldo16_reg: LDO16 {
319 regulator-name = "P1.8V_LDO_OUT16";
320 regulator-min-microvolt = <1800000>;
321 regulator-max-microvolt = <1800000>;
322 regulator-always-on;
323 op_mode = <3>;
324 };
325
326 ldo17_reg: LDO17 {
327 regulator-name = "P1.2V_LDO_OUT17";
328 regulator-min-microvolt = <1200000>;
329 regulator-max-microvolt = <1200000>;
330 regulator-always-on;
331 op_mode = <0>;
332 };
333
334 ldo25_reg: LDO25 {
335 regulator-name = "vdd_bridge";
336 regulator-min-microvolt = <1200000>;
337 regulator-max-microvolt = <1200000>;
338 regulator-always-on;
339 op_mode = <1>;
340 };
341
342 buck1_reg: BUCK1 {
343 regulator-name = "vdd_mif";
344 regulator-min-microvolt = <950000>;
345 regulator-max-microvolt = <1300000>;
346 regulator-always-on;
347 regulator-boot-on;
348 op_mode = <3>;
349 };
350
351 buck2_reg: BUCK2 {
352 regulator-name = "vdd_arm";
353 regulator-min-microvolt = <850000>;
354 regulator-max-microvolt = <1350000>;
355 regulator-always-on;
356 regulator-boot-on;
357 op_mode = <3>;
358 };
359
360 buck3_reg: BUCK3 {
361 regulator-name = "vdd_int";
362 regulator-min-microvolt = <900000>;
363 regulator-max-microvolt = <1200000>;
364 regulator-always-on;
365 regulator-boot-on;
366 op_mode = <3>;
367 };
368
369 buck4_reg: BUCK4 {
370 regulator-name = "vdd_g3d";
371 regulator-min-microvolt = <850000>;
372 regulator-max-microvolt = <1300000>;
373 regulator-boot-on;
374 op_mode = <3>;
375 };
376
377 buck5_reg: BUCK5 {
378 regulator-name = "P1.8V_BUCK_OUT5";
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <1800000>;
381 regulator-always-on;
382 regulator-boot-on;
383 op_mode = <1>;
384 };
385
386 buck6_reg: BUCK6 {
387 regulator-name = "P1.2V_BUCK_OUT6";
388 regulator-min-microvolt = <2050000>;
389 regulator-max-microvolt = <2050000>;
390 regulator-always-on;
391 regulator-boot-on;
392 op_mode = <0>;
393 };
394
395 buck9_reg: BUCK9 {
396 regulator-name = "vdd_ummc";
397 regulator-min-microvolt = <950000>;
398 regulator-max-microvolt = <3000000>;
399 regulator-always-on;
400 regulator-boot-on;
401 op_mode = <3>;
402 };
403 };
404 };
405};
406
Simon Glass67063672016-02-21 21:08:58 -0700407&dp {
408 status = "okay";
409 samsung,color-space = <0>;
410 samsung,dynamic-range = <0>;
411 samsung,ycbcr-coeff = <0>;
412 samsung,color-depth = <1>;
413 samsung,link-rate = <0x0a>;
414 samsung,lane-count = <1>;
415 samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
416
417 ports {
418 port@0 {
419 dp_out: endpoint {
420 remote-endpoint = <&bridge_in>;
421 };
422 };
423 };
424};
425
Simon Glassb1398362015-08-03 08:19:37 -0600426&i2c_1 {
427 status = "okay";
428 samsung,i2c-sda-delay = <100>;
429 samsung,i2c-max-bus-freq = <378000>;
430};
431
432&i2c_2 {
433 status = "okay";
434 samsung,i2c-sda-delay = <100>;
435 samsung,i2c-max-bus-freq = <66000>;
436};
437
438&i2c_3 {
439 status = "okay";
440 samsung,i2c-sda-delay = <100>;
441 samsung,i2c-max-bus-freq = <66000>;
442};
443
444&i2c_4 {
445 status = "okay";
446 samsung,i2c-sda-delay = <100>;
447 samsung,i2c-max-bus-freq = <66000>;
448 clock-frequency = <66000>;
449
450 cros_ec: embedded-controller {
451 compatible = "google,cros-ec-i2c";
452 reg = <0x1e>;
453 interrupts = <6 IRQ_TYPE_NONE>;
454 interrupt-parent = <&gpx1>;
455 wakeup-source;
456 u-boot,i2c-offset-len = <0>;
457 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
458 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
459 compatible = "google,cros-ec-ldo-tunnel";
460 #address-cells = <1>;
461 #size-cells = <0>;
462 power-regulator {
463 compatible = "ti,tps65090";
464 reg = <0x48>;
465
466 regulators {
467 dcdc1 {
468 ti,enable-ext-control;
469 };
470 dcdc2 {
471 ti,enable-ext-control;
472 };
473 dcdc3 {
474 ti,enable-ext-control;
475 };
476 fet1: fet1 {
477 regulator-name = "vcd_led";
478 ti,overcurrent-wait = <3>;
479 };
480 tps65090_fet2: fet2 {
481 regulator-name = "video_mid";
482 regulator-always-on;
483 ti,overcurrent-wait = <3>;
484 };
485 fet3 {
486 regulator-name = "wwan_r";
487 regulator-always-on;
488 ti,overcurrent-wait = <3>;
489 };
490 fet4 {
491 regulator-name = "sdcard";
492 ti,overcurrent-wait = <3>;
493 };
494 fet5 {
495 regulator-name = "camout";
496 regulator-always-on;
497 ti,overcurrent-wait = <3>;
498 };
499 fet6: fet6 {
500 regulator-name = "lcd_vdd";
501 ti,overcurrent-wait = <3>;
502 };
503 tps65090_fet7: fet7 {
504 regulator-name = "video_mid_1a";
505 regulator-always-on;
506 ti,overcurrent-wait = <3>;
507 };
508 ldo1 {
509 };
510 ldo2 {
511 };
512 };
513 };
514 };
515 };
516};
517
518&i2c_5 {
519 status = "okay";
520 samsung,i2c-sda-delay = <100>;
521 samsung,i2c-max-bus-freq = <66000>;
522};
523
524&i2c_7 {
525 status = "okay";
526 samsung,i2c-sda-delay = <100>;
527 samsung,i2c-max-bus-freq = <66000>;
528
529 ps8622-bridge@8 {
530 compatible = "parade,ps8622";
531 reg = <0x8>;
532 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
533 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
534 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
535 power-supply = <&ldo6_reg>;
536 parade,regs = /bits/ 8 <
537 0x02 0xa1 0x01 /* HPD low */
538 /*
539 * SW setting: [1:0] SW output 1.2V voltage is
540 * lower to 96%
541 */
542 0x04 0x14 0x01
543 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
544 0x04 0xe3 0x20
545 0x04 0xe2 0x80 /* [7] RCO SS enable */
546 /*
547 * RPHY Setting: [3:2] CDR tune wait cycle before
548 * measure for fine tune b00: 1us,
549 * 01: 0.5us, 10:2us, 11:4us
550 */
551 0x04 0x8a 0x0c
552 0x04 0x89 0x08 /* [3] RFD always on */
553 /*
554 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
555 */
556 0x04 0x71 0x2d
557 /* 2.7G CDR settings */
558 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
559 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
560 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
561 /*
562 * 1.62G CDR settings:
563 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
564 */
565 0x04 0xc0 0x12
566 0x04 0xc1 0x92 /* Gitune=-37% */
567 0x04 0xc2 0x1c /* Fbstep=100% */
568 0x04 0x32 0x80 /* [7] LOS signal disable */
569 /* RPIO Setting */
570 /* [7:4] LVDS driver bias current 75% (250mV swing) */
571 0x04 0x00 0xb0
572 /* [7:6] Right-bar GPIO output strength is 8mA */
573 0x04 0x15 0x40
574 /* EQ Training State Machine Setting */
575 0x04 0x54 0x10 /* RCO calibration start */
576 /* [4:0] MAX_LANE_COUNT set to one lane */
577 0x01 0x02 0x81
578 /* [4:0] LANE_COUNT_SET set to one lane */
579 0x01 0x21 0x81
580 0x00 0x52 0x20
581 0x00 0xf1 0x03 /* HPD CP toggle enable */
582 0x00 0x62 0x41
583 /* Counter number add 1ms counter delay */
584 0x00 0xf6 0x01
585 /*
586 * [6]PWM function control by DPCD0040f[7], default
587 * is PWM block always works
588 */
589 0x00 0x77 0x06
590 0x00 0x4c 0x04
591 /*
592 * 04h Adjust VTotal tolerance to fix the 30Hz no-
593 * display issue
594 * DPCD00400='h00 Parade OUI = 'h001cf8
595 */
596 0x01 0xc0 0x00
597 0x01 0xc1 0x1c /* DPCD00401='h1c */
598 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
599 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
600 0x01 0xc3 0x44
601 0x01 0xc4 0x32 /* DPCD404 */
602 0x01 0xc5 0x53 /* DPCD405 */
603 0x01 0xc6 0x4c /* DPCD406 */
604 0x01 0xc7 0x56 /* DPCD407 */
605 0x01 0xc8 0x35 /* DPCD408 */
606 /* DPCD40A Initial Code major revision '01' */
607 0x01 0xca 0x01
608 /* DPCD40B Initial Code minor revision '05' */
609 0x01 0xcb 0x05
610 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
611 /*
612 * 0xff for 100% PWM of brightness, 0h for 0% brightness
613 */
614 0x01 0xa7 0x00
615 /*
616 * Set LVDS output as 6bit-VESA mapping, single LVDS
617 * channel
618 */
619 0x01 0xcc 0x13
620 0x02 0xb1 0x20 /* Enable SSC set by register */
621 /* Set SSC enabled and +/-1% central spreading */
622 0x04 0x10 0x16
623 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
624 0x04 0x54 0x14 /* LC -> RCO */
625 0x02 0xa1 0x91>; /* HPD high */
Simon Glass67063672016-02-21 21:08:58 -0700626 ports {
627 port@0 {
628 bridge_out: endpoint {
629 remote-endpoint = <&panel_in>;
630 };
631 };
632
633 port@1 {
634 bridge_in: endpoint {
635 remote-endpoint = <&dp_out>;
636 };
637 };
638 };
Simon Glassb1398362015-08-03 08:19:37 -0600639 };
640
Simon Glass38d0bb32018-12-10 10:37:44 -0700641 max98095: soundcodec@10 {
642 reg = <0x10>;
643 compatible = "maxim,max98095";
644 #sound-dai-cells = <1>;
Simon Glassb1398362015-08-03 08:19:37 -0600645 };
Simon Glass38d0bb32018-12-10 10:37:44 -0700646
647 sound {
648 compatible = "google,spring-audio-max98095";
649
650 samsung,model = "Spring-I2S-MAX98095";
651 samsung,audio-codec = <&max98095>;
652
653 cpu {
654 sound-dai = <&i2s0 0>;
655 };
656
657 codec {
658 sound-dai = <&max98095 0>;
659 };
660 };
661
Simon Glassb1398362015-08-03 08:19:37 -0600662};
663
664#include "cros-ec-keyboard.dtsi"