wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000-2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2002 (440 port) |
| 6 | * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com |
| 7 | * |
wdenk | 544e973 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 8 | * (C) Copyright 2003 (440GX port) |
| 9 | * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com |
| 10 | * |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 11 | * (C) Copyright 2008 (PPC440X05 port for Virtex 5 FX) |
| 12 | * Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es |
| 13 | * Work supported by Qtechnology (htpp://qtec.com) |
| 14 | * |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 15 | * See file CREDITS for list of people who contributed to this |
| 16 | * project. |
| 17 | * |
| 18 | * This program is free software; you can redistribute it and/or |
| 19 | * modify it under the terms of the GNU General Public License as |
| 20 | * published by the Free Software Foundation; either version 2 of |
| 21 | * the License, or (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 31 | * MA 02111-1307 USA |
| 32 | */ |
| 33 | |
| 34 | #include <common.h> |
| 35 | #include <watchdog.h> |
| 36 | #include <command.h> |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 37 | #include <asm/processor.h> |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 38 | #include <asm/interrupt.h> |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 39 | #include <ppc4xx.h> |
| 40 | #include <ppc_asm.tmpl> |
| 41 | #include <commproc.h> |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 42 | |
Stefan Roese | 01edcea | 2008-06-26 13:40:57 +0200 | [diff] [blame] | 43 | DECLARE_GLOBAL_DATA_PTR; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 44 | |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 45 | /* |
| 46 | * CPM interrupt vector functions. |
| 47 | */ |
| 48 | struct irq_action { |
| 49 | interrupt_handler_t *handler; |
| 50 | void *arg; |
| 51 | int count; |
| 52 | }; |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 53 | static struct irq_action irq_vecs[IRQ_MAX]; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 54 | |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 55 | #if defined(CONFIG_440) |
| 56 | |
| 57 | /* SPRN changed in 440 */ |
| 58 | static __inline__ void set_evpr(unsigned long val) |
| 59 | { |
| 60 | asm volatile("mtspr 0x03f,%0" : : "r" (val)); |
| 61 | } |
| 62 | |
| 63 | #else /* !defined(CONFIG_440) */ |
| 64 | |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 65 | static __inline__ void set_pit(unsigned long val) |
| 66 | { |
| 67 | asm volatile("mtpit %0" : : "r" (val)); |
| 68 | } |
| 69 | |
| 70 | |
| 71 | static __inline__ void set_tcr(unsigned long val) |
| 72 | { |
| 73 | asm volatile("mttcr %0" : : "r" (val)); |
| 74 | } |
| 75 | |
| 76 | |
| 77 | static __inline__ void set_evpr(unsigned long val) |
| 78 | { |
| 79 | asm volatile("mtevpr %0" : : "r" (val)); |
| 80 | } |
| 81 | #endif /* defined(CONFIG_440 */ |
| 82 | |
wdenk | c0aa5c5 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 83 | int interrupt_init_cpu (unsigned *decrementer_count) |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 84 | { |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 85 | int vec; |
| 86 | unsigned long val; |
| 87 | |
wdenk | c0aa5c5 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 88 | /* decrementer is automatically reloaded */ |
| 89 | *decrementer_count = 0; |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 90 | |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 91 | /* |
| 92 | * Mark all irqs as free |
| 93 | */ |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 94 | for (vec = 0; vec < IRQ_MAX; vec++) { |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 95 | irq_vecs[vec].handler = NULL; |
| 96 | irq_vecs[vec].arg = NULL; |
| 97 | irq_vecs[vec].count = 0; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | #ifdef CONFIG_4xx |
| 101 | /* |
| 102 | * Init PIT |
| 103 | */ |
| 104 | #if defined(CONFIG_440) |
Matthias Fuchs | 730b2d2 | 2009-07-22 17:27:56 +0200 | [diff] [blame] | 105 | val = mfspr( SPRN_TCR ); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 106 | val &= (~0x04400000); /* clear DIS & ARE */ |
Matthias Fuchs | 730b2d2 | 2009-07-22 17:27:56 +0200 | [diff] [blame] | 107 | mtspr( SPRN_TCR, val ); |
| 108 | mtspr( SPRN_DEC, 0 ); /* Prevent exception after TSR clear*/ |
| 109 | mtspr( SPRN_DECAR, 0 ); /* clear reload */ |
| 110 | mtspr( SPRN_TSR, 0x08000000 ); /* clear DEC status */ |
stroese | 4b31de8 | 2005-04-07 05:32:44 +0000 | [diff] [blame] | 111 | val = gd->bd->bi_intfreq/1000; /* 1 msec */ |
Matthias Fuchs | 730b2d2 | 2009-07-22 17:27:56 +0200 | [diff] [blame] | 112 | mtspr( SPRN_DECAR, val ); /* Set auto-reload value */ |
| 113 | mtspr( SPRN_DEC, val ); /* Set inital val */ |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 114 | #else |
| 115 | set_pit(gd->bd->bi_intfreq / 1000); |
| 116 | #endif |
| 117 | #endif /* CONFIG_4xx */ |
| 118 | |
| 119 | #ifdef CONFIG_ADCIOP |
| 120 | /* |
| 121 | * Init PIT |
| 122 | */ |
| 123 | set_pit(66000); |
| 124 | #endif |
| 125 | |
| 126 | /* |
| 127 | * Enable PIT |
| 128 | */ |
Matthias Fuchs | 730b2d2 | 2009-07-22 17:27:56 +0200 | [diff] [blame] | 129 | val = mfspr(SPRN_TCR); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 130 | val |= 0x04400000; |
Matthias Fuchs | 730b2d2 | 2009-07-22 17:27:56 +0200 | [diff] [blame] | 131 | mtspr(SPRN_TCR, val); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 132 | |
| 133 | /* |
| 134 | * Set EVPR to 0 |
| 135 | */ |
| 136 | set_evpr(0x00000000); |
| 137 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 138 | /* |
Stefan Roese | 1fbbe60 | 2008-07-18 12:24:41 +0200 | [diff] [blame] | 139 | * Call uic or xilinx_irq pic_enable |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 140 | */ |
| 141 | pic_enable(); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 142 | |
| 143 | return (0); |
| 144 | } |
| 145 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 146 | void timer_interrupt_cpu(struct pt_regs *regs) |
wdenk | 544e973 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 147 | { |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 148 | /* nothing to do here */ |
| 149 | return; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 150 | } |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 151 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 152 | void interrupt_run_handler(int vec) |
wdenk | 544e973 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 153 | { |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 154 | irq_vecs[vec].count++; |
wdenk | 544e973 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 155 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 156 | if (irq_vecs[vec].handler != NULL) { |
| 157 | /* call isr */ |
| 158 | (*irq_vecs[vec].handler) (irq_vecs[vec].arg); |
| 159 | } else { |
| 160 | pic_irq_disable(vec); |
| 161 | printf("Masking bogus interrupt vector %d\n", vec); |
| 162 | } |
Marian Balakowicz | 49d0eee | 2006-06-30 16:30:46 +0200 | [diff] [blame] | 163 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 164 | pic_irq_ack(vec); |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 165 | return; |
Marian Balakowicz | 49d0eee | 2006-06-30 16:30:46 +0200 | [diff] [blame] | 166 | } |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 167 | |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 168 | void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg) |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 169 | { |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 170 | /* |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 171 | * Print warning when replacing with a different irq vector |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 172 | */ |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 173 | if ((irq_vecs[vec].handler != NULL) && (irq_vecs[vec].handler != handler)) { |
| 174 | printf("Interrupt vector %d: handler 0x%x replacing 0x%x\n", |
| 175 | vec, (uint) handler, (uint) irq_vecs[vec].handler); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 176 | } |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 177 | irq_vecs[vec].handler = handler; |
| 178 | irq_vecs[vec].arg = arg; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 179 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 180 | pic_irq_enable(vec); |
| 181 | return; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 182 | } |
| 183 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 184 | void irq_free_handler(int vec) |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 185 | { |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 186 | debug("Free interrupt for vector %d ==> %p\n", |
| 187 | vec, irq_vecs[vec].handler); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 188 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 189 | pic_irq_disable(vec); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 190 | |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 191 | irq_vecs[vec].handler = NULL; |
| 192 | irq_vecs[vec].arg = NULL; |
wdenk | c0aa5c5 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 193 | return; |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 194 | } |
| 195 | |
Jon Loeliger | a521774 | 2007-07-09 18:57:22 -0500 | [diff] [blame] | 196 | #if defined(CONFIG_CMD_IRQ) |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 197 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 198 | { |
| 199 | int vec; |
| 200 | |
Stefan Roese | e479012 | 2008-02-19 22:07:57 +0100 | [diff] [blame] | 201 | printf ("Interrupt-Information:\n"); |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 202 | printf ("Nr Routine Arg Count\n"); |
| 203 | |
Ricardo Ribalda Delgado | 95c5020 | 2008-07-17 11:44:12 +0200 | [diff] [blame] | 204 | for (vec = 0; vec < IRQ_MAX; vec++) { |
wdenk | f780aa2 | 2002-09-18 19:21:21 +0000 | [diff] [blame] | 205 | if (irq_vecs[vec].handler != NULL) { |
| 206 | printf ("%02d %08lx %08lx %d\n", |
| 207 | vec, |
| 208 | (ulong)irq_vecs[vec].handler, |
| 209 | (ulong)irq_vecs[vec].arg, |
| 210 | irq_vecs[vec].count); |
| 211 | } |
| 212 | } |
| 213 | |
wdenk | 544e973 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 214 | return 0; |
| 215 | } |
Jon Loeliger | a521774 | 2007-07-09 18:57:22 -0500 | [diff] [blame] | 216 | #endif |