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Alessandro Rubinibb930d12009-01-24 18:10:37 +01001/*
2 * (C) Copyright 2005
3 * STMicrolelctronics, <www.st.com>
4 *
5 * (C) Copyright 2004
6 * ARM Ltd.
7 * Philippe Robin, <philippe.robin@arm.com>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <asm/io.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33#ifdef CONFIG_SHOW_BOOT_PROGRESS
34void show_boot_progress(int progress)
35{
36 printf("%i\n", progress);
37}
38#endif
39
40/*
41 * Miscellaneous platform dependent initialisations
42 */
43int board_init(void)
44{
45 gd->bd->bi_arch_number = MACH_TYPE_NOMADIK;
46 gd->bd->bi_boot_params = 0x00000100;
47 writel(0xC37800F0, NOMADIK_GPIO1_BASE + 0x20);
48 writel(0x00000000, NOMADIK_GPIO1_BASE + 0x24);
49 writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28);
50 writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE);
51
Alessandro Rubinic2be3a92009-02-09 15:53:33 +010052 /* Set up SMCS1 for Ethernet: sram-like, enabled, timing values */
53 writel(0x0000305b, REG_FSMC_BCR1);
54 writel(0x00033f33, REG_FSMC_BTR1);
Alessandro Rubinibb930d12009-01-24 18:10:37 +010055
Alessandro Rubinic2be3a92009-02-09 15:53:33 +010056 icache_enable();
Alessandro Rubinibb930d12009-01-24 18:10:37 +010057 return 0;
58}
59
60int misc_init_r(void)
61{
62 setenv("verify", "n");
63 return 0;
64}
65
66int dram_init(void)
67{
68 /* set dram bank start addr and size */
69 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
70 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
71
72 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
73 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
74 return 0;
75}