Mike Frysinger | eee1695 | 2008-10-06 03:31:52 -0400 | [diff] [blame] | 1 | /* |
Bin Meng | 7557405 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 2 | * U-Boot - cmd_cache_dump.c |
Mike Frysinger | eee1695 | 2008-10-06 03:31:52 -0400 | [diff] [blame] | 3 | * |
| 4 | * Copyright (c) 2007-2008 Analog Devices Inc. |
| 5 | * |
| 6 | * Licensed under the GPL-2 or later. |
| 7 | */ |
| 8 | |
| 9 | #include <config.h> |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 12 | #include <console.h> |
Mike Frysinger | eee1695 | 2008-10-06 03:31:52 -0400 | [diff] [blame] | 13 | |
| 14 | #include <asm/blackfin.h> |
| 15 | #include <asm/mach-common/bits/mpu.h> |
| 16 | |
| 17 | static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end) |
| 18 | { |
| 19 | if (start >= start_limit && start <= end_limit && \ |
| 20 | end <= end_limit && end >= start_limit && \ |
| 21 | start <= end) |
| 22 | return 0; |
| 23 | |
| 24 | printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n", |
| 25 | type, start_limit, start, end, end_limit); |
| 26 | return 1; |
| 27 | } |
| 28 | |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 29 | int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
Mike Frysinger | eee1695 | 2008-10-06 03:31:52 -0400 | [diff] [blame] | 30 | { |
| 31 | int cache_status = icache_status(); |
| 32 | |
| 33 | if (cache_status) |
| 34 | icache_disable(); |
| 35 | |
| 36 | uint32_t cmd_base, tag, cache_upper, cache_lower; |
| 37 | |
| 38 | size_t way, way_start = 0, way_end = 3; |
| 39 | size_t sbnk, sbnk_start = 0, sbnk_end = 3; |
| 40 | size_t set, set_start = 0, set_end = 31; |
| 41 | size_t dw; |
| 42 | |
| 43 | if (argc > 1) { |
| 44 | way_start = way_end = simple_strtoul(argv[1], NULL, 10); |
| 45 | if (argc > 2) { |
| 46 | sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10); |
| 47 | if (argc > 3) |
| 48 | set_start = set_end = simple_strtoul(argv[3], NULL, 10); |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | if (check_limit("way", 0, 3, way_start, way_end) || \ |
| 53 | check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \ |
| 54 | check_limit("set", 0, 31, set_start, set_end)) |
| 55 | return 1; |
| 56 | |
| 57 | puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n"); |
| 58 | |
| 59 | for (way = way_start; way <= way_end; ++way) { |
| 60 | for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) { |
| 61 | for (set = set_start; set <= set_end; ++set) { |
| 62 | printf("%zu:%zu:%2zu: ", way, sbnk, set); |
| 63 | for (dw = 0; dw < 4; ++dw) { |
| 64 | if (ctrlc()) |
| 65 | return 1; |
| 66 | |
| 67 | cmd_base = \ |
| 68 | (way << 26) | \ |
| 69 | (sbnk << 16) | \ |
| 70 | (set << 5) | \ |
| 71 | (dw << 3); |
| 72 | |
| 73 | /* first read the tag */ |
| 74 | bfin_write_ITEST_COMMAND(cmd_base | 0x0); |
| 75 | SSYNC(); |
| 76 | tag = bfin_read_ITEST_DATA0(); |
| 77 | printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag); |
| 78 | |
| 79 | /* grab the data at this loc */ |
| 80 | bfin_write_ITEST_COMMAND(cmd_base | 0x4); |
| 81 | SSYNC(); |
| 82 | cache_lower = bfin_read_ITEST_DATA0(); |
| 83 | cache_upper = bfin_read_ITEST_DATA1(); |
| 84 | printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}')); |
| 85 | } |
| 86 | puts("\n"); |
| 87 | } |
| 88 | } |
| 89 | } |
| 90 | |
| 91 | if (cache_status) |
| 92 | icache_enable(); |
| 93 | |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump, |
| 98 | "icache_dump - dump current instruction cache\n", |
| 99 | "[way] [subbank] [set]"); |
| 100 | |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 101 | int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
Mike Frysinger | eee1695 | 2008-10-06 03:31:52 -0400 | [diff] [blame] | 102 | { |
| 103 | u32 way, bank, subbank, set; |
| 104 | u32 status, addr; |
| 105 | u32 dmem_ctl = bfin_read_DMEM_CONTROL(); |
| 106 | |
| 107 | for (bank = 0; bank < 2; ++bank) { |
| 108 | if (!(dmem_ctl & (1 << (DMC1_P - bank)))) |
| 109 | continue; |
| 110 | |
| 111 | for (way = 0; way < 2; ++way) |
| 112 | for (subbank = 0; subbank < 4; ++subbank) { |
| 113 | printf("%i:%i:%i:\t", bank, way, subbank); |
| 114 | for (set = 0; set < 64; ++set) { |
| 115 | |
| 116 | if (ctrlc()) |
| 117 | return 1; |
| 118 | |
| 119 | /* retrieve a cache tag */ |
| 120 | bfin_write_DTEST_COMMAND( |
| 121 | way << 26 | |
| 122 | bank << 23 | |
| 123 | subbank << 16 | |
| 124 | set << 5 |
| 125 | ); |
| 126 | CSYNC(); |
| 127 | status = bfin_read_DTEST_DATA0(); |
| 128 | |
| 129 | /* construct the address using the tag */ |
| 130 | addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5); |
| 131 | |
| 132 | /* show it */ |
| 133 | if (set && !(set % 4)) |
| 134 | puts("\n\t"); |
| 135 | printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}')); |
| 136 | } |
| 137 | puts("\n"); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
| 144 | U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump, |
| 145 | "dcache_dump - dump current data cache\n", |
| 146 | "[bank] [way] [subbank] [set]"); |