Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010-2012 |
| 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
Tom Warren | df45095 | 2013-02-26 12:18:48 +0000 | [diff] [blame] | 8 | #ifndef _TEGRA_COMMON_H_ |
| 9 | #define _TEGRA_COMMON_H_ |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 10 | #include <linux/sizes.h> |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 11 | #include <linux/stringify.h> |
| 12 | |
| 13 | /* |
| 14 | * High Level Configuration Options |
| 15 | */ |
| 16 | #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 17 | #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ |
| 18 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 19 | #include <asm/arch/tegra.h> /* get chip and board defs */ |
| 20 | |
Thierry Reding | 2674871 | 2015-07-28 11:35:54 +0200 | [diff] [blame] | 21 | /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ |
| 22 | #ifndef CONFIG_ARM64 |
Rob Herring | 741a0bd | 2013-10-04 10:22:47 -0500 | [diff] [blame] | 23 | #define CONFIG_SYS_TIMER_RATE 1000000 |
| 24 | #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE |
Thierry Reding | 2674871 | 2015-07-28 11:35:54 +0200 | [diff] [blame] | 25 | #endif |
Rob Herring | 741a0bd | 2013-10-04 10:22:47 -0500 | [diff] [blame] | 26 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 27 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 28 | |
| 29 | /* Environment */ |
| 30 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
| 31 | #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ |
| 32 | |
| 33 | /* |
Tom Warren | df45095 | 2013-02-26 12:18:48 +0000 | [diff] [blame] | 34 | * NS16550 Configuration |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 35 | */ |
Thomas Chou | e3b9026 | 2015-11-19 21:48:11 +0800 | [diff] [blame] | 36 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 37 | |
| 38 | /* |
Stephen Warren | 2c0ea60 | 2014-04-18 10:56:11 -0600 | [diff] [blame] | 39 | * Common HW configuration. |
| 40 | * If this varies between SoCs later, move to tegraNN-common.h |
| 41 | * Note: This is number of devices, not max device ID. |
| 42 | */ |
| 43 | #define CONFIG_SYS_MMC_MAX_DEVICE 4 |
| 44 | |
| 45 | /* |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 46 | * select serial console configuration |
| 47 | */ |
| 48 | #define CONFIG_CONS_INDEX 1 |
| 49 | |
| 50 | /* allow to overwrite serial and ethaddr */ |
| 51 | #define CONFIG_ENV_OVERWRITE |
| 52 | #define CONFIG_BAUDRATE 115200 |
| 53 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 54 | /* turn on command-line edit/hist/auto */ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 55 | #define CONFIG_COMMAND_HISTORY |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 56 | |
Stephen Warren | de5d70b | 2013-02-28 15:03:48 +0000 | [diff] [blame] | 57 | /* turn on commonly used storage-related commands */ |
Stephen Warren | de5d70b | 2013-02-28 15:03:48 +0000 | [diff] [blame] | 58 | #define CONFIG_PARTITION_UUIDS |
Stephen Warren | de5d70b | 2013-02-28 15:03:48 +0000 | [diff] [blame] | 59 | #define CONFIG_CMD_PART |
| 60 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 61 | #define CONFIG_SYS_NO_FLASH |
| 62 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 63 | /* |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 64 | * Increasing the size of the IO buffer as default nfsargs size is more |
| 65 | * than 256 and so it is not possible to edit it |
| 66 | */ |
Bryan Wu | b644fad | 2016-09-01 23:49:57 +0000 | [diff] [blame] | 67 | #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 68 | /* Print Buffer Size */ |
| 69 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 70 | sizeof(CONFIG_SYS_PROMPT) + 16) |
Bryan Wu | b644fad | 2016-09-01 23:49:57 +0000 | [diff] [blame] | 71 | #define CONFIG_SYS_MAXARGS 64 /* max number of command args */ |
| 72 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 73 | /* Boot Argument Buffer Size */ |
| 74 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 75 | |
| 76 | #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) |
| 77 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) |
| 78 | |
Thierry Reding | 1b9cff6 | 2015-07-27 11:45:26 -0600 | [diff] [blame] | 79 | #ifndef CONFIG_ARM64 |
Simon Glass | 339fc55 | 2014-11-10 17:16:42 -0700 | [diff] [blame] | 80 | #ifndef CONFIG_SPL_BUILD |
Marcel Ziswiler | 0a112e3 | 2014-08-26 11:49:46 +0200 | [diff] [blame] | 81 | #define CONFIG_USE_ARCH_MEMCPY |
Simon Glass | 339fc55 | 2014-11-10 17:16:42 -0700 | [diff] [blame] | 82 | #endif |
Thierry Reding | 1b9cff6 | 2015-07-27 11:45:26 -0600 | [diff] [blame] | 83 | #endif |
Marcel Ziswiler | 0a112e3 | 2014-08-26 11:49:46 +0200 | [diff] [blame] | 84 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 85 | /*----------------------------------------------------------------------- |
| 86 | * Physical Memory Map |
| 87 | */ |
Stephen Warren | 3ffd090 | 2015-08-07 16:12:45 -0600 | [diff] [blame] | 88 | #define CONFIG_NR_DRAM_BANKS 2 |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 89 | #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 |
| 90 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ |
| 91 | |
| 92 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
| 93 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 94 | |
| 95 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ |
| 96 | |
| 97 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE |
| 98 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN |
| 99 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 100 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 101 | GENERATED_GBL_DATA_SIZE) |
| 102 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 103 | #define CONFIG_CMD_ENTERRCM |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 104 | |
| 105 | /* Defines for SPL */ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 106 | #define CONFIG_SPL_FRAMEWORK |
| 107 | #define CONFIG_SPL_RAM_DEVICE |
| 108 | #define CONFIG_SPL_BOARD_INIT |
| 109 | #define CONFIG_SPL_NAND_SIMPLE |
Albert ARIBAUD | e916e05 | 2013-04-12 05:14:30 +0000 | [diff] [blame] | 110 | #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 111 | CONFIG_SPL_TEXT_BASE) |
| 112 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 |
| 113 | |
Stephen Warren | 4f083fe | 2015-01-19 16:25:51 -0700 | [diff] [blame] | 114 | #define CONFIG_BOARD_EARLY_INIT_F |
| 115 | #define CONFIG_BOARD_LATE_INIT |
Tom Warren | 88efe70 | 2013-03-26 10:39:33 -0700 | [diff] [blame] | 116 | |
Stephen Warren | 4b1f4b7 | 2013-02-28 15:03:45 +0000 | [diff] [blame] | 117 | /* Misc utility code */ |
| 118 | #define CONFIG_BOUNCE_BUFFER |
Tom Warren | 88efe70 | 2013-03-26 10:39:33 -0700 | [diff] [blame] | 119 | #define CONFIG_CRC32_VERIFY |
Simon Glass | fadd5ab | 2013-03-05 14:39:56 +0000 | [diff] [blame] | 120 | |
Stephen Warren | 848804f | 2014-02-05 09:24:57 -0700 | [diff] [blame] | 121 | #ifndef CONFIG_SPL_BUILD |
| 122 | #include <config_distro_defaults.h> |
Stephen Warren | 8ce7008 | 2015-09-04 22:03:50 -0600 | [diff] [blame] | 123 | #define CONFIG_FAT_WRITE |
Stephen Warren | 848804f | 2014-02-05 09:24:57 -0700 | [diff] [blame] | 124 | #endif |
| 125 | |
Tom Warren | 23d7fe9 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 126 | #endif /* _TEGRA_COMMON_H_ */ |