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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chou7b059dc2015-10-30 15:35:52 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chou7b059dc2015-10-30 15:35:52 +08004 */
5
Thomas Chou7b059dc2015-10-30 15:35:52 +08006#include <dm.h>
7#include <timer.h>
8#include <dm/test.h>
Sean Anderson79d3bba2020-09-28 10:52:23 -04009#include <dm/device-internal.h>
Simon Glass75c4d412020-07-19 10:15:37 -060010#include <test/test.h>
Thomas Chou7b059dc2015-10-30 15:35:52 +080011#include <test/ut.h>
Sean Anderson79d3bba2020-09-28 10:52:23 -040012#include <asm/cpu.h>
Thomas Chou7b059dc2015-10-30 15:35:52 +080013
Thomas Chou7b059dc2015-10-30 15:35:52 +080014/*
15 * Basic test of the timer uclass.
16 */
17static int dm_test_timer_base(struct unit_test_state *uts)
18{
19 struct udevice *dev;
20
Sean Anderson79d3bba2020-09-28 10:52:23 -040021 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@0", &dev));
Thomas Chou7b059dc2015-10-30 15:35:52 +080022 ut_asserteq(1000000, timer_get_rate(dev));
23
24 return 0;
25}
Simon Glass974dccd2020-07-28 19:41:12 -060026DM_TEST(dm_test_timer_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Sean Anderson79d3bba2020-09-28 10:52:23 -040027
28/*
29 * Test of timebase fallback
30 */
31static int dm_test_timer_timebase_fallback(struct unit_test_state *uts)
32{
33 struct udevice *dev;
34
Heinrich Schuchardt20f9d3d2021-08-28 11:42:08 +020035 cpu_sandbox_set_current("cpu@1");
Sean Anderson79d3bba2020-09-28 10:52:23 -040036 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
37 ut_asserteq(3000000, timer_get_rate(dev));
38 ut_assertok(device_remove(dev, DM_REMOVE_NORMAL));
39
Heinrich Schuchardt20f9d3d2021-08-28 11:42:08 +020040 cpu_sandbox_set_current("cpu@2");
Sean Anderson79d3bba2020-09-28 10:52:23 -040041 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
42 ut_asserteq(2000000, timer_get_rate(dev));
43
Heinrich Schuchardt20f9d3d2021-08-28 11:42:08 +020044 cpu_sandbox_set_current("cpu@1");
Sean Anderson79d3bba2020-09-28 10:52:23 -040045
46 return 0;
47}
48DM_TEST(dm_test_timer_timebase_fallback,
49 UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);