blob: e4de002d6903201fc17127c23307d331e93d6766 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Hisilicon System Reset Controller
8
9maintainers:
10 - Wei Xu <xuwei5@hisilicon.com>
11
12description: |
13 Please also refer to reset.txt in this directory for common reset
14 controller binding usage.
15 The reset controller registers are part of the system-ctl block on
16 hi3660 and hi3670 SoCs.
17
18properties:
19 compatible:
20 oneOf:
21 - items:
22 - const: hisilicon,hi3660-reset
23 - items:
24 - const: hisilicon,hi3670-reset
25 - const: hisilicon,hi3660-reset
26
27 hisi,rst-syscon:
28 deprecated: true
29 description: phandle of the reset's syscon, use hisilicon,rst-syscon instead
30 $ref: /schemas/types.yaml#/definitions/phandle
31
32 hisilicon,rst-syscon:
33 description: phandle of the reset's syscon.
34 $ref: /schemas/types.yaml#/definitions/phandle
35
36 '#reset-cells':
37 description: |
38 Specifies the number of cells needed to encode a reset source.
39 Cell #1 : offset of the reset assert control register from the syscon
40 register base
41 offset + 4: deassert control register
42 offset + 8: status control register
43 Cell #2 : bit position of the reset in the reset control register
44 const: 2
45
46required:
47 - compatible
48
49additionalProperties: false
50
51examples:
52 - |
Tom Rini93743d22024-04-01 09:08:13 -040053 iomcu_rst_controller {
Tom Rini53633a82024-02-29 12:33:36 -050054 compatible = "hisilicon,hi3660-reset";
55 hisilicon,rst-syscon = <&iomcu>;
56 #reset-cells = <2>;
57 };
Tom Rini53633a82024-02-29 12:33:36 -050058...