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Tom Rini53633a82024-02-29 12:33:36 -05001* Spreadtrum Pin Controller
2
3The Spreadtrum pin controller are organized in 3 blocks (types).
4
5The first block comprises some global control registers, and each
6register contains several bit fields with one bit or several bits
7to configure for some global common configuration, such as domain
8pad driving level, system control select and so on ("domain pad
9driving level": One pin can output 3.0v or 1.8v, depending on the
10related domain pad driving selection, if the related domain pad
11select 3.0v, then the pin can output 3.0v. "system control" is used
12to choose one function (like: UART0) for which system, since we
13have several systems (AP/CP/CM4) on one SoC.).
14
15There are too much various configuration that we can not list all
16of them, so we can not make every Spreadtrum-special configuration
17as one generic configuration, and maybe it will add more strange
18global configuration in future. Then we add one "sprd,control" to
19set these various global control configuration, and we need use
20magic number for this property.
21
22Moreover we recognise every fields comprising one bit or several
23bits in one global control register as one pin, thus we should
24record every pin's bit offset, bit width and register offset to
25configure this field (pin).
26
27The second block comprises some common registers which have unified
28register definition, and each register described one pin is used
29to configure the pin sleep mode, function select and sleep related
30configuration.
31
32Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
33PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
34related configuration are:
35- input-enable
36- input-disable
37- output-high
38- output-low
39- bias-pull-up
40- bias-pull-down
41
42In some situation we need set the pin sleep mode and pin sleep related
43configuration, to set the pin sleep related configuration automatically
44by hardware when the system specified by sleep mode goes into deep
45sleep mode. For example, if we set the pin sleep mode as PUBCP_SLEEP
46and set the pin sleep related configuration as "input-enable", which
47means when PUBCP system goes into deep sleep mode, this pin will be set
48input enable automatically.
49
50Moreover we can not use the "sleep" state, since some systems (like:
51PUBCP system) do not run linux kernel OS (only AP system run linux
52kernel on SC9860 platform), then we can not select "sleep" state
53when the PUBCP system goes into deep sleep mode. Thus we introduce
54"sprd,sleep-mode" property to set pin sleep mode.
55
56The last block comprises some misc registers which also have unified
57register definition, and each register described one pin is used to
58configure drive strength, pull up/down and so on. Especially for pull
59up, we have two kind pull up resistor: 20K and 4.7K.
60
61Required properties for Spreadtrum pin controller:
62- compatible: "sprd,<soc>-pinctrl"
63 Please refer to each sprd,<soc>-pinctrl.txt binding doc for supported SoCs.
64- reg: The register address of pin controller device.
65- pins : An array of pin names.
66
67Optional properties:
68- function: Specified the function name.
69- drive-strength: Drive strength in mA.
70- input-schmitt-disable: Enable schmitt-trigger mode.
71- input-schmitt-enable: Disable schmitt-trigger mode.
72- bias-disable: Disable pin bias.
73- bias-pull-down: Pull down on pin.
74- bias-pull-up: Pull up on pin.
75- input-enable: Enable pin input.
76- input-disable: Enable pin output.
77- output-high: Set the pin as an output level high.
78- output-low: Set the pin as an output level low.
79- sleep-hardware-state: Indicate these configs in this state are sleep related.
80- sprd,control: Control values referring to databook for global control pins.
81- sprd,sleep-mode: Sleep mode selection.
82
83Please refer to each sprd,<soc>-pinctrl.txt binding doc for supported values.