| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Aspeed PECI Bus |
| 8 | |
| 9 | maintainers: |
| 10 | - Iwona Winiarska <iwona.winiarska@intel.com> |
| 11 | - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> |
| 12 | |
| 13 | allOf: |
| 14 | - $ref: peci-controller.yaml# |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - aspeed,ast2400-peci |
| 20 | - aspeed,ast2500-peci |
| 21 | - aspeed,ast2600-peci |
| 22 | |
| 23 | reg: |
| 24 | maxItems: 1 |
| 25 | |
| 26 | interrupts: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | clocks: |
| 30 | description: |
| 31 | Clock source for PECI controller. Should reference the external |
| 32 | oscillator clock. |
| 33 | maxItems: 1 |
| 34 | |
| 35 | resets: |
| 36 | maxItems: 1 |
| 37 | |
| 38 | cmd-timeout-ms: |
| 39 | minimum: 1 |
| 40 | maximum: 1000 |
| 41 | default: 1000 |
| 42 | |
| 43 | clock-frequency: |
| 44 | description: |
| 45 | The desired operation frequency of PECI controller in Hz. |
| 46 | minimum: 2000 |
| 47 | maximum: 2000000 |
| 48 | default: 1000000 |
| 49 | |
| 50 | required: |
| 51 | - compatible |
| 52 | - reg |
| 53 | - interrupts |
| 54 | - clocks |
| 55 | - resets |
| 56 | |
| 57 | additionalProperties: false |
| 58 | |
| 59 | examples: |
| 60 | - | |
| 61 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 62 | #include <dt-bindings/clock/ast2600-clock.h> |
| 63 | peci-controller@1e78b000 { |
| 64 | compatible = "aspeed,ast2600-peci"; |
| 65 | reg = <0x1e78b000 0x100>; |
| 66 | interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
| 67 | clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; |
| 68 | resets = <&syscon ASPEED_RESET_PECI>; |
| 69 | cmd-timeout-ms = <1000>; |
| 70 | clock-frequency = <1000000>; |
| 71 | }; |
| 72 | ... |