Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/media/nxp,dw100.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NXP i.MX8MP DW100 Dewarper core |
| 8 | |
| 9 | maintainers: |
| 10 | - Xavier Roumegue <xavier.roumegue@oss.nxp.com> |
| 11 | |
| 12 | description: |- |
| 13 | The Dewarp Engine provides high-performance dewarp processing for the |
| 14 | correction of the distortion that is introduced in images produced by fisheye |
| 15 | and wide angle lenses. It is implemented with a line/tile-cache based |
| 16 | architecture. With configurable address mapping look up tables and per tile |
| 17 | processing, it successfully generates a corrected output image. |
| 18 | The engine can be used to perform scaling, cropping and pixel format |
| 19 | conversion. |
| 20 | |
| 21 | properties: |
| 22 | compatible: |
| 23 | enum: |
| 24 | - nxp,imx8mp-dw100 |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | interrupts: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | clocks: |
| 33 | items: |
| 34 | - description: The AXI clock |
| 35 | - description: The AHB clock |
| 36 | |
| 37 | clock-names: |
| 38 | items: |
| 39 | - const: axi |
| 40 | - const: ahb |
| 41 | |
| 42 | power-domains: |
| 43 | maxItems: 1 |
| 44 | |
| 45 | required: |
| 46 | - compatible |
| 47 | - reg |
| 48 | - interrupts |
| 49 | - clocks |
| 50 | - clock-names |
| 51 | - power-domains |
| 52 | |
| 53 | additionalProperties: false |
| 54 | |
| 55 | examples: |
| 56 | - | |
| 57 | #include <dt-bindings/clock/imx8mp-clock.h> |
| 58 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 59 | #include <dt-bindings/power/imx8mp-power.h> |
| 60 | |
| 61 | dewarp: dwe@32e30000 { |
| 62 | compatible = "nxp,imx8mp-dw100"; |
| 63 | reg = <0x32e30000 0x10000>; |
| 64 | interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; |
| 65 | clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, |
| 66 | <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; |
| 67 | clock-names = "axi", "ahb"; |
| 68 | power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; |
| 69 | }; |