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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos5260-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos5260 SoC clock controller
8
9maintainers:
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
14
15description: |
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
17 name::
18 - "fin_pll" - PLL input clock from XXTI
19 - "xrtcxti" - input clock from XRTCXTI
20 - "ioclk_pcm_extclk" - pcm external operation clock
21 - "ioclk_spdif_extclk" - spdif external operation clock
22 - "ioclk_i2s_cdclk" - i2s0 codec clock
23
24 Phy clocks::
25 There are several clocks which are generated by specific PHYs. These clocks
26 are fed into the clock controller and then routed to the hardware blocks.
27 These clocks are defined as fixed clocks in the driver with following names::
28 - "phyclk_dptx_phy_ch3_txd_clk" - dp phy clock for channel 3
29 - "phyclk_dptx_phy_ch2_txd_clk" - dp phy clock for channel 2
30 - "phyclk_dptx_phy_ch1_txd_clk" - dp phy clock for channel 1
31 - "phyclk_dptx_phy_ch0_txd_clk" - dp phy clock for channel 0
32 - "phyclk_hdmi_phy_tmds_clko" - hdmi phy tmds clock
33 - "phyclk_hdmi_phy_pixel_clko" - hdmi phy pixel clock
34 - "phyclk_hdmi_link_o_tmds_clkhi" - hdmi phy for hdmi link
35 - "phyclk_dptx_phy_o_ref_clk_24m" - dp phy reference clock
36 - "phyclk_dptx_phy_clk_div2"
37 - "phyclk_mipi_dphy_4l_m_rxclkesc0"
38 - "phyclk_usbhost20_phy_phyclock" - usb 2.0 phy clock
39 - "phyclk_usbhost20_phy_freeclk"
40 - "phyclk_usbhost20_phy_clk48mohci"
41 - "phyclk_usbdrd30_udrd30_pipe_pclk"
42 - "phyclk_usbdrd30_udrd30_phyclock" - usb 3.0 phy clock
43
44 All available clocks are defined as preprocessor macros in
45 include/dt-bindings/clock/exynos5260-clk.h header.
46
47properties:
48 compatible:
49 enum:
50 - samsung,exynos5260-clock-top
51 - samsung,exynos5260-clock-peri
52 - samsung,exynos5260-clock-egl
53 - samsung,exynos5260-clock-kfc
54 - samsung,exynos5260-clock-g2d
55 - samsung,exynos5260-clock-mif
56 - samsung,exynos5260-clock-mfc
57 - samsung,exynos5260-clock-g3d
58 - samsung,exynos5260-clock-fsys
59 - samsung,exynos5260-clock-aud
60 - samsung,exynos5260-clock-isp
61 - samsung,exynos5260-clock-gscl
62 - samsung,exynos5260-clock-disp
63
64 clocks:
65 minItems: 1
66 maxItems: 19
67
68 clock-names:
69 minItems: 1
70 maxItems: 19
71
72 "#clock-cells":
73 const: 1
74
75 reg:
76 maxItems: 1
77
78required:
79 - compatible
80 - "#clock-cells"
81 - reg
82
83allOf:
84 - if:
85 properties:
86 compatible:
87 contains:
88 const: samsung,exynos5260-clock-top
89 then:
90 properties:
91 clocks:
92 minItems: 4
93 maxItems: 4
94 clock-names:
95 items:
96 - const: fin_pll
97 - const: dout_mem_pll
98 - const: dout_bus_pll
99 - const: dout_media_pll
100 required:
101 - clock-names
102 - clocks
103
104 - if:
105 properties:
106 compatible:
107 contains:
108 const: samsung,exynos5260-clock-peri
109 then:
110 properties:
111 clocks:
112 minItems: 13
113 maxItems: 13
114 clock-names:
115 items:
116 - const: fin_pll
117 - const: ioclk_pcm_extclk
118 - const: ioclk_i2s_cdclk
119 - const: ioclk_spdif_extclk
120 - const: phyclk_hdmi_phy_ref_cko
121 - const: dout_aclk_peri_66
122 - const: dout_sclk_peri_uart0
123 - const: dout_sclk_peri_uart1
124 - const: dout_sclk_peri_uart2
125 - const: dout_sclk_peri_spi0_b
126 - const: dout_sclk_peri_spi1_b
127 - const: dout_sclk_peri_spi2_b
128 - const: dout_aclk_peri_aud
129 required:
130 - clock-names
131 - clocks
132
133 - if:
134 properties:
135 compatible:
136 contains:
137 const: samsung,exynos5260-clock-egl
138 then:
139 properties:
140 clocks:
141 minItems: 2
142 maxItems: 2
143 clock-names:
144 items:
145 - const: fin_pll
146 - const: dout_bus_pll
147 required:
148 - clock-names
149 - clocks
150
151 - if:
152 properties:
153 compatible:
154 contains:
155 const: samsung,exynos5260-clock-kfc
156 then:
157 properties:
158 clocks:
159 minItems: 2
160 maxItems: 2
161 clock-names:
162 items:
163 - const: fin_pll
164 - const: dout_media_pll
165 required:
166 - clock-names
167 - clocks
168
169 - if:
170 properties:
171 compatible:
172 contains:
173 const: samsung,exynos5260-clock-g2d
174 then:
175 properties:
176 clocks:
177 minItems: 2
178 maxItems: 2
179 clock-names:
180 items:
181 - const: fin_pll
182 - const: dout_aclk_g2d_333
183 required:
184 - clock-names
185 - clocks
186
187 - if:
188 properties:
189 compatible:
190 contains:
191 const: samsung,exynos5260-clock-mif
192 then:
193 properties:
194 clocks:
195 minItems: 1
196 maxItems: 1
197 clock-names:
198 items:
199 - const: fin_pll
200 required:
201 - clock-names
202 - clocks
203
204 - if:
205 properties:
206 compatible:
207 contains:
208 const: samsung,exynos5260-clock-mfc
209 then:
210 properties:
211 clocks:
212 minItems: 2
213 maxItems: 2
214 clock-names:
215 items:
216 - const: fin_pll
217 - const: dout_aclk_mfc_333
218 required:
219 - clock-names
220 - clocks
221
222 - if:
223 properties:
224 compatible:
225 contains:
226 const: samsung,exynos5260-clock-g3d
227 then:
228 properties:
229 clocks:
230 minItems: 1
231 maxItems: 1
232 clock-names:
233 items:
234 - const: fin_pll
235 required:
236 - clock-names
237 - clocks
238
239 - if:
240 properties:
241 compatible:
242 contains:
243 const: samsung,exynos5260-clock-fsys
244 then:
245 properties:
246 clocks:
247 minItems: 7
248 maxItems: 7
249 clock-names:
250 items:
251 - const: fin_pll
252 - const: phyclk_usbhost20_phy_phyclock
253 - const: phyclk_usbhost20_phy_freeclk
254 - const: phyclk_usbhost20_phy_clk48mohci
255 - const: phyclk_usbdrd30_udrd30_pipe_pclk
256 - const: phyclk_usbdrd30_udrd30_phyclock
257 - const: dout_aclk_fsys_200
258 required:
259 - clock-names
260 - clocks
261
262 - if:
263 properties:
264 compatible:
265 contains:
266 const: samsung,exynos5260-clock-aud
267 then:
268 properties:
269 clocks:
270 minItems: 4
271 maxItems: 4
272 clock-names:
273 items:
274 - const: fin_pll
275 - const: fout_aud_pll
276 - const: ioclk_i2s_cdclk
277 - const: ioclk_pcm_extclk
278 required:
279 - clock-names
280 - clocks
281
282 - if:
283 properties:
284 compatible:
285 contains:
286 const: samsung,exynos5260-clock-isp
287 then:
288 properties:
289 clocks:
290 minItems: 4
291 maxItems: 4
292 clock-names:
293 items:
294 - const: fin_pll
295 - const: dout_aclk_isp1_266
296 - const: dout_aclk_isp1_400
297 - const: mout_aclk_isp1_266
298
299 required:
300 - clock-names
301 - clocks
302
303 - if:
304 properties:
305 compatible:
306 contains:
307 const: samsung,exynos5260-clock-gscl
308 then:
309 properties:
310 clocks:
311 minItems: 3
312 maxItems: 3
313 clock-names:
314 items:
315 - const: fin_pll
316 - const: dout_aclk_gscl_400
317 - const: dout_aclk_gscl_333
318 required:
319 - clock-names
320 - clocks
321
322 - if:
323 properties:
324 compatible:
325 contains:
326 const: samsung,exynos5260-clock-disp
327 then:
328 properties:
329 clocks:
330 minItems: 19
331 maxItems: 19
332 clock-names:
333 items:
334 - const: fin_pll
335 - const: phyclk_dptx_phy_ch3_txd_clk
336 - const: phyclk_dptx_phy_ch2_txd_clk
337 - const: phyclk_dptx_phy_ch1_txd_clk
338 - const: phyclk_dptx_phy_ch0_txd_clk
339 - const: phyclk_hdmi_phy_tmds_clko
340 - const: phyclk_hdmi_phy_ref_clko
341 - const: phyclk_hdmi_phy_pixel_clko
342 - const: phyclk_hdmi_link_o_tmds_clkhi
343 - const: phyclk_mipi_dphy_4l_m_txbyte_clkhs
344 - const: phyclk_dptx_phy_o_ref_clk_24m
345 - const: phyclk_dptx_phy_clk_div2
346 - const: phyclk_mipi_dphy_4l_m_rxclkesc0
347 - const: phyclk_hdmi_phy_ref_cko
348 - const: ioclk_spdif_extclk
349 - const: dout_aclk_peri_aud
350 - const: dout_aclk_disp_222
351 - const: dout_sclk_disp_pixel
352 - const: dout_aclk_disp_333
353 required:
354 - clock-names
355 - clocks
356
357additionalProperties: false
358
359examples:
360 - |
361 #include <dt-bindings/clock/exynos5260-clk.h>
362
363 fin_pll: clock {
364 compatible = "fixed-clock";
365 clock-output-names = "fin_pll";
366 #clock-cells = <0>;
367 clock-frequency = <24000000>;
368 };
369
370 clock-controller@10010000 {
371 compatible = "samsung,exynos5260-clock-top";
372 reg = <0x10010000 0x10000>;
373 #clock-cells = <1>;
374 clocks = <&fin_pll>,
375 <&clock_mif MIF_DOUT_MEM_PLL>,
376 <&clock_mif MIF_DOUT_BUS_PLL>,
377 <&clock_mif MIF_DOUT_MEDIA_PLL>;
378 clock-names = "fin_pll",
379 "dout_mem_pll",
380 "dout_bus_pll",
381 "dout_media_pll";
382 };