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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Heiko Schochercfcad352013-12-02 07:47:22 +01002/*
3 * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright Siemens AG
5 *
6 * Based on:
7 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
8 *
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schochercfcad352013-12-02 07:47:22 +010012 */
13
Heiko Schocherb7773572015-08-21 18:53:46 +020014#include <command.h>
Tom Rinidec7ea02024-05-20 13:35:03 -060015#include <config.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020016#include <dm.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060017#include <env.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070018#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060019#include <asm/global_data.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010020#include <asm/io.h>
21#include <asm/arch/at91sam9260_matrix.h>
22#include <asm/arch/at91sam9_smc.h>
23#include <asm/arch/at91_common.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010024#include <asm/arch/at91_rstc.h>
25#include <asm/arch/gpio.h>
26#include <asm/arch/at91sam9_sdramc.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020027#include <asm/arch/atmel_serial.h>
Heiko Schocher5453c6c2014-10-31 08:31:05 +010028#include <asm/arch/clk.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020029#include <asm/gpio.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090030#include <linux/mtd/rawnand.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010031#include <atmel_mci.h>
Heiko Schocher398b45b2014-10-31 08:30:56 +010032#include <asm/arch/at91_spi.h>
33#include <spi.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010034
35#include <net.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020036#ifndef CONFIG_DM_ETH
Heiko Schochercfcad352013-12-02 07:47:22 +010037#include <netdev.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020038#endif
Heiko Schochercfcad352013-12-02 07:47:22 +010039
40DECLARE_GLOBAL_DATA_PTR;
41
Heiko Schocher649d8102016-05-25 07:23:48 +020042static void taurus_request_gpio(void)
43{
Tom Rinib4213492022-11-12 17:36:51 -050044 gpio_request(CFG_SYS_NAND_ENABLE_PIN, "nand ena");
45 gpio_request(CFG_SYS_NAND_READY_PIN, "nand rdy");
Heiko Schocher649d8102016-05-25 07:23:48 +020046 gpio_request(AT91_PIN_PA25, "ena PHY");
47}
48
Heiko Schochercfcad352013-12-02 07:47:22 +010049static void taurus_nand_hw_init(void)
50{
51 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
52 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
53 unsigned long csa;
54
55 /* Assign CS3 to NAND/SmartMedia Interface */
56 csa = readl(&matrix->ebicsa);
57 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
58 writel(csa, &matrix->ebicsa);
59
60 /* Configure SMC CS3 for NAND/SmartMedia */
61 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
62 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
63 &smc->cs[3].setup);
64 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
65 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
66 &smc->cs[3].pulse);
67 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
68 &smc->cs[3].cycle);
69 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
70 AT91_SMC_MODE_EXNW_DISABLE |
71 AT91_SMC_MODE_DBW_8 |
72 AT91_SMC_MODE_TDF_CYCLE(3),
73 &smc->cs[3].mode);
74
75 /* Configure RDY/BSY */
Tom Rinib4213492022-11-12 17:36:51 -050076 at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
Heiko Schochercfcad352013-12-02 07:47:22 +010077
78 /* Enable NandFlash */
Tom Rinib4213492022-11-12 17:36:51 -050079 at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
Heiko Schochercfcad352013-12-02 07:47:22 +010080}
Heiko Schocher5453c6c2014-10-31 08:31:05 +010081
82#if defined(CONFIG_SPL_BUILD)
83#include <spl.h>
84#include <nand.h>
Heiko Schocher6f2a3252014-11-18 09:41:58 +010085#include <spi_flash.h>
Heiko Schocher5453c6c2014-10-31 08:31:05 +010086
87void matrix_init(void)
88{
89 struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
90
91 writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
92 | AT91_MATRIX_SLOT_CYCLE_(0x40),
93 &mat->scfg[3]);
94}
95
Heiko Schocherb7773572015-08-21 18:53:46 +020096#if defined(CONFIG_BOARD_AXM)
97static int at91_is_recovery(void)
98{
99 if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
100 (at91_get_gpio_value(AT91_PIN_PA27) == 0))
101 return 1;
102
103 return 0;
104}
105#elif defined(CONFIG_BOARD_TAURUS)
106static int at91_is_recovery(void)
107{
108 if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
109 return 1;
110
111 return 0;
112}
113#endif
114
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200115void spl_board_init(void)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100116{
117 taurus_nand_hw_init();
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100118 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100119
Heiko Schocherb7773572015-08-21 18:53:46 +0200120#if defined(CONFIG_BOARD_AXM)
121 /* Configure LED PINs */
122 at91_set_gpio_output(AT91_PIN_PA6, 0);
123 at91_set_gpio_output(AT91_PIN_PA8, 0);
124 at91_set_gpio_output(AT91_PIN_PA9, 0);
125 at91_set_gpio_output(AT91_PIN_PA10, 0);
126 at91_set_gpio_output(AT91_PIN_PA11, 0);
127 at91_set_gpio_output(AT91_PIN_PA12, 0);
128
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100129 /* Configure recovery button PINs */
Heiko Schocherb7773572015-08-21 18:53:46 +0200130 at91_set_gpio_input(AT91_PIN_PA26, 1);
131 at91_set_gpio_input(AT91_PIN_PA27, 1);
132#elif defined(CONFIG_BOARD_TAURUS)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100133 at91_set_gpio_input(AT91_PIN_PA31, 1);
Heiko Schocherb7773572015-08-21 18:53:46 +0200134#endif
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100135
Heiko Schocherb7773572015-08-21 18:53:46 +0200136 /* check for recovery mode */
137 if (at91_is_recovery() == 1) {
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100138 struct spi_flash *flash;
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100139
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200140 puts("Recovery button pressed\n");
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100141 nand_init();
142 spl_nand_erase_one(0, 0);
143 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
144 0,
145 CONFIG_SF_DEFAULT_SPEED,
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200146 CONFIG_SF_DEFAULT_MODE);
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100147 if (!flash) {
148 puts("no flash\n");
149 } else {
150 puts("erase spi flash sector 0\n");
151 spi_flash_erase(flash, 0,
Tom Rinib4213492022-11-12 17:36:51 -0500152 CFG_SYS_NAND_U_BOOT_SIZE);
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100153 }
154 }
155}
156
Heiko Schocherb7773572015-08-21 18:53:46 +0200157#define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
158 |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
159 | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
160 | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
161 | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
162
163void sdramc_configure(unsigned int mask)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100164{
165 struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
166 struct sdramc_reg setting;
167
168 at91_sdram_hw_init();
Heiko Schocherb7773572015-08-21 18:53:46 +0200169 setting.cr = SDRAM_BASE_CONF | mask;
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100170 setting.mdr = AT91_SDRAMC_MD_SDRAM;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500171 setting.tr = (CFG_SYS_MASTER_CLOCK * 7) / 1000000;
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100172
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100173 writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
174 AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
175 &ma->ebicsa);
Heiko Schocherb7773572015-08-21 18:53:46 +0200176
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100177 sdramc_initialize(ATMEL_BASE_CS1, &setting);
178}
Heiko Schocherb7773572015-08-21 18:53:46 +0200179
180void mem_init(void)
181{
182 unsigned int ram_size = 0;
183
184 /* Configure SDRAM for 128MB */
185 sdramc_configure(AT91_SDRAMC_NC_10);
186
187 /* Do memtest for 128MB */
Tom Rinibb4dd962022-11-16 13:10:37 -0500188 ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
189 CFG_SYS_SDRAM_SIZE);
Heiko Schocherb7773572015-08-21 18:53:46 +0200190
191 /*
192 * If 32MB or 16MB should be supported check also for
193 * expected mirroring at A16 and A17
194 * To find mirror addresses depends how the collumns are connected
195 * at RAM (internaly or externaly)
196 * If the collumns are not in inverted order the mirror size effect
197 * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
198 */
199
200 /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
201 if (ram_size == 0x800) {
Heiko Schocher1af10bb2019-04-29 16:36:10 +0200202 printf("\n\r 64MB\n");
Heiko Schocherb7773572015-08-21 18:53:46 +0200203 sdramc_configure(AT91_SDRAMC_NC_9);
204 } else {
205 /* Size already initialized */
Heiko Schocher1af10bb2019-04-29 16:36:10 +0200206 printf("\n\r 128MB\n");
Heiko Schocherb7773572015-08-21 18:53:46 +0200207 }
208}
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100209#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100210
211#ifdef CONFIG_MACB
Heiko Schocherb7773572015-08-21 18:53:46 +0200212static void siemens_phy_reset(void)
213{
214 /*
215 * we need to reset PHY for 200us
216 * because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
217 */
218 if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
219 AT91_RSTC_RSTTYP_GENERAL)
220 at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
221}
222
Heiko Schochercfcad352013-12-02 07:47:22 +0100223static void taurus_macb_hw_init(void)
224{
Heiko Schochercfcad352013-12-02 07:47:22 +0100225 /* Enable EMAC clock */
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100226 at91_periph_clk_enable(ATMEL_ID_EMAC0);
Heiko Schochercfcad352013-12-02 07:47:22 +0100227
228 /*
229 * Disable pull-up on:
230 * RXDV (PA17) => PHY normal mode (not Test mode)
231 * ERX0 (PA14) => PHY ADDR0
232 * ERX1 (PA15) => PHY ADDR1
233 * ERX2 (PA25) => PHY ADDR2
234 * ERX3 (PA26) => PHY ADDR3
235 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
236 *
237 * PHY has internal pull-down
238 */
239 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
240 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
241 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
242 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
243 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
244 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
245
Heiko Schocherb7773572015-08-21 18:53:46 +0200246 siemens_phy_reset();
247
Heiko Schochercfcad352013-12-02 07:47:22 +0100248 at91_phy_reset();
249
250 at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
251
252 /* Re-enable pull-up */
253 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
254 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
255 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
256 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
257 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
258 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
259
260 /* Initialize EMAC=MACB hardware */
261 at91_macb_hw_init();
262}
263#endif
264
265#ifdef CONFIG_GENERIC_ATMEL_MCI
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900266int board_mmc_init(struct bd_info *bd)
Heiko Schochercfcad352013-12-02 07:47:22 +0100267{
268 at91_mci_hw_init();
269
270 return atmel_mci_init((void *)ATMEL_BASE_MCI);
271}
272#endif
273
274int board_early_init_f(void)
275{
Heiko Schochercfcad352013-12-02 07:47:22 +0100276 /* Enable clocks for all PIOs */
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100277 at91_periph_clk_enable(ATMEL_ID_PIOA);
278 at91_periph_clk_enable(ATMEL_ID_PIOB);
279 at91_periph_clk_enable(ATMEL_ID_PIOC);
280
281 at91_seriald_hw_init();
Heiko Schocher649d8102016-05-25 07:23:48 +0200282 taurus_request_gpio();
Heiko Schochercfcad352013-12-02 07:47:22 +0100283
284 return 0;
285}
286
Heiko Schochercf5137c2015-09-08 11:52:52 +0200287#ifdef CONFIG_USB_GADGET_AT91
288#include <linux/usb/at91_udc.h>
289
290void at91_udp_hw_init(void)
291{
Heiko Schochercf5137c2015-09-08 11:52:52 +0200292 /* Enable PLLB */
Wenyou Yangc5c6efe2016-02-03 10:20:45 +0800293 at91_pllb_clk_enable(get_pllb_init());
Heiko Schochercf5137c2015-09-08 11:52:52 +0200294
295 /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
296 at91_periph_clk_enable(ATMEL_ID_UDP);
297
Wenyou Yang78f89762016-02-03 10:16:50 +0800298 at91_system_clk_enable(AT91SAM926x_PMC_UDP);
Heiko Schochercf5137c2015-09-08 11:52:52 +0200299}
300
301struct at91_udc_data board_udc_data = {
302 .baseaddr = ATMEL_BASE_UDP0,
303};
304#endif
305
Heiko Schochercfcad352013-12-02 07:47:22 +0100306int board_init(void)
307{
308 /* adress of boot parameters */
Tom Rinibb4dd962022-11-16 13:10:37 -0500309 gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
Heiko Schochercfcad352013-12-02 07:47:22 +0100310
Heiko Schocher649d8102016-05-25 07:23:48 +0200311 taurus_request_gpio();
Heiko Schochercfcad352013-12-02 07:47:22 +0100312#ifdef CONFIG_CMD_NAND
313 taurus_nand_hw_init();
314#endif
315#ifdef CONFIG_MACB
316 taurus_macb_hw_init();
317#endif
Heiko Schocher398b45b2014-10-31 08:30:56 +0100318 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schochercf5137c2015-09-08 11:52:52 +0200319#ifdef CONFIG_USB_GADGET_AT91
320 at91_udp_hw_init();
321 at91_udc_probe(&board_udc_data);
322#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100323
324 return 0;
325}
326
327int dram_init(void)
328{
Tom Rinibb4dd962022-11-16 13:10:37 -0500329 gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
330 CFG_SYS_SDRAM_SIZE);
Heiko Schochercfcad352013-12-02 07:47:22 +0100331 return 0;
332}
Heiko Schocherb7773572015-08-21 18:53:46 +0200333
334#if !defined(CONFIG_SPL_BUILD)
335#if defined(CONFIG_BOARD_AXM)
336/*
337 * Booting the Fallback Image.
338 *
339 * The function is used to provide and
340 * boot the image with the fallback
341 * parameters, incase if the faulty image
342 * in upgraded over the base firmware.
343 *
344 */
345static int upgrade_failure_fallback(void)
346{
347 char *partitionset_active = NULL;
348 char *rootfs = NULL;
349 char *rootfs_fallback = NULL;
350 char *kern_off;
351 char *kern_off_fb;
352 char *kern_size;
353 char *kern_size_fb;
354
Simon Glass64b723f2017-08-03 12:22:12 -0600355 partitionset_active = env_get("partitionset_active");
Heiko Schocherb7773572015-08-21 18:53:46 +0200356 if (partitionset_active) {
357 if (partitionset_active[0] == 'A')
Simon Glass6a38e412017-08-03 12:22:09 -0600358 env_set("partitionset_active", "B");
Heiko Schocherb7773572015-08-21 18:53:46 +0200359 else
Simon Glass6a38e412017-08-03 12:22:09 -0600360 env_set("partitionset_active", "A");
Heiko Schocherb7773572015-08-21 18:53:46 +0200361 } else {
362 printf("partitionset_active missing.\n");
363 return -ENOENT;
364 }
365
Simon Glass64b723f2017-08-03 12:22:12 -0600366 rootfs = env_get("rootfs");
367 rootfs_fallback = env_get("rootfs_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600368 env_set("rootfs", rootfs_fallback);
369 env_set("rootfs_fallback", rootfs);
Heiko Schocherb7773572015-08-21 18:53:46 +0200370
Simon Glass64b723f2017-08-03 12:22:12 -0600371 kern_size = env_get("kernel_size");
372 kern_size_fb = env_get("kernel_size_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600373 env_set("kernel_size", kern_size_fb);
374 env_set("kernel_size_fallback", kern_size);
Heiko Schocherb7773572015-08-21 18:53:46 +0200375
Simon Glass64b723f2017-08-03 12:22:12 -0600376 kern_off = env_get("kernel_Off");
377 kern_off_fb = env_get("kernel_Off_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600378 env_set("kernel_Off", kern_off_fb);
379 env_set("kernel_Off_fallback", kern_off);
Heiko Schocherb7773572015-08-21 18:53:46 +0200380
Simon Glass6a38e412017-08-03 12:22:09 -0600381 env_set("bootargs", '\0');
382 env_set("upgrade_available", '\0');
383 env_set("boot_retries", '\0');
Simon Glassd49b8892017-08-03 12:22:08 -0600384 env_save();
Heiko Schocherb7773572015-08-21 18:53:46 +0200385
386 return 0;
387}
388
Simon Glassed38aef2020-05-10 11:40:03 -0600389static int do_upgrade_available(struct cmd_tbl *cmdtp, int flag, int argc,
390 char *const argv[])
Heiko Schocherb7773572015-08-21 18:53:46 +0200391{
392 unsigned long upgrade_available = 0;
393 unsigned long boot_retry = 0;
394 char boot_buf[10];
395
Simon Glassff9b9032021-07-24 09:03:30 -0600396 upgrade_available = dectoul(env_get("upgrade_available"), NULL);
Heiko Schocherb7773572015-08-21 18:53:46 +0200397 if (upgrade_available) {
Simon Glassff9b9032021-07-24 09:03:30 -0600398 boot_retry = dectoul(env_get("boot_retries"), NULL);
Heiko Schocherb7773572015-08-21 18:53:46 +0200399 boot_retry++;
400 sprintf(boot_buf, "%lx", boot_retry);
Simon Glass6a38e412017-08-03 12:22:09 -0600401 env_set("boot_retries", boot_buf);
Simon Glassd49b8892017-08-03 12:22:08 -0600402 env_save();
Heiko Schocherb7773572015-08-21 18:53:46 +0200403
404 /*
405 * Here the boot_retries count is checked, and if the
406 * count becomes greater than 2 switch back to the
407 * fallback, and reset the board.
408 */
409
410 if (boot_retry > 2) {
411 if (upgrade_failure_fallback() == 0)
412 do_reset(NULL, 0, 0, NULL);
413 return -1;
414 }
415 }
416 return 0;
417}
418
419U_BOOT_CMD(
420 upgrade_available, 1, 1, do_upgrade_available,
421 "check Siemens update",
422 "no parameters"
423);
424#endif
425#endif