blob: 2127257cd431847b5ce81df7eee704e96df92ece [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andy Shevchenko7d2c2012017-04-01 16:21:34 +03002/*
3 * Copyright (c) 2017 Intel Corporation
Andy Shevchenko7d2c2012017-04-01 16:21:34 +03004 */
Andy Shevchenko7d2c2012017-04-01 16:21:34 +03005#include <dm.h>
6#include <regmap.h>
7#include <syscon.h>
8#include <asm/cpu.h>
9#include <asm/pmu.h>
Simon Glassdbd79542020-05-10 11:40:11 -060010#include <linux/delay.h>
Andy Shevchenko7d2c2012017-04-01 16:21:34 +030011#include <linux/errno.h>
12#include <linux/io.h>
13
14/* Registers */
15struct pmu_regs {
16 u32 sts;
17 u32 cmd;
18 u32 ics;
19 u32 reserved;
20 u32 wkc[4];
21 u32 wks[4];
22 u32 ssc[4];
23 u32 sss[4];
24};
25
26/* Bits in PMU_REGS_STS */
27#define PMU_REGS_STS_BUSY (1 << 8)
28
29struct pmu_mid {
30 struct pmu_regs *regs;
31};
32
33static int pmu_read_status(struct pmu_regs *regs)
34{
35 int retry = 500000;
36 u32 val;
37
38 do {
39 val = readl(&regs->sts);
40 if (!(val & PMU_REGS_STS_BUSY))
41 return 0;
42
43 udelay(1);
44 } while (--retry);
45
46 printf("WARNING: PMU still busy\n");
47 return -EBUSY;
48}
49
50static int pmu_power_lss(struct pmu_regs *regs, unsigned int lss, bool on)
51{
52 unsigned int offset = (lss * 2) / 32;
53 unsigned int shift = (lss * 2) % 32;
54 u32 ssc;
55 int ret;
56
57 /* Check PMU status */
58 ret = pmu_read_status(regs);
59 if (ret)
60 return ret;
61
62 /* Read PMU values */
63 ssc = readl(&regs->sss[offset]);
64
65 /* Modify PMU values */
66 if (on)
67 ssc &= ~(0x3 << shift); /* D0 */
68 else
69 ssc |= 0x3 << shift; /* D3hot */
70
71 /* Write modified PMU values */
72 writel(ssc, &regs->ssc[offset]);
73
74 /* Update modified PMU values */
75 writel(0x00002201, &regs->cmd);
76
77 /* Check PMU status */
78 return pmu_read_status(regs);
79}
80
81int pmu_turn_power(unsigned int lss, bool on)
82{
83 struct pmu_mid *pmu;
84 struct udevice *dev;
85 int ret;
86
87 ret = syscon_get_by_driver_data(X86_SYSCON_PMU, &dev);
88 if (ret)
89 return ret;
90
91 pmu = dev_get_priv(dev);
92
93 return pmu_power_lss(pmu->regs, lss, on);
94}
95
96static int pmu_mid_probe(struct udevice *dev)
97{
98 struct pmu_mid *pmu = dev_get_priv(dev);
99
100 pmu->regs = syscon_get_first_range(X86_SYSCON_PMU);
101
102 return 0;
103}
104
105static const struct udevice_id pmu_mid_match[] = {
106 { .compatible = "intel,pmu-mid", .data = X86_SYSCON_PMU },
107 { /* sentinel */ }
108};
109
110U_BOOT_DRIVER(intel_mid_pmu) = {
111 .name = "pmu_mid",
112 .id = UCLASS_SYSCON,
113 .of_match = pmu_mid_match,
114 .probe = pmu_mid_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700115 .priv_auto = sizeof(struct pmu_mid),
Andy Shevchenko7d2c2012017-04-01 16:21:34 +0300116};