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git01.mediatek.com / filogic / uboot / 62fb2b4990fcc011b7caf329f8c8af3be8ff8172 / . / include / mvmfp.h
blob: de86ffd5e2de4a386610b1e4e486b25e04208c37 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]2/*
3 * (C) Copyright 2010
4 * Marvell Semiconductor <www.marvell.com>
5 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]6 */
7
8#ifndef __MVMFP_H
9#define __MVMFP_H
10
11/*
12 * Header file for MultiFunctionPin (MFP) Configururation framework
13 *
14 * Processors Supported:
15 * 1. Marvell ARMADA100 Processors
16 *
17 * processor to be supported should be added here
18 */
19
20/*
21 * MFP configuration is represented by a 32-bit unsigned integer
22 */
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]23#ifdef CONFIG_MVMFP_V2
24#define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]25 /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \
26 /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]27 /* bit 12..11 - Driver Strength */ (((_drv) & 0x3) << 11) | \
28 /* bits 10 - pad driver */ (((_slp) & 0x1) << 10) | \
29 /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \
30 /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \
31 /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \
32 /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7))
33#else
34#define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \
35 /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \
36 /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]37 /* bit 12 - Unused */ \
38 /* bits 11..10 - Driver Strength */ (((_drv) & 0x3) << 10) | \
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]39 /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]40 /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]41 /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \
42 /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7))
43#endif
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]44
45/*
46 * to facilitate the definition, the following macros are provided
47 *
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200[diff] [blame^]48 * offset, pull,pF, drv,dF, edge,eF ,afn,aF
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]49 */
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]50#define MFP_OFFSET_MASK MFP(0xffff, 0, 0, 0, 0, 0, 0)
51#define MFP_REG(x) MFP(x, 0, 0, 0, 0, 0, 0)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]52#define MFP_REG_GET_OFFSET(x) ((x & MFP_OFFSET_MASK) >> 16)
53
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]54#define MFP_AF0 MFP(0x0000, 0, 0, 0, 0, 0, 0)
55#define MFP_AF1 MFP(0x0000, 0, 0, 0, 0, 0, 1)
56#define MFP_AF2 MFP(0x0000, 0, 0, 0, 0, 0, 2)
57#define MFP_AF3 MFP(0x0000, 0, 0, 0, 0, 0, 3)
58#define MFP_AF4 MFP(0x0000, 0, 0, 0, 0, 0, 4)
59#define MFP_AF5 MFP(0x0000, 0, 0, 0, 0, 0, 5)
60#define MFP_AF6 MFP(0x0000, 0, 0, 0, 0, 0, 6)
61#define MFP_AF7 MFP(0x0000, 0, 0, 0, 0, 0, 7)
62#define MFP_AF_MASK MFP(0x0000, 0, 0, 0, 0, 0, 7)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]63
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]64#define MFP_SLEEP_CTRL2 MFP(0x0000, 0, 0, 0, 0, 1, 0)
65#define MFP_SLEEP_DIR MFP(0x0000, 0, 0, 0, 0, 2, 0)
66#define MFP_SLEEP_DATA MFP(0x0000, 0, 0, 0, 0, 4, 0)
67#define MFP_SLEEP_CTRL MFP(0x0000, 0, 0, 0, 0, 8, 0)
68#define MFP_SLEEP_MASK MFP(0x0000, 0, 0, 0, 0, 0xf, 0)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]69
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]70#define MFP_LPM_EDGE_NONE MFP(0x0000, 0, 0, 0, 4, 0, 0)
71#define MFP_LPM_EDGE_RISE MFP(0x0000, 0, 0, 0, 1, 0, 0)
72#define MFP_LPM_EDGE_FALL MFP(0x0000, 0, 0, 0, 2, 0, 0)
73#define MFP_LPM_EDGE_BOTH MFP(0x0000, 0, 0, 0, 3, 0, 0)
74#define MFP_LPM_EDGE_MASK MFP(0x0000, 0, 0, 0, 7, 0, 0)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]75
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]76#define MFP_SLP_DI MFP(0x0000, 0, 0, 1, 0, 0, 0)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]77
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]78#define MFP_DRIVE_VERY_SLOW MFP(0x0000, 0, 0, 0, 0, 0, 0)
79#define MFP_DRIVE_SLOW MFP(0x0000, 0, 1, 0, 0, 0, 0)
80#define MFP_DRIVE_MEDIUM MFP(0x0000, 0, 2, 0, 0, 0, 0)
81#define MFP_DRIVE_FAST MFP(0x0000, 0, 3, 0, 0, 0, 0)
82#define MFP_DRIVE_MASK MFP(0x0000, 0, 3, 0, 0, 0, 0)
83
84#define MFP_PULL_NONE MFP(0x0000, 0, 0, 0, 0, 0, 0)
85#define MFP_PULL_LOW MFP(0x0000, 5, 0, 0, 0, 0, 0)
86#define MFP_PULL_HIGH MFP(0x0000, 6, 0, 0, 0, 0, 0)
87#define MFP_PULL_BOTH MFP(0x0000, 7, 0, 0, 0, 0, 0)
88#define MFP_PULL_FLOAT MFP(0x0000, 4, 0, 0, 0, 0, 0)
89#define MFP_PULL_MASK MFP(0x0000, 7, 0, 0, 0, 0, 0)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]90
Xiang Wang009bb352015-03-23 17:56:58 -0500[diff] [blame]91#define MFP_VALUE_MASK (MFP_PULL_MASK | MFP_DRIVE_MASK | MFP_SLP_DI \
92 | MFP_LPM_EDGE_MASK | MFP_SLEEP_MASK \
93 | MFP_AF_MASK)
Prafulla Wadaskarc704e7a2010-12-07 15:23:39 +0530[diff] [blame]94#define MFP_EOC 0xffffffff /* indicates end-of-conf */
95
96/* Functions */
97void mfp_config(u32 *mfp_cfgs);
98
99#endif /* __MVMFP_H */