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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stelian Pop0bf5cad2008-05-08 18:52:25 +02002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Stelian Pop0bf5cad2008-05-08 18:52:25 +02005 * Lead Tech Design <www.leadtechdesign.com>
6 *
7 * Configuation settings for the AT91SAM9RLEK board.
Stelian Pop0bf5cad2008-05-08 18:52:25 +02008 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Xu, Hong0c0fb212011-08-01 03:56:53 +000013#include <asm/hardware.h>
14
Stelian Pop0bf5cad2008-05-08 18:52:25 +020015/* ARM asynchronous clock */
Xu, Hong0c0fb212011-08-01 03:56:53 +000016#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
17#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020018
Xu, Hong0c0fb212011-08-01 03:56:53 +000019#define CONFIG_SKIP_LOWLEVEL_INIT
Stelian Pop0bf5cad2008-05-08 18:52:25 +020020
Xu, Hong0c0fb212011-08-01 03:56:53 +000021#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
22#define CONFIG_SETUP_MEMORY_TAGS 1
23#define CONFIG_INITRD_TAG 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020024
Xu, Hong0c0fb212011-08-01 03:56:53 +000025#define CONFIG_ATMEL_LEGACY
Stelian Pop0bf5cad2008-05-08 18:52:25 +020026
27/*
28 * Hardware drivers
29 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000030
Stelian Popcea5c532008-05-08 14:52:32 +020031/* LCD */
Stelian Popcea5c532008-05-08 14:52:32 +020032#define LCD_BPP LCD_COLOR8
33#define CONFIG_LCD_LOGO 1
34#undef LCD_TEST_PATTERN
35#define CONFIG_LCD_INFO 1
36#define CONFIG_LCD_INFO_BELOW_LOGO 1
Stelian Popcea5c532008-05-08 14:52:32 +020037#define CONFIG_ATMEL_LCD 1
38#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000039/* Let board_init_f handle the framebuffer allocation */
40#undef CONFIG_FB_ADDR
Xu, Hong0c0fb212011-08-01 03:56:53 +000041
Stelian Pop0bf5cad2008-05-08 18:52:25 +020042/* SDRAM */
Xu, Hong0c0fb212011-08-01 03:56:53 +000043#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
44#define CONFIG_SYS_SDRAM_SIZE 0x04000000
45
46#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang3cbbeb12017-04-18 15:28:27 +080047 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020048
Stelian Pop0bf5cad2008-05-08 18:52:25 +020049/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010050#ifdef CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000052#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020053#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010054/* our ALE is AD21 */
55#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
56/* our CLE is AD22 */
57#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
58#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
59#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk1f797742009-07-18 21:52:24 +020060
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010061#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +020062
63/* Ethernet - not present */
64
65/* USB - not supported */
66
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020067#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020068
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020069#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +020070
71/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +080072#define CONFIG_BOOTCOMMAND "sf probe 0; " \
73 "sf read 0x22000000 0x84000 0x294000; " \
74 "bootm 0x22000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +020075
Wu, Josh7ff194f2015-02-02 17:51:01 +080076#elif CONFIG_SYS_USE_NANDFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +020077
78/* bootstrap + u-boot + env + linux in nandflash */
Wu, Joshf8e70d92015-02-03 11:38:30 +080079#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
80 "nand read 0x21000000 0x180000 0x80000; " \
81 "bootz 0x22000000 - 0x21000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +020082
Wu, Josh7ff194f2015-02-02 17:51:01 +080083#else /* CONFIG_SYS_USE_MMC */
84
85/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh7ff194f2015-02-02 17:51:01 +080086#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
87 "fatload mmc 0:1 0x22000000 zImage; " \
88 "bootz 0x22000000 - 0x21000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +020089#endif
90
Stelian Pop0bf5cad2008-05-08 18:52:25 +020091/*
92 * Size of malloc() pool
93 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000094#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020095
Stelian Pop0bf5cad2008-05-08 18:52:25 +020096#endif