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Michael Schwingen06a9e122008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-4 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#define CONFIG_IXP425 1
30#define CONFIG_ACTUX4 1
31
32#define CONFIG_DISPLAY_CPUINFO 1
33#define CONFIG_DISPLAY_BOARDINFO 1
34
Jean-Christophe PLAGNIOL-VILLARD08cae4d2009-01-31 09:10:48 +010035#define CONFIG_IXP_SERIAL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020036#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1
Michael Schwingen06a9e122008-01-16 19:53:23 +010037#define CONFIG_BAUDRATE 115200
38#define CONFIG_BOOTDELAY 3
39#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
40
41/***************************************************************
42 * U-boot generic defines start here.
43 ***************************************************************/
44#undef CONFIG_USE_IRQ
45
46/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020047#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingen06a9e122008-01-16 19:53:23 +010048/* size in bytes reserved for initial data */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049#define CONFIG_SYS_GBL_DATA_SIZE 128
Michael Schwingen06a9e122008-01-16 19:53:23 +010050
51/* allow to overwrite serial and ethaddr */
52#define CONFIG_ENV_OVERWRITE
53
54/* Command line configuration */
55#include <config_cmd_default.h>
56
57#define CONFIG_CMD_ELF
58
59#define CONFIG_BOOTCOMMAND "run boot_flash"
60/* enable passing of ATAGs */
61#define CONFIG_CMDLINE_TAG 1
62#define CONFIG_SETUP_MEMORY_TAGS 1
63#define CONFIG_INITRD_TAG 1
64
65#if defined(CONFIG_CMD_KGDB)
66# define CONFIG_KGDB_BAUDRATE 230400
67/* which serial port to use */
68# define CONFIG_KGDB_SER_INDEX 1
69#endif
70
71/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020072#define CONFIG_SYS_LONGHELP
73#define CONFIG_SYS_PROMPT "=> "
Michael Schwingen06a9e122008-01-16 19:53:23 +010074/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075#define CONFIG_SYS_CBSIZE 256
Michael Schwingen06a9e122008-01-16 19:53:23 +010076/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingen06a9e122008-01-16 19:53:23 +010078/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020079#define CONFIG_SYS_MAXARGS 16
Michael Schwingen06a9e122008-01-16 19:53:23 +010080/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingen06a9e122008-01-16 19:53:23 +010082
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083#define CONFIG_SYS_MEMTEST_START 0x00400000
84#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingen06a9e122008-01-16 19:53:23 +010085
86/* everything, incl board info, in Hz */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#undef CONFIG_SYS_CLKS_IN_HZ
Michael Schwingen06a9e122008-01-16 19:53:23 +010088/* spec says 66.666 MHz, but it appears to be 33 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_HZ 3333333
Michael Schwingen06a9e122008-01-16 19:53:23 +010090
91/* default load address */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020092#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingen06a9e122008-01-16 19:53:23 +010093
94/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020095#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingen06a9e122008-01-16 19:53:23 +010096 115200, 230400 }
97#define CONFIG_SERIAL_RTS_ACTIVE 1
98
99/*
100 * Stack sizes
101 * The stack sizes are set up in start.S using the settings below
102 */
103#define CONFIG_STACKSIZE (128*1024) /* regular stack */
104#ifdef CONFIG_USE_IRQ
105# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
106# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
107#endif
108
109/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_EXP_CS0 0xbd113003
Michael Schwingen06a9e122008-01-16 19:53:23 +0100111
112/* SDRAM settings */
113#define CONFIG_NR_DRAM_BANKS 1
114#define PHYS_SDRAM_1 0x00000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_DRAM_BASE 0x00000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100116
117/* 32MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_SDR_CONFIG 0x18
Michael Schwingen06a9e122008-01-16 19:53:23 +0100119#define PHYS_SDRAM_1_SIZE 0x02000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200120#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
121#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
122#define CONFIG_SYS_DRAM_SIZE 0x02000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100123
124/* FLASH organization */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200125#define CONFIG_SYS_MAX_FLASH_BANKS 2
Michael Schwingen06a9e122008-01-16 19:53:23 +0100126/* max # of sectors per chip */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_MAX_FLASH_SECT 70
Michael Schwingen06a9e122008-01-16 19:53:23 +0100128#define PHYS_FLASH_1 0x50000000
129#define PHYS_FLASH_2 0x51000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
Michael Schwingen06a9e122008-01-16 19:53:23 +0100131
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
133#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
134#define CONFIG_SYS_MONITOR_LEN (252 << 10)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100135
136/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200137#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200138#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingen06a9e122008-01-16 19:53:23 +0100139/* board provides its own flash_init code */
140#define CONFIG_FLASH_CFI_LEGACY 1
141/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingen06a9e122008-01-16 19:53:23 +0100143/* SST 39VF020 etc. support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100145
146/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200147#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingen06a9e122008-01-16 19:53:23 +0100148
149/* Ethernet */
150
151/* include IXP4xx NPE support */
152#define CONFIG_IXP4XX_NPE 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100153
154#define CONFIG_NET_MULTI 1
155/* NPE0 PHY address */
156#define CONFIG_PHY_ADDR 0x1C
157/* MII PHY management */
158#define CONFIG_MII 1
159/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingen06a9e122008-01-16 19:53:23 +0100161
162#define CONFIG_CMD_DHCP
163#define CONFIG_CMD_NET
164#define CONFIG_CMD_MII
165#define CONFIG_CMD_PING
166#undef CONFIG_CMD_NFS
167
168/* BOOTP options */
169#define CONFIG_BOOTP_BOOTFILESIZE
170#define CONFIG_BOOTP_BOOTPATH
171#define CONFIG_BOOTP_GATEWAY
172#define CONFIG_BOOTP_HOSTNAME
173
174/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200175#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingen06a9e122008-01-16 19:53:23 +0100176
177/* environment organization: one complete 4k flash sector */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200178#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200179#define CONFIG_ENV_SIZE 0x1000
180#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100181
182#define CONFIG_EXTRA_ENV_SETTINGS \
Jean-Christophe PLAGNIOL-VILLARD1948d6c2009-01-31 09:53:39 +0100183 "npe_ucode=51000000\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100184 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \
185 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \
186 "kerneladdr=51020000\0" \
187 "rootaddr=51160000\0" \
188 "loadaddr=10000\0" \
189 "updateboot_ser=mw.b 10000 ff 40000;" \
190 " loady ${loadaddr};" \
191 " run eraseboot writeboot\0" \
192 "updateboot_net=mw.b 10000 ff 40000;" \
193 " tftp ${loadaddr} u-boot.bin;" \
194 " run eraseboot writeboot\0" \
195 "eraseboot=protect off 50000000 5003efff;" \
196 " erase 50000000 +${filesize}\0" \
197 "writeboot=cp.b 10000 50000000 ${filesize}\0" \
198 "eraseenv=protect off 5003f000 5003ffff;" \
199 " erase 5003f000 5003ffff\0" \
200 "updateroot=tftp ${loadaddr} ${rootfile};" \
201 " era ${rootaddr} +${filesize};" \
202 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
203 "updatekern=tftp ${loadaddr} ${kernelfile};" \
204 " era ${kerneladdr} +${filesize};" \
205 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
206 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
207 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
208 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
209 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
210 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
211 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
212 "boot_flash=run flashargs addtty addeth;" \
213 " bootm ${kerneladdr}\0" \
214 "boot_net=run netargs addtty addeth;" \
215 " tftpboot ${loadaddr} ${kernelfile};" \
216 " bootm\0"
217
218#endif /* __CONFIG_H */