Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * Configuration settings for the AcTux-1 board. |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | /* 1: modified board with 32MB DRAM */ |
| 30 | #define CONFIG_ACTUX1_32MB 0 |
| 31 | /* 1: 2*2MB FLASH (standard) */ |
| 32 | #define CONFIG_ACTUX1_FLASH2X2 1 |
| 33 | /* 1: 1*8MB FLASH (upgraded boards) */ |
| 34 | #define CONFIG_ACTUX1_FLASH1X8 0 |
| 35 | |
| 36 | #define CONFIG_IXP425 1 |
| 37 | #define CONFIG_ACTUX1 1 |
| 38 | |
| 39 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 40 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 41 | |
Jean-Christophe PLAGNIOL-VILLARD | 08cae4d | 2009-01-31 09:10:48 +0100 | [diff] [blame] | 42 | #define CONFIG_IXP_SERIAL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 44 | #define CONFIG_BAUDRATE 115200 |
| 45 | #define CONFIG_BOOTDELAY 3 |
| 46 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 47 | |
| 48 | /*************************************************************** |
| 49 | * U-boot generic defines start here. |
| 50 | ***************************************************************/ |
| 51 | #undef CONFIG_USE_IRQ |
| 52 | |
| 53 | /* |
| 54 | * Size of malloc() pool |
| 55 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 56 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 57 | /* size in bytes reserved for initial data */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 58 | #define CONFIG_SYS_GBL_DATA_SIZE 128 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 59 | |
| 60 | /* allow to overwrite serial and ethaddr */ |
| 61 | #define CONFIG_ENV_OVERWRITE |
| 62 | |
| 63 | /* Command line configuration. */ |
| 64 | #include <config_cmd_default.h> |
| 65 | |
| 66 | #define CONFIG_CMD_ELF |
| 67 | #undef CONFIG_CMD_PCI |
| 68 | #undef CONFIG_PCI |
| 69 | |
| 70 | #define CONFIG_BOOTCOMMAND "run boot_flash" |
| 71 | /* enable passing of ATAGs */ |
| 72 | #define CONFIG_CMDLINE_TAG 1 |
| 73 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 74 | #define CONFIG_INITRD_TAG 1 |
| 75 | #define CONFIG_REVISION_TAG 1 |
| 76 | |
| 77 | #if defined(CONFIG_CMD_KGDB) |
| 78 | # define CONFIG_KGDB_BAUDRATE 230400 |
| 79 | /* which serial port to use */ |
| 80 | # define CONFIG_KGDB_SER_INDEX 1 |
| 81 | #endif |
| 82 | |
| 83 | /* Miscellaneous configurable options */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | #define CONFIG_SYS_LONGHELP |
| 85 | #define CONFIG_SYS_PROMPT "=> " |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 86 | /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_CBSIZE 256 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 88 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 90 | /* max number of command args */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_MAXARGS 16 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 92 | /* Boot Argument Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 94 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
| 96 | #define CONFIG_SYS_MEMTEST_END 0x00800000 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 97 | |
| 98 | /* everything, incl board info, in Hz */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #undef CONFIG_SYS_CLKS_IN_HZ |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 100 | /* spec says 66.666 MHz, but it appears to be 33 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_HZ 3333333 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 102 | |
| 103 | /* default load address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 104 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 105 | |
| 106 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 108 | 115200, 230400 } |
| 109 | #define CONFIG_SERIAL_RTS_ACTIVE 1 |
| 110 | |
| 111 | /* |
| 112 | * Stack sizes |
| 113 | * The stack sizes are set up in start.S using the settings below |
| 114 | */ |
| 115 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 116 | #ifdef CONFIG_USE_IRQ |
| 117 | # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 118 | # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 119 | #endif |
| 120 | |
| 121 | /* Expansion bus settings */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_EXP_CS0 0xbd113842 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 123 | |
| 124 | /* SDRAM settings */ |
| 125 | #define CONFIG_NR_DRAM_BANKS 1 |
| 126 | #define PHYS_SDRAM_1 0x00000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_DRAM_BASE 0x00000000 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 128 | |
| 129 | #if CONFIG_ACTUX1_32MB |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | # define CONFIG_SYS_SDR_CONFIG 0x18 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 131 | # define PHYS_SDRAM_1_SIZE 0x02000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
| 133 | # define CONFIG_SYS_SDR_MODE_CONFIG 0x1 |
| 134 | # define CONFIG_SYS_DRAM_SIZE 0x02000000 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 135 | #else /* 16MB SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | # define CONFIG_SYS_SDR_CONFIG 0x3A |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 137 | # define PHYS_SDRAM_1_SIZE 0x01000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
| 139 | # define CONFIG_SYS_SDR_MODE_CONFIG 0x1 |
| 140 | # define CONFIG_SYS_DRAM_SIZE 0x01000000 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 141 | #endif |
| 142 | |
| 143 | /* FLASH organization */ |
| 144 | #if CONFIG_ACTUX1_FLASH2X2 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | # define CONFIG_SYS_MAX_FLASH_BANKS 2 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 146 | /* max number of sectors on one chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 147 | # define CONFIG_SYS_MAX_FLASH_SECT 40 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 148 | # define PHYS_FLASH_1 0x50000000 |
| 149 | # define PHYS_FLASH_2 0x50200000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 151 | #endif |
| 152 | #if CONFIG_ACTUX1_FLASH1X8 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 154 | /* max number of sectors on one chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | # define CONFIG_SYS_MAX_FLASH_SECT 140 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 156 | # define PHYS_FLASH_1 0x50000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 157 | # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 158 | #endif |
| 159 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 161 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 162 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 163 | |
| 164 | /* Use common CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 166 | #define CONFIG_FLASH_CFI_DRIVER |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 167 | /* no byte writes on IXP4xx */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 168 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 169 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 170 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 171 | |
| 172 | /* Ethernet */ |
| 173 | |
| 174 | /* include IXP4xx NPE support */ |
| 175 | #define CONFIG_IXP4XX_NPE 1 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 176 | #define CONFIG_NET_MULTI 1 |
| 177 | /* NPE0 PHY address */ |
| 178 | #define CONFIG_PHY_ADDR 0 |
| 179 | /* MII PHY management */ |
| 180 | #define CONFIG_MII 1 |
| 181 | /* Number of ethernet rx buffers & descriptors */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 183 | #define CONFIG_RESET_PHY_R 1 |
| 184 | |
| 185 | #define CONFIG_CMD_DHCP |
| 186 | #define CONFIG_CMD_NET |
| 187 | #define CONFIG_CMD_MII |
| 188 | #define CONFIG_CMD_PING |
| 189 | #undef CONFIG_CMD_NFS |
| 190 | |
| 191 | /* BOOTP options */ |
| 192 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 193 | #define CONFIG_BOOTP_BOOTPATH |
| 194 | #define CONFIG_BOOTP_GATEWAY |
| 195 | #define CONFIG_BOOTP_HOSTNAME |
| 196 | |
| 197 | /* Cache Configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 199 | |
| 200 | /* |
| 201 | * environment organization: |
| 202 | * one flash sector, embedded in uboot area (bottom bootblock flash) |
| 203 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 204 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 205 | #define CONFIG_ENV_SIZE 0x2000 |
| 206 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 207 | #define CONFIG_SYS_USE_PPCENV 1 |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 208 | |
| 209 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Jean-Christophe PLAGNIOL-VILLARD | 1948d6c | 2009-01-31 09:53:39 +0100 | [diff] [blame] | 210 | "npe_ucode=50040000\0" \ |
Michael Schwingen | 4d56c88 | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 211 | "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ |
| 212 | "kerneladdr=50050000\0" \ |
| 213 | "rootaddr=50170000\0" \ |
| 214 | "loadaddr=10000\0" \ |
| 215 | "updateboot_ser=mw.b 10000 ff 40000;" \ |
| 216 | " loady ${loadaddr};" \ |
| 217 | " run eraseboot writeboot\0" \ |
| 218 | "updateboot_net=mw.b 10000 ff 40000;" \ |
| 219 | " tftp ${loadaddr} u-boot.bin;" \ |
| 220 | " run eraseboot writeboot\0" \ |
| 221 | "eraseboot=protect off 50000000 50003fff;" \ |
| 222 | " protect off 50006000 5003ffff;" \ |
| 223 | " erase 50000000 50003fff;" \ |
| 224 | " erase 50006000 5003ffff\0" \ |
| 225 | "writeboot=cp.b 10000 50000000 4000;" \ |
| 226 | " cp.b 16000 50006000 3a000\0" \ |
| 227 | "eraseenv=protect off 50004000 50005fff;" \ |
| 228 | " erase 50004000 50005fff\0" \ |
| 229 | "updateroot=tftp ${loadaddr} ${rootfile};" \ |
| 230 | " era ${rootaddr} +${filesize};" \ |
| 231 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ |
| 232 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ |
| 233 | " era ${kerneladdr} +${filesize};" \ |
| 234 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ |
| 235 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ |
| 236 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 237 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ |
| 238 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 239 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
| 240 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ |
| 241 | "boot_flash=run flashargs addtty addeth;" \ |
| 242 | " bootm ${kerneladdr}\0" \ |
| 243 | "boot_net=run netargs addtty addeth;" \ |
| 244 | " tftpboot ${loadaddr} ${kernelfile};" \ |
| 245 | " bootm\0" |
| 246 | |
| 247 | #endif /* __CONFIG_H */ |