blob: acadd1d4c434272ba202933e4a8adb56955d00b1 [file] [log] [blame]
Bo Shenc56e9f42015-03-27 14:23:34 +08001/*
2 * Copyright (C) 2015 Atmel Corporation
3 * Bo Shen <voice.shen@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
9 LENGTH = CONFIG_SPL_MAX_SIZE }
10MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
11 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
12
13OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
14OUTPUT_ARCH(arm)
15ENTRY(_start)
16SECTIONS
17{
18 .text :
19 {
20 __start = .;
21 *(.vectors)
22 arch/arm/cpu/arm926ejs/start.o (.text*)
23 *(.text*)
24 } >.sram
25
26 . = ALIGN(4);
27 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
28
29 . = ALIGN(4);
30 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
31
32 . = ALIGN(4);
33 __image_copy_end = .;
34
35 .end :
36 {
37 *(.__end)
38 } >.sram
39
40 .bss :
41 {
42 . = ALIGN(4);
43 __bss_start = .;
44 *(.bss*)
45 . = ALIGN(4);
46 __bss_end = .;
47 } >.sdram
48}