| Jon Smirl | bc03df9 | 2009-06-14 18:21:28 -0400 | [diff] [blame] | 1 | To build RAMBOOT, replace this section the main Makefile |
| 2 | |
| 3 | pcm030_config \ |
| 4 | pcm030_RAMBOOT_config \ |
| 5 | pcm030_LOWBOOT_config: unconfig |
| 6 | @ >include/config.h |
| 7 | @[ -z "$(findstring LOWBOOT_,$@)" ] || \ |
| 8 | { echo "TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \ |
| 9 | echo "... with LOWBOOT configuration" ; \ |
| 10 | } |
| 11 | @[ -z "$(findstring RAMBOOT_,$@)" ] || \ |
| 12 | { echo "TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\ |
| 13 | config.tmp ; \ |
| 14 | echo "... with RAMBOOT configuration" ; \ |
| 15 | echo "... remember to make sure that MBAR is already \ |
| 16 | switched to 0xF0000000 !!!" ; \ |
| 17 | } |
| 18 | @$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec |
| 19 | @ echo "remember to set pcm030_REV to 0 for rev 1245.0 rev or to 1 for rev 1245.1" |
| 20 | |
| Jon Smirl | bc03df9 | 2009-06-14 18:21:28 -0400 | [diff] [blame] | 21 | Alternative SDRAM settings: |
| 22 | |
| 23 | #define SDRAM_MODE 0x018D0000 |
| 24 | #define SDRAM_EMODE 0x40090000 |
| 25 | #define SDRAM_CONTROL 0x715f0f00 |
| 26 | #define SDRAM_CONFIG1 0x73722930 |
| 27 | #define SDRAM_CONFIG2 0x47770000 |
| 28 | |
| 29 | /* Settings for XLB = 99 MHz */ |
| 30 | #define SDRAM_MODE 0x008D0000 |
| 31 | #define SDRAM_EMODE 0x40090000 |
| 32 | #define SDRAM_CONTROL 0x714b0f00 |
| 33 | #define SDRAM_CONFIG1 0x63611730 |
| 34 | #define SDRAM_CONFIG2 0x47670000 |
| 35 | |
| 36 | The board ships default with the environment in EEPROM |
| 37 | Moving the environment to flash can be more reliable |
| 38 | |
| 39 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 40 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xfe0000) |
| 41 | #define CONFIG_ENV_SIZE 0x20000 |
| 42 | #define CONFIG_ENV_SECT_SIZE 0x20000 |