blob: e3441cad4eda99e928c82eff26cd4e02c5e35486 [file] [log] [blame]
Wolfgang Denk190ab732009-05-16 10:47:46 +02001/*
2 * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
3 * (C) Copyright 2009 Dave Srl www.dave.eu
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk190ab732009-05-16 10:47:46 +02006 */
7
8#include <common.h>
9#include <asm/bitops.h>
10#include <command.h>
11#include <asm/io.h>
12#include <asm/processor.h>
Wolfgang Denk1d7cc1e2009-06-14 20:58:47 +020013#include <asm/mpc512x.h>
Wolfgang Denk190ab732009-05-16 10:47:46 +020014#include <fdt_support.h>
15#ifdef CONFIG_MISC_INIT_R
16#include <i2c.h>
17#endif
18
19DECLARE_GLOBAL_DATA_PTR;
20
Simon Glassd35f3382017-04-06 12:47:05 -060021int dram_init(void)
Wolfgang Denk190ab732009-05-16 10:47:46 +020022{
Simon Glass39f90ba2017-03-31 08:40:25 -060023 gd->ram_size = fixed_sdram(NULL, NULL, 0);
24
25 return 0;
Wolfgang Denk190ab732009-05-16 10:47:46 +020026}
27
Wolfgang Denk190ab732009-05-16 10:47:46 +020028int misc_init_r(void)
29{
30 u32 tmp;
31
32 /* we use I2C-2 for on-board eeprom */
33 i2c_set_bus_num(2);
34
35 tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
36 printf("FPGA: %u-%u.%u.%u\n",
37 (tmp & 0xFF000000) >> 24,
38 (tmp & 0x00FF0000) >> 16,
39 (tmp & 0x0000FF00) >> 8,
40 tmp & 0x000000FF
41 );
42
Wolfgang Denk190ab732009-05-16 10:47:46 +020043 return 0;
44}
45
46static iopin_t ioregs_init[] = {
47 /*
48 * FEC
49 */
50
51 /* FEC on PSCx_x*/
52 {
53 offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
54 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
55 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
56 },
57 {
58 offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
59 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
60 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
61 },
62 {
63 offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
64 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
65 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
66 },
67
68 /*
69 * DIU
70 */
71 /* FUNC2=DIU CLK */
72 {
73 offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
74 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
75 IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
76 },
77 /* FUNC2=DIU_HSYNC */
78 {
79 offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
80 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
81 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
82 },
83 /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
84 {
85 offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
86 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
87 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
88 },
89 /*
90 * On board SRAM
91 */
92 /* FUNC2=/LPC CS6 */
93 {
94 offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
95 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
96 IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
97 },
98};
99
Wolfgang Denk190ab732009-05-16 10:47:46 +0200100int checkboard (void)
101{
102 puts("Board: ARIA\n");
103
104 /* initialize function mux & slew rate IO inter alia on IO Pins */
105
106 iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
107
108 return 0;
109}
110
Robert P. J. Day3c757002016-05-19 15:23:12 -0400111#ifdef CONFIG_OF_BOARD_SETUP
Simon Glass2aec3cc2014-10-23 18:58:47 -0600112int ft_board_setup(void *blob, bd_t *bd)
Wolfgang Denk190ab732009-05-16 10:47:46 +0200113{
114 ft_cpu_setup(blob, bd);
Simon Glass2aec3cc2014-10-23 18:58:47 -0600115
116 return 0;
Wolfgang Denk190ab732009-05-16 10:47:46 +0200117}
Robert P. J. Day3c757002016-05-19 15:23:12 -0400118#endif /* CONFIG_OF_BOARD_SETUP */