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Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +00001/*
2 * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __CONFIG_IGEP0033_H
15#define __CONFIG_IGEP0033_H
16
17#define CONFIG_AM33XX
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000018#define CONFIG_OMAP
Lokesh Vutla56055052013-07-30 11:36:30 +053019#define CONFIG_OMAP_COMMON
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000020
21#include <asm/arch/omap.h>
22
23/* Mach type */
24#define MACH_TYPE_IGEP0033 4521 /* Until the next sync */
25#define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
26
27/* Clock defines */
28#define V_OSCK 24000000 /* Clock output from T2 */
29#define V_SCLK (V_OSCK)
30
31/* DMA defines */
32#define CONFIG_DMA_COHERENT
33#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
34
35#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
36#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
37#define CONFIG_SYS_LONGHELP /* undef to save memory */
38#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
39#define CONFIG_SYS_PROMPT "U-Boot# "
40#define CONFIG_SYS_NO_FLASH
41
42/* Display cpuinfo */
43#define CONFIG_DISPLAY_CPUINFO
44
Enric Balletbò i Serra620b91d2013-07-25 09:27:37 +020045/* Flattened Device Tree */
46#define CONFIG_OF_LIBFDT
47
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000048/* Commands to include */
49#include <config_cmd_default.h>
50
51#define CONFIG_CMD_ASKENV
52#define CONFIG_CMD_BOOTZ
53#define CONFIG_CMD_DHCP
54#define CONFIG_CMD_ECHO
55#define CONFIG_CMD_EXT4
56#define CONFIG_CMD_FAT
57#define CONFIG_CMD_FS_GENERIC
58#define CONFIG_CMD_MMC
59#define CONFIG_CMD_MTDPARTS
60#define CONFIG_CMD_NAND
61#define CONFIG_CMD_NET
62#define CONFIG_CMD_PING
63#define CONFIG_CMD_UBI
64#define CONFIG_CMD_UBIFS
65
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000066#define CONFIG_BOOTDELAY 1 /* negative for no autoboot */
67#define CONFIG_ENV_VARS_UBOOT_CONFIG
68#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
69#define CONFIG_EXTRA_ENV_SETTINGS \
Enric Balletbò i Serra620b91d2013-07-25 09:27:37 +020070 "loadaddr=0x80F80000\0" \
71 "dtbaddr=0x80200000\0" \
72 "bootdir=/boot\0" \
73 "bootfile=zImage\0" \
74 "dtbfile=am335x-base0033.dtb\0" \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000075 "console=ttyO0,115200n8\0" \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000076 "mmcdev=0\0" \
77 "mmcroot=/dev/mmcblk0p2 rw\0" \
78 "mmcrootfstype=ext4 rootwait\0" \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000079 "mmcargs=setenv bootargs console=${console} " \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000080 "root=${mmcroot} " \
81 "rootfstype=${mmcrootfstype}\0" \
82 "bootenv=uEnv.txt\0" \
83 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
84 "importbootenv=echo Importing environment from mmc ...; " \
Enric Balletbò i Serra620b91d2013-07-25 09:27:37 +020085 "env import -t ${loadaddr} ${filesize}\0" \
86 "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \
87 "load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000088 "mmcboot=echo Booting from mmc ...; " \
89 "run mmcargs; " \
Enric Balletbò i Serra620b91d2013-07-25 09:27:37 +020090 "bootz ${loadaddr} - ${dtbaddr}\0" \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +000091
92#define CONFIG_BOOTCOMMAND \
93 "mmc dev ${mmcdev}; if mmc rescan; then " \
94 "echo SD/MMC found on device ${mmcdev};" \
95 "if run loadbootenv; then " \
96 "echo Loaded environment from ${bootenv};" \
97 "run importbootenv;" \
98 "fi;" \
99 "if test -n $uenvcmd; then " \
100 "echo Running uenvcmd ...;" \
101 "run uenvcmd;" \
102 "fi;" \
Enric Balletbò i Serra620b91d2013-07-25 09:27:37 +0200103 "if run mmcload; then " \
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +0000104 "run mmcboot;" \
105 "fi;" \
106 "fi;" \
107
108/* Max number of command args */
109#define CONFIG_SYS_MAXARGS 16
110
111/* Console I/O Buffer Size */
112#define CONFIG_SYS_CBSIZE 512
113
114/* Print Buffer Size */
115#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
116 + sizeof(CONFIG_SYS_PROMPT) + 16)
117
118/* Boot Argument Buffer Size */
119#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
120#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
121#define CONFIG_SYS_HZ 1000 /* 1ms clock */
122
123/* Physical Memory Map */
124#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
125#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
126#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
127
128#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
129#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
130 GENERATED_GBL_DATA_SIZE)
131/* Platform/Board specific defs */
132#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
133#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
134#define CONFIG_SYS_HZ 1000
135
136/* NS16550 Configuration */
137#define CONFIG_SYS_NS16550
138#define CONFIG_SYS_NS16550_SERIAL
139#define CONFIG_SYS_NS16550_REG_SIZE (-4)
140#define CONFIG_SYS_NS16550_CLK (48000000)
141#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
142
143#define CONFIG_SERIAL_MULTI
144#define CONFIG_CONS_INDEX 1
145#define CONFIG_BAUDRATE 115200
146
SRICHARAN R669b3372013-04-24 00:41:25 +0000147/* CPU */
148#define CONFIG_ARCH_CPU_INIT
149
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +0000150#define CONFIG_ENV_OVERWRITE 1
151#define CONFIG_SYS_CONSOLE_INFO_QUIET
152
153/* MMC support */
154#define CONFIG_MMC
155#define CONFIG_GENERIC_MMC
156#define CONFIG_OMAP_HSMMC
157#define CONFIG_DOS_PARTITION
158
159/* GPIO support */
160#define CONFIG_OMAP_GPIO
161
162/* Ethernet support */
163#define CONFIG_DRIVER_TI_CPSW
164#define CONFIG_MII
165#define CONFIG_BOOTP_DEFAULT
166#define CONFIG_BOOTP_DNS
167#define CONFIG_BOOTP_DNS2
168#define CONFIG_BOOTP_SEND_HOSTNAME
169#define CONFIG_BOOTP_GATEWAY
170#define CONFIG_BOOTP_SUBNETMASK
171#define CONFIG_NET_RETRY_COUNT 10
172#define CONFIG_NET_MULTI
173#define CONFIG_PHYLIB
174#define CONFIG_PHY_ADDR 0
175#define CONFIG_PHY_SMSC
176
177/* NAND support */
178#define CONFIG_NAND
179#define CONFIG_NAND_OMAP_GPMC
180#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
181#define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */
182#define CONFIG_SYS_MAX_NAND_DEVICE 1
183#define CONFIG_SYS_NAND_ONFI_DETECTION 1
184#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
185#define CONFIG_ENV_IS_IN_NAND
186#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
187
188#define CONFIG_MTD_PARTITIONS
189#define CONFIG_MTD_DEVICE
190#define CONFIG_RBTREE
191#define CONFIG_LZO
192
193#define MTDIDS_DEFAULT "nand0=nand"
194#define MTDPARTS_DEFAULT "mtdparts=nand:512k(SPL),"\
195 "1m(U-Boot),128k(U-Boot Env),"\
196 "5m(Kernel),-(File System)"
197
198/* Unsupported features */
199#undef CONFIG_USE_IRQ
200
201/* Defines for SPL */
202#define CONFIG_SPL
203#define CONFIG_SPL_FRAMEWORK
Tom Rini3a300832013-05-31 10:48:03 -0400204/*
Tom Rinic513b612013-06-06 08:57:45 -0400205 * Place the image at the start of the ROM defined image space.
Tom Rini3a300832013-05-31 10:48:03 -0400206 * We limit our size to the ROM-defined downloaded image area, and use the
207 * rest of the space for stack.
208 */
Tom Rinic513b612013-06-06 08:57:45 -0400209#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom Rini3a300832013-05-31 10:48:03 -0400210#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
Enric Balletbo i Serra9b96f462013-04-04 22:27:58 +0000211#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
212
213#define CONFIG_SPL_BSS_START_ADDR 0x80000000
214#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
215
216#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
217#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
218#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
219#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
220#define CONFIG_SPL_MMC_SUPPORT
221#define CONFIG_SPL_FAT_SUPPORT
222#define CONFIG_SPL_LIBCOMMON_SUPPORT
223#define CONFIG_SPL_LIBDISK_SUPPORT
224#define CONFIG_SPL_LIBGENERIC_SUPPORT
225#define CONFIG_SPL_SERIAL_SUPPORT
226#define CONFIG_SPL_GPIO_SUPPORT
227#define CONFIG_SPL_YMODEM_SUPPORT
228#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
229
230#define CONFIG_SPL_BOARD_INIT
231#define CONFIG_SPL_NAND_AM33XX_BCH
232#define CONFIG_SPL_NAND_SUPPORT
233#define CONFIG_SPL_NAND_BASE
234#define CONFIG_SPL_NAND_DRIVERS
235#define CONFIG_SPL_NAND_ECC
236#define CONFIG_SYS_NAND_5_ADDR_CYCLE
237#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
238 CONFIG_SYS_NAND_PAGE_SIZE)
239#define CONFIG_SYS_NAND_PAGE_SIZE 2048
240#define CONFIG_SYS_NAND_OOBSIZE 64
241#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
242#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
243#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
244 10, 11, 12, 13, 14, 15, 16, 17, \
245 18, 19, 20, 21, 22, 23, 24, 25, \
246 26, 27, 28, 29, 30, 31, 32, 33, \
247 34, 35, 36, 37, 38, 39, 40, 41, \
248 42, 43, 44, 45, 46, 47, 48, 49, \
249 50, 51, 52, 53, 54, 55, 56, 57, }
250
251#define CONFIG_SYS_NAND_ECCSIZE 512
252#define CONFIG_SYS_NAND_ECCBYTES 14
253
254#define CONFIG_SYS_NAND_ECCSTEPS 4
255#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
256 CONFIG_SYS_NAND_ECCSTEPS)
257
258#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
259
260#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
261
262/*
263 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
264 * 64 bytes before this address should be set aside for u-boot.img's
265 * header. That is 0x800FFFC0--0x80100000 should not be used for any
266 * other needs.
267 */
268#define CONFIG_SYS_TEXT_BASE 0x80800000
269#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
270#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
271
272/*
273 * Since SPL did pll and ddr initialization for us,
274 * we don't need to do it twice.
275 */
276#ifndef CONFIG_SPL_BUILD
277#define CONFIG_SKIP_LOWLEVEL_INIT
278#endif
279
280#endif /* ! __CONFIG_IGEP0033_H */