| Thomas Chou | e51b65e | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 1 | menu "MTD Support" |
| 2 | |
| Miquel Raynal | d31c478 | 2018-08-16 17:30:18 +0200 | [diff] [blame] | 3 | config MTD_PARTITIONS |
| 4 | bool |
| 5 | |
| Miquel Raynal | 2e35dbb | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 6 | config MTD |
| 7 | bool "Enable MTD layer" |
| 8 | help |
| 9 | Enable the MTD stack, necessary to interract with NAND, NOR, |
| 10 | SPI-NOR, SPI-NAND, onenand, etc. |
| 11 | |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 12 | config DM_MTD |
| Thomas Chou | e51b65e | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 13 | bool "Enable Driver Model for MTD drivers" |
| 14 | depends on DM |
| 15 | help |
| 16 | Enable driver model for Memory Technology Devices (MTD), such as |
| 17 | flash, RAM and similar chips, often used for solid state file |
| 18 | systems on embedded devices. |
| 19 | |
| Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 20 | config MTD_NOR_FLASH |
| 21 | bool "Enable parallel NOR flash support" |
| 22 | help |
| 23 | Enable support for parallel NOR flash. |
| 24 | |
| Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 25 | config FLASH_CFI_DRIVER |
| 26 | bool "Enable CFI Flash driver" |
| 27 | help |
| 28 | The Common Flash Interface specification was developed by Intel, |
| 29 | AMD and other flash manufactures. It provides a universal method |
| 30 | for probing the capabilities of flash devices. If you wish to |
| 31 | support any device that is CFI-compliant, you need to enable this |
| 32 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 33 | for more information on CFI. |
| 34 | |
| Thomas Chou | 47eae23 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 35 | config CFI_FLASH |
| 36 | bool "Enable Driver Model for CFI Flash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 37 | depends on DM_MTD |
| Thomas Chou | 47eae23 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 38 | help |
| 39 | The Common Flash Interface specification was developed by Intel, |
| 40 | AMD and other flash manufactures. It provides a universal method |
| 41 | for probing the capabilities of flash devices. If you wish to |
| 42 | support any device that is CFI-compliant, you need to enable this |
| 43 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 44 | for more information on CFI. |
| 45 | |
| Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 46 | config SYS_FLASH_USE_BUFFER_WRITE |
| 47 | bool "Enable buffered writes to flash" |
| 48 | depends on FLASH_CFI_DRIVER |
| 49 | help |
| 50 | Use buffered writes to flash. |
| 51 | |
| 52 | config FLASH_CFI_MTD |
| 53 | bool "Enable CFI MTD driver" |
| 54 | depends on FLASH_CFI_DRIVER |
| 55 | help |
| 56 | This option enables the building of the cfi_mtd driver |
| 57 | in the drivers directory. The driver exports CFI flash |
| 58 | to the MTD layer. |
| 59 | |
| 60 | config SYS_FLASH_PROTECTION |
| 61 | bool "Use hardware flash protection" |
| 62 | depends on FLASH_CFI_DRIVER |
| 63 | help |
| 64 | If defined, hardware flash sectors protection is used |
| 65 | instead of U-Boot software protection. |
| 66 | |
| 67 | config SYS_FLASH_CFI |
| 68 | bool "Define extra elements in CFI for flash geometry" |
| 69 | depends on FLASH_CFI_DRIVER |
| 70 | help |
| 71 | Define if the flash driver uses extra elements in the |
| 72 | common flash structure for storing flash geometry. |
| 73 | |
| Thomas Chou | cdc1152 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 74 | config ALTERA_QSPI |
| 75 | bool "Altera Generic Quad SPI Controller" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 76 | depends on DM_MTD |
| Thomas Chou | cdc1152 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 77 | help |
| 78 | This enables access to Altera EPCQ/EPCS flash chips using the |
| 79 | Altera Generic Quad SPI Controller. The controller converts SPI |
| 80 | NOR flash to parallel flash interface. Please find details on the |
| 81 | "Embedded Peripherals IP User Guide" of Altera. |
| 82 | |
| Purna Chandra Mandal | 1d73e9b | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 83 | config FLASH_PIC32 |
| 84 | bool "Microchip PIC32 Flash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 85 | depends on MACH_PIC32 && DM_MTD |
| Purna Chandra Mandal | 1d73e9b | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 86 | help |
| 87 | This enables access to Microchip PIC32 internal non-CFI flash |
| 88 | chips through PIC32 Non-Volatile-Memory Controller. |
| 89 | |
| Marek Vasut | c1cb356 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 90 | config RENESAS_RPC_HF |
| 91 | bool "Renesas RCar Gen3 RPC Hyperflash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 92 | depends on RCAR_GEN3 && DM_MTD |
| Marek Vasut | c1cb356 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 93 | help |
| 94 | This enables access to Hyperflash memory through the Renesas |
| 95 | RCar Gen3 RPC controller. |
| 96 | |
| Vignesh Raghavendra | 2736c67 | 2019-10-23 13:30:01 +0530 | [diff] [blame] | 97 | config HBMC_AM654 |
| 98 | bool "HyperBus controller driver for AM65x SoC" |
| 99 | depends on SYSCON |
| 100 | help |
| 101 | This is the driver for HyperBus controller on TI's AM65x and |
| 102 | other SoCs |
| 103 | |
| Masahiro Yamada | c343b38 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 104 | source "drivers/mtd/nand/Kconfig" |
| Simon Glass | d8b771d | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 105 | |
| 106 | source "drivers/mtd/spi/Kconfig" |
| Heiko Schocher | 09dbb85 | 2016-09-21 07:58:19 +0200 | [diff] [blame] | 107 | |
| 108 | source "drivers/mtd/ubi/Kconfig" |
| Miquel Raynal | a4e7e21 | 2018-08-16 17:30:06 +0200 | [diff] [blame] | 109 | |
| 110 | endmenu |