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wdenkc4cbd342005-01-09 18:21:42 +00001/*
2 * Configuation settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenkc4cbd342005-01-09 18:21:42 +00007 */
8
9/* ---
10 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Date: 2004-03-29
12 * Author: Florian Schlote
13 *
14 * For a description of configuration options please refer also to the
15 * general u-boot-1.x.x/README file
16 * ---
17 */
18
19/* ---
20 * board/config.h - configuration options, board specific
21 * ---
22 */
23
24#ifndef _CONFIG_COBRA5272_H
25#define _CONFIG_COBRA5272_H
26
27/* ---
wdenkc4cbd342005-01-09 18:21:42 +000028 * Defines processor clock - important for correct timings concerning serial
29 * interface etc.
wdenkc4cbd342005-01-09 18:21:42 +000030 * ---
31 */
32
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020033#define CONFIG_SYS_CLK 66000000
34#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenkc4cbd342005-01-09 18:21:42 +000035
36/* ---
37 * Enable use of Ethernet
38 * ---
39 */
TsiChungLiewcfa2b482007-08-15 19:41:06 -050040#define CONFIG_MCFFEC
wdenkc4cbd342005-01-09 18:21:42 +000041
TsiChungLiewcfa2b482007-08-15 19:41:06 -050042/* Enable Dma Timer */
43#define CONFIG_MCFTMR
wdenkc4cbd342005-01-09 18:21:42 +000044
45/* ---
46 * Define baudrate for UART1 (console output, tftp, ...)
47 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020048 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenkc4cbd342005-01-09 18:21:42 +000049 * interface
50 * ---
51 */
52
TsiChungLiewcfa2b482007-08-15 19:41:06 -050053#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054#define CONFIG_SYS_UART_PORT (0)
wdenkc4cbd342005-01-09 18:21:42 +000055#define CONFIG_BAUDRATE 19200
wdenkc4cbd342005-01-09 18:21:42 +000056
57/* ---
58 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
59 * timeout acc. to your needs
60 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
61 * for 10 sec
62 * ---
63 */
64
65#if 0
66#define CONFIG_WATCHDOG
67#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
68#endif
69
70/* ---
71 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
72 * bootloader residing in flash ('chainloading'); if you want to use
73 * chainloading or want to compile a u-boot binary that can be loaded into
74 * RAM via BDM set
Wolfgang Denka1be4762008-05-20 16:00:29 +020075 * "#if 0" to "#if 1"
wdenkc4cbd342005-01-09 18:21:42 +000076 * You will need a first stage bootloader then, e. g. colilo or a working BDM
77 * cable (Background Debug Mode)
78 *
79 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
80 *
Wolfgang Denk0708bc62010-10-07 21:51:12 +020081 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
wdenkc4cbd342005-01-09 18:21:42 +000082 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
83 *
84 * ---
85 */
86
87#if 0
88#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
89#endif
90
91/* ---
92 * Configuration for environment
93 * Environment is embedded in u-boot in the second sector of the flash
94 * ---
95 */
96
97#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020098#define CONFIG_ENV_OFFSET 0x4000
99#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200100#define CONFIG_ENV_IS_IN_FLASH 1
wdenkc4cbd342005-01-09 18:21:42 +0000101#else
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200102#define CONFIG_ENV_ADDR 0xffe04000
103#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200104#define CONFIG_ENV_IS_IN_FLASH 1
wdenkc4cbd342005-01-09 18:21:42 +0000105#endif
106
angelo@sysam.it6312a952015-03-29 22:54:16 +0200107#define LDS_BOARD_TEXT \
108 . = DEFINED(env_offset) ? env_offset : .; \
109 common/env_embedded.o (.text);
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500110
111/*
Jon Loeligere54e77a2007-07-10 09:29:01 -0500112 * BOOTP options
113 */
114#define CONFIG_BOOTP_BOOTFILESIZE
115#define CONFIG_BOOTP_BOOTPATH
116#define CONFIG_BOOTP_GATEWAY
117#define CONFIG_BOOTP_HOSTNAME
118
119
120/*
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500121 * Command line configuration.
wdenkc4cbd342005-01-09 18:21:42 +0000122 */
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500123#include <config_cmd_default.h>
wdenkc4cbd342005-01-09 18:21:42 +0000124
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500125#define CONFIG_CMD_PING
wdenkc4cbd342005-01-09 18:21:42 +0000126
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500127#undef CONFIG_CMD_LOADS
128#undef CONFIG_CMD_LOADB
129#undef CONFIG_CMD_MII
130
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500131#ifdef CONFIG_MCFFEC
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500132# define CONFIG_MII 1
TsiChung Liewb3162452008-03-30 01:22:13 -0500133# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134# define CONFIG_SYS_DISCOVER_PHY
135# define CONFIG_SYS_RX_ETH_BUFFER 8
136# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500137
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138# define CONFIG_SYS_FEC0_PINMUX 0
139# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denka1be4762008-05-20 16:00:29 +0200140# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
142# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500143# define FECDUPLEX FULL
144# define FECSPEED _100BASET
145# else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
147# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500148# endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500150#endif
wdenkc4cbd342005-01-09 18:21:42 +0000151
152/*
153 *-----------------------------------------------------------------------------
154 * Define user parameters that have to be customized most likely
155 *-----------------------------------------------------------------------------
156 */
157
158/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
159
160#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
161seconds u-boot will wait before starting defined (auto-)boot command, setting
162to -1 disables delay, setting to 0 will too prevent access to u-boot command
163interface: u-boot then has to reflashed */
164
165
166/* The following settings will be contained in the environment block ; if you
167want to use a neutral environment all those settings can be manually set in
168u-boot: 'set' command */
169
170#if 0
171
172#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
173enter a valid image address in flash */
174
175#define CONFIG_BOOTARGS " " /* default bootargs that are
176considered during boot */
177
178/* User network settings */
179
180#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
181#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
182#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
183
184#endif
185
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/
wdenkc4cbd342005-01-09 18:21:42 +0000187
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
wdenkc4cbd342005-01-09 18:21:42 +0000189from which user programs will be started */
190
191/*---*/
192
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_LONGHELP /* undef to save memory */
wdenkc4cbd342005-01-09 18:21:42 +0000194
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500195#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200196#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000197#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200198#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000199#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
201#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
202#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000203
204/*
205 *-----------------------------------------------------------------------------
206 * End of user parameters to be customized
207 *-----------------------------------------------------------------------------
208 */
209
210/* ---
211 * Defines memory range for test
212 * ---
213 */
214
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200215#define CONFIG_SYS_MEMTEST_START 0x400
216#define CONFIG_SYS_MEMTEST_END 0x380000
wdenkc4cbd342005-01-09 18:21:42 +0000217
218/* ---
219 * Low Level Configuration Settings
220 * (address mappings, register initial values, etc.)
221 * You should know what you are doing if you make changes here.
222 * ---
223 */
224
225/* ---
226 * Base register address
227 * ---
228 */
229
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenkc4cbd342005-01-09 18:21:42 +0000231
232/* ---
233 * System Conf. Reg. & System Protection Reg.
234 * ---
235 */
236
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_SCR 0x0003
238#define CONFIG_SYS_SPR 0xffff
wdenkc4cbd342005-01-09 18:21:42 +0000239
240/* ---
241 * Ethernet settings
242 * ---
243 */
244
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200245#define CONFIG_SYS_DISCOVER_PHY
246#define CONFIG_SYS_ENET_BD_BASE 0x780000
wdenkc4cbd342005-01-09 18:21:42 +0000247
248/*-----------------------------------------------------------------------
249 * Definitions for initial stack pointer and data area (in internal SRAM)
250 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200252#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +0200253#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200254#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkc4cbd342005-01-09 18:21:42 +0000255
256/*-----------------------------------------------------------------------
257 * Start addresses for the final memory configuration
258 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200259 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc4cbd342005-01-09 18:21:42 +0000260 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenkc4cbd342005-01-09 18:21:42 +0000262
263/*
264 *-------------------------------------------------------------------------
265 * RAM SIZE (is defined above)
266 *-----------------------------------------------------------------------
267 */
268
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200269/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenkc4cbd342005-01-09 18:21:42 +0000270
271/*
272 *-----------------------------------------------------------------------
273 */
274
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200275#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenkc4cbd342005-01-09 18:21:42 +0000276
277#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200278#define CONFIG_SYS_MONITOR_BASE 0x20000
wdenkc4cbd342005-01-09 18:21:42 +0000279#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200280#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
wdenkc4cbd342005-01-09 18:21:42 +0000281#endif
282
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200283#define CONFIG_SYS_MONITOR_LEN 0x20000
284#define CONFIG_SYS_MALLOC_LEN (256 << 10)
285#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenkc4cbd342005-01-09 18:21:42 +0000286
287/*
288 * For booting Linux, the board info and command line data
289 * have to be in the first 8 MB of memory, since this is
290 * the maximum mapped by the Linux kernel during initialization ??
291 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200292#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc4cbd342005-01-09 18:21:42 +0000293
294/*-----------------------------------------------------------------------
295 * FLASH organization
296 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200297#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
298#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
299#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
wdenkc4cbd342005-01-09 18:21:42 +0000300
301/*-----------------------------------------------------------------------
302 * Cache Configuration
303 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200304#define CONFIG_SYS_CACHELINE_SIZE 16
wdenkc4cbd342005-01-09 18:21:42 +0000305
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600306#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200307 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600308#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200309 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600310#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
311#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
312 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
313 CF_ACR_EN | CF_ACR_SM_ALL)
314#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
315 CF_CACR_DISD | CF_CACR_INVI | \
316 CF_CACR_CEIB | CF_CACR_DCM | \
317 CF_CACR_EUSP)
318
wdenkc4cbd342005-01-09 18:21:42 +0000319/*-----------------------------------------------------------------------
320 * Memory bank definitions
321 *
322 * Please refer also to Motorola Coldfire user manual - Chapter XXX
323 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
324 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200325#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
326#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
wdenkc4cbd342005-01-09 18:21:42 +0000327
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200328#define CONFIG_SYS_BR1_PRELIM 0
329#define CONFIG_SYS_OR1_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000330
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200331#define CONFIG_SYS_BR2_PRELIM 0
332#define CONFIG_SYS_OR2_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000333
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200334#define CONFIG_SYS_BR3_PRELIM 0
335#define CONFIG_SYS_OR3_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000336
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200337#define CONFIG_SYS_BR4_PRELIM 0
338#define CONFIG_SYS_OR4_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000339
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200340#define CONFIG_SYS_BR5_PRELIM 0
341#define CONFIG_SYS_OR5_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000342
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200343#define CONFIG_SYS_BR6_PRELIM 0
344#define CONFIG_SYS_OR6_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000345
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200346#define CONFIG_SYS_BR7_PRELIM 0x00000701
347#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
wdenkc4cbd342005-01-09 18:21:42 +0000348
349/*-----------------------------------------------------------------------
350 * LED config
351 */
352#define LED_STAT_0 0xffff /*all LEDs off*/
353#define LED_STAT_1 0xfffe
354#define LED_STAT_2 0xfffd
355#define LED_STAT_3 0xfffb
356#define LED_STAT_4 0xfff7
357#define LED_STAT_5 0xffef
358#define LED_STAT_6 0xffdf
359#define LED_STAT_7 0xff00 /*all LEDs on*/
360
361/*-----------------------------------------------------------------------
362 * Port configuration (GPIO)
363 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200364#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenkc4cbd342005-01-09 18:21:42 +0000365GPIO*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200366#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenkc4cbd342005-01-09 18:21:42 +0000367(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200368#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
369#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenkc4cbd342005-01-09 18:21:42 +0000370configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200371#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
372#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
373#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenkc4cbd342005-01-09 18:21:42 +0000374
375#endif /* _CONFIG_COBRA5272_H */