blob: 9b2770f9d117ad44ec8c5d1907127c4fdeae5315 [file] [log] [blame]
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09001/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000026#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000027#include <lcd.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090028#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000029#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090030#include <asm/arch/adc.h>
31#include <asm/arch/gpio.h>
32#include <asm/arch/mmc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000033#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000034#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000035#include <libtizen.h>
36#include <ld9040.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000037#include <power/pmic.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010038#include <usb/s3c_udc.h>
39#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000040#include <power/max8998_pmic.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090041
42DECLARE_GLOBAL_DATA_PTR;
43
Chander Kashyap4131a772011-12-06 23:34:12 +000044struct exynos4_gpio_part1 *gpio1;
45struct exynos4_gpio_part2 *gpio2;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090046unsigned int board_rev;
47
48u32 get_board_rev(void)
49{
50 return board_rev;
51}
52
53static int get_hwrev(void)
54{
55 return board_rev & 0xFF;
56}
57
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000058static void init_pmic_lcd(void);
59
Łukasz Majewski11be2832012-11-13 03:22:17 +000060int power_init_board(void)
61{
62 int ret;
63
64 ret = pmic_init(I2C_5);
65 if (ret)
66 return ret;
67
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000068 init_pmic_lcd();
69
Łukasz Majewski11be2832012-11-13 03:22:17 +000070 return 0;
71}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090072
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090073int dram_init(void)
74{
75 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
76 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
77
78 return 0;
79}
80
81void dram_init_banksize(void)
82{
83 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
84 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
85 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
86 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
87}
88
89static unsigned short get_adc_value(int channel)
90{
91 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
92 unsigned short ret = 0;
93 unsigned int reg;
94 unsigned int loop = 0;
95
96 writel(channel & 0xF, &adc->adcmux);
97 writel((1 << 14) | (49 << 6), &adc->adccon);
98 writel(1000 & 0xffff, &adc->adcdly);
99 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
100 udelay(10);
101 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
102 udelay(10);
103
104 do {
105 udelay(1);
106 reg = readl(&adc->adccon);
107 } while (!(reg & (1 << 15)) && (loop++ < 1000));
108
109 ret = readl(&adc->adcdat0) & 0xFFF;
110
111 return ret;
112}
113
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000114static int adc_power_control(int on)
115{
116 int ret;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000117 struct pmic *p = pmic_get("MAX8998_PMIC");
118 if (!p)
119 return -ENODEV;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000120
121 if (pmic_probe(p))
122 return -1;
123
124 ret = pmic_set_output(p,
125 MAX8998_REG_ONOFF1,
126 MAX8998_LDO4, !!on);
127
128 return ret;
129}
130
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900131static unsigned int get_hw_revision(void)
132{
133 int hwrev, mode0, mode1;
134
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000135 adc_power_control(1);
136
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900137 mode0 = get_adc_value(1); /* HWREV_MODE0 */
138 mode1 = get_adc_value(2); /* HWREV_MODE1 */
139
140 /*
141 * XXX Always set the default hwrev as the latest board
142 * ADC = (voltage) / 3.3 * 4096
143 */
144 hwrev = 3;
145
146#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
147 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
148 hwrev = 0x0; /* 0.01V 0.01V */
149 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
150 hwrev = 0x1; /* 610mV 0.01V */
151 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
152 hwrev = 0x2; /* 1.16V 0.01V */
153 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
154 hwrev = 0x3; /* 1.79V 0.01V */
155#undef IS_RANGE
156
157 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
158
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000159 adc_power_control(0);
160
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900161 return hwrev;
162}
163
164static void check_hw_revision(void)
165{
166 int hwrev;
167
168 hwrev = get_hw_revision();
169
170 board_rev |= hwrev;
171}
172
173#ifdef CONFIG_DISPLAY_BOARDINFO
174int checkboard(void)
175{
176 puts("Board:\tUniversal C210\n");
177 return 0;
178}
179#endif
180
181#ifdef CONFIG_GENERIC_MMC
182int board_mmc_init(bd_t *bis)
183{
Piotr Wilczek3b179142012-09-20 00:19:59 +0000184 int err;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900185
186 switch (get_hwrev()) {
187 case 0:
188 /*
189 * Set the low to enable LDO_EN
190 * But when you use the test board for eMMC booting
191 * you should set it HIGH since it removes the inverter
192 */
193 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000194 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900195 break;
196 default:
197 /*
198 * Default reset state is High and there's no inverter
199 * But set it as HIGH to ensure
200 */
201 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000202 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900203 break;
204 }
205
206 /*
Piotr Wilczek3b179142012-09-20 00:19:59 +0000207 * MMC device init
208 * mmc0 : eMMC (8-bit buswidth)
209 * mmc2 : SD card (4-bit buswidth)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900210 */
Piotr Wilczek3b179142012-09-20 00:19:59 +0000211 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
212 if (err)
213 debug("SDMMC0 not configured\n");
214 else
215 err = s5p_mmc_init(0, 8);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900216
217 /* T-flash detect */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000218 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
219 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900220
221 /*
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900222 * Check the T-flash detect pin
223 * GPX3[4] T-flash detect pin
224 */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000225 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
Piotr Wilczek3b179142012-09-20 00:19:59 +0000226 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
227 if (err)
228 debug("SDMMC2 not configured\n");
229 else
230 err = s5p_mmc_init(2, 4);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900231 }
232
233 return err;
234
235}
236#endif
Lukasz Majewskibf731262011-12-15 10:32:12 +0100237
238#ifdef CONFIG_USB_GADGET
239static int s5pc210_phy_control(int on)
240{
Anatolij Gustschinba166612011-12-19 04:20:04 +0000241 int ret = 0;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000242 struct pmic *p = pmic_get("MAX8998_PMIC");
243 if (!p)
244 return -ENODEV;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100245
246 if (pmic_probe(p))
247 return -1;
248
249 if (on) {
250 ret |= pmic_set_output(p,
251 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
252 MAX8998_SAFEOUT1, LDO_ON);
253 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
254 MAX8998_LDO3, LDO_ON);
255 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
256 MAX8998_LDO8, LDO_ON);
257
258 } else {
259 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
260 MAX8998_LDO8, LDO_OFF);
261 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
262 MAX8998_LDO3, LDO_OFF);
263 ret |= pmic_set_output(p,
264 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
265 MAX8998_SAFEOUT1, LDO_OFF);
266 }
267
268 if (ret) {
269 puts("MAX8998 LDO setting error!\n");
270 return -1;
271 }
272
273 return 0;
274}
275
276struct s3c_plat_otg_data s5pc210_otg_data = {
277 .phy_control = s5pc210_phy_control,
278 .regs_phy = EXYNOS4_USBPHY_BASE,
279 .regs_otg = EXYNOS4_USBOTG_BASE,
280 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
281 .usb_flags = PHY0_SLEEP,
282};
283#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000284
285int board_early_init_f(void)
286{
287 wdt_stop();
288
289 return 0;
290}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000291
292#ifdef CONFIG_SOFT_SPI
293static void soft_spi_init(void)
294{
295 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
296 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
297 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
298 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
299 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
300 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
301}
302
303void spi_cs_activate(struct spi_slave *slave)
304{
305 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
306 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
307 SPI_SCL(1);
308 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
309 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
310}
311
312void spi_cs_deactivate(struct spi_slave *slave)
313{
314 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
315 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
316}
317
318int spi_cs_is_valid(unsigned int bus, unsigned int cs)
319{
320 return bus == 0 && cs == 0;
321}
322
323void universal_spi_scl(int bit)
324{
325 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
326}
327
328void universal_spi_sda(int bit)
329{
330 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
331}
332
333int universal_spi_read(void)
334{
335 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
336}
337#endif
338
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000339static void init_pmic_lcd(void)
340{
341 unsigned char val;
342 int ret = 0;
343
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000344 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000345
Minkyu Kang538f26b2012-12-10 22:43:57 +0900346 if (!p)
347 return;
348
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000349 if (pmic_probe(p))
350 return;
351
352 /* LDO7 1.8V */
353 val = 0x02; /* (1800 - 1600) / 100; */
354 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
355
356 /* LDO17 3.0V */
357 val = 0xe; /* (3000 - 1600) / 100; */
358 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
359
360 /* Disable unneeded regulators */
361 /*
362 * ONOFF1
363 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
364 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
365 */
366 val = 0xB9;
367 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
368
369 /* ONOFF2
370 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
371 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
372 */
373 val = 0x50;
374 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
375
376 /* ONOFF3
377 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
378 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
379 */
380 val = 0x00;
381 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
382
383 if (ret)
384 puts("LCD pmic initialisation error!\n");
385}
386
Ajay Kumar41022a12013-02-21 23:52:57 +0000387void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000388{
389 unsigned int i, f3_end = 4;
390
391 for (i = 0; i < 8; i++) {
392 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
393 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
394 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
395 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
396 /* pull-up/down disable */
397 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
398 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
399 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
400
401 /* drive strength to max (24bit) */
402 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
403 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
404 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
405 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
406 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
407 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
408 }
409
410 for (i = 0; i < f3_end; i++) {
411 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
412 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
413 /* pull-up/down disable */
414 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
415 /* drive strength to max (24bit) */
416 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
417 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
418 }
419
420 /* gpio pad configuration for LCD reset. */
421 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
422
423 spi_init();
424}
425
Ajay Kumar41022a12013-02-21 23:52:57 +0000426void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000427{
428 s5p_gpio_set_value(&gpio2->y4, 5, 1);
429 udelay(10000);
430 s5p_gpio_set_value(&gpio2->y4, 5, 0);
431 udelay(10000);
432 s5p_gpio_set_value(&gpio2->y4, 5, 1);
433 udelay(100);
434}
435
Ajay Kumar41022a12013-02-21 23:52:57 +0000436void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000437{
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000438 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000439
Minkyu Kang538f26b2012-12-10 22:43:57 +0900440 if (!p)
441 return;
442
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000443 if (pmic_probe(p))
444 return;
445
446 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
447 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
448}
449
450vidinfo_t panel_info = {
451 .vl_freq = 60,
452 .vl_col = 480,
453 .vl_row = 800,
454 .vl_width = 480,
455 .vl_height = 800,
456 .vl_clkp = CONFIG_SYS_HIGH,
457 .vl_hsp = CONFIG_SYS_HIGH,
458 .vl_vsp = CONFIG_SYS_HIGH,
459 .vl_dp = CONFIG_SYS_HIGH,
460
461 .vl_bpix = 5, /* Bits per pixel */
462
463 /* LD9040 LCD Panel */
464 .vl_hspw = 2,
465 .vl_hbpd = 16,
466 .vl_hfpd = 16,
467
468 .vl_vspw = 2,
469 .vl_vbpd = 8,
470 .vl_vfpd = 8,
471 .vl_cmd_allow_len = 0xf,
472
473 .win_id = 0,
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000474 .dual_lcd_enabled = 0,
475
476 .init_delay = 0,
477 .power_on_delay = 10000,
478 .reset_delay = 10000,
479 .interface_mode = FIMD_RGB_INTERFACE,
480 .mipi_enabled = 0,
481};
482
Ajay Kumar41022a12013-02-21 23:52:57 +0000483void exynos_cfg_ldo(void)
484{
485 ld9040_cfg_ldo();
486}
487
488void exynos_enable_ldo(unsigned int onoff)
489{
490 ld9040_enable_ldo(onoff);
491}
492
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000493void init_panel_info(vidinfo_t *vid)
494{
495 vid->logo_on = 1;
496 vid->resolution = HD_RESOLUTION;
497 vid->rgb_mode = MODE_RGB_P;
498
499#ifdef CONFIG_TIZEN
500 get_tizen_logo_info(vid);
501#endif
502
503 /* for LD9040. */
504 vid->pclk_name = 1; /* MPLL */
505 vid->sclk_div = 1;
506
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000507 setenv("lcdinfo", "lcd=ld9040");
508}
509
Piotr Wilczeke372b552012-10-19 05:34:03 +0000510int board_init(void)
511{
512 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
513 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
514
515 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
516 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
517
Piotr Wilczeke372b552012-10-19 05:34:03 +0000518#ifdef CONFIG_SOFT_SPI
519 soft_spi_init();
520#endif
521 check_hw_revision();
522 printf("HW Revision:\t0x%x\n", board_rev);
523
524 return 0;
525}