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git01.mediatek.com / filogic / uboot / 61c517fce91179adcd4ded8855ddb7aadff31196 / . / board / LEOX / elpt860 / u-boot.lds
blob: 2b76e92e4f1a8deabcb4dac2e9374f25e13c4fa2 [file] [log] [blame]
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]1/*
2**=====================================================================
3**
4** Copyright (C) 2000, 2001, 2002, 2003
5** The LEOX team <team@leox.org>, http://www.leox.org
6**
7** LEOX.org is about the development of free hardware and software resources
8** for system on chip.
9**
10** Description: U-Boot port on the LEOX's ELPT860 CPU board
11** ~~~~~~~~~~~
12**
13**=====================================================================
14**
15** This program is free software; you can redistribute it and/or
16** modify it under the terms of the GNU General Public License as
17** published by the Free Software Foundation; either version 2 of
18** the License, or (at your option) any later version.
19**
20** This program is distributed in the hope that it will be useful,
21** but WITHOUT ANY WARRANTY; without even the implied warranty of
22** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23** GNU General Public License for more details.
24**
25** You should have received a copy of the GNU General Public License
26** along with this program; if not, write to the Free Software
27** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28** MA 02111-1307 USA
29**
30**=====================================================================
31*/
32
33OUTPUT_ARCH(powerpc)
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]34
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]35SECTIONS
36{
37 /* Read-only sections, merged into text segment: */
38 . = + SIZEOF_HEADERS;
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]39 .text :
40 {
41 /* WARNING - the following is hand-optimized to fit within */
42 /* the sector layout of our flash chips! XXX FIXME XXX */
43
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]44 arch/powerpc/cpu/mpc8xx/start.o (.text*)
45 arch/powerpc/cpu/mpc8xx/traps.o (.text*)
46 common/libcommon.o (.text*)
47 arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*)
48 board/LEOX/elpt860/libelpt860.o (.text*)
49 arch/powerpc/lib/libpowerpc.o (.text*)
50/* drivers/rtc/librtc.o (.text*) */
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]51
52 . = env_offset;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]53 common/env_embedded.o (.text*)
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]54
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]55 *(.text*)
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]56 }
57 _etext = .;
58 PROVIDE (etext = .);
59 .rodata :
60 {
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]61 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]62 }
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]63
64 /* Read-write section, merged into data segment: */
65 . = (. + 0x00FF) & 0xFFFFFF00;
66 _erotext = .;
67 PROVIDE (erotext = .);
68 .reloc :
69 {
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]70 _GOT2_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]71 KEEP(*(.got2))
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]72 KEEP(*(.got))
73 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]74 _FIXUP_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]75 KEEP(*(.fixup))
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]76 }
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]77 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]78 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
79
80 .data :
81 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]82 *(.data*)
83 *(.sdata*)
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]84 }
85 _edata = .;
86 PROVIDE (edata = .);
87
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]88 . = .;
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]89
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]90 . = ALIGN(4);
91 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]92 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]93 }
94
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]95 . = .;
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]96 __start___ex_table = .;
97 __ex_table : { *(__ex_table) }
98 __stop___ex_table = .;
99
100 . = ALIGN(256);
101 __init_begin = .;
102 .text.init : { *(.text.init) }
103 .data.init : { *(.data.init) }
104 . = ALIGN(256);
105 __init_end = .;
106
107 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]108 .bss (NOLOAD) :
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]109 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]110 *(.bss*)
111 *(.sbss*)
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]112 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]113 . = ALIGN(4);
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]114 }
Simon Glassed70c8f2013-03-14 06:54:53 +0000[diff] [blame]115 __bss_end = . ;
wdenkef5fe752003-03-12 10:41:04 +0000[diff] [blame]116 PROVIDE (end = .);
117}