| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/display/mediatek/mediatek,ufoe.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Mediatek display UFOe |
| 8 | |
| 9 | maintainers: |
| 10 | - Chun-Kuang Hu <chunkuang.hu@kernel.org> |
| 11 | - Philipp Zabel <p.zabel@pengutronix.de> |
| 12 | |
| 13 | description: | |
| 14 | Mediatek display UFOe stands for Unified Frame Optimization engine. |
| 15 | UFOe can cut the data rate for DSI port which may lead to reduce power |
| 16 | consumption. |
| 17 | UFOe device node must be siblings to the central MMSYS_CONFIG node. |
| 18 | For a description of the MMSYS_CONFIG binding, see |
| 19 | Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml |
| 20 | for details. |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | oneOf: |
| 25 | - enum: |
| 26 | - mediatek,mt8173-disp-ufoe |
| 27 | - items: |
| 28 | - const: mediatek,mt6795-disp-ufoe |
| 29 | - const: mediatek,mt8173-disp-ufoe |
| 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | interrupts: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | power-domains: |
| 38 | description: A phandle and PM domain specifier as defined by bindings of |
| 39 | the power controller specified by phandle. See |
| 40 | Documentation/devicetree/bindings/power/power-domain.yaml for details. |
| 41 | |
| 42 | clocks: |
| 43 | items: |
| 44 | - description: UFOe Clock |
| 45 | |
| 46 | required: |
| 47 | - compatible |
| 48 | - reg |
| 49 | - interrupts |
| 50 | - power-domains |
| 51 | - clocks |
| 52 | |
| 53 | additionalProperties: false |
| 54 | |
| 55 | examples: |
| 56 | - | |
| 57 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 58 | #include <dt-bindings/clock/mt8173-clk.h> |
| 59 | #include <dt-bindings/power/mt8173-power.h> |
| 60 | soc { |
| 61 | #address-cells = <2>; |
| 62 | #size-cells = <2>; |
| 63 | |
| 64 | ufoe@1401a000 { |
| 65 | compatible = "mediatek,mt8173-disp-ufoe"; |
| 66 | reg = <0 0x1401a000 0 0x1000>; |
| 67 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_LOW>; |
| 68 | power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; |
| 69 | clocks = <&mmsys CLK_MM_DISP_UFOE>; |
| 70 | }; |
| 71 | }; |