Kever Yang | 0a2a5e1 | 2019-03-29 09:09:01 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | #include <common.h> |
| 6 | #include <asm/io.h> |
Kever Yang | 60b270e | 2019-07-22 19:59:17 +0800 | [diff] [blame^] | 7 | #include <asm/arch-rockchip/bootrom.h> |
Kever Yang | 0a2a5e1 | 2019-03-29 09:09:01 +0800 | [diff] [blame] | 8 | #include <asm/arch-rockchip/grf_rk3188.h> |
| 9 | #include <asm/arch-rockchip/hardware.h> |
| 10 | |
Kever Yang | 8fd6019 | 2019-07-22 19:59:14 +0800 | [diff] [blame] | 11 | #define GRF_BASE 0x20008000 |
| 12 | |
Kever Yang | 60b270e | 2019-07-22 19:59:17 +0800 | [diff] [blame^] | 13 | const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { |
| 14 | [BROM_BOOTSOURCE_EMMC] = "dwmmc@1021c000", |
| 15 | [BROM_BOOTSOURCE_SD] = "dwmmc@10214000", |
| 16 | }; |
| 17 | |
Kever Yang | 0a2a5e1 | 2019-03-29 09:09:01 +0800 | [diff] [blame] | 18 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 19 | void board_debug_uart_init(void) |
| 20 | { |
| 21 | /* Enable early UART on the RK3188 */ |
Kever Yang | 0a2a5e1 | 2019-03-29 09:09:01 +0800 | [diff] [blame] | 22 | struct rk3188_grf * const grf = (void *)GRF_BASE; |
| 23 | enum { |
| 24 | GPIO1B1_SHIFT = 2, |
| 25 | GPIO1B1_MASK = 3, |
| 26 | GPIO1B1_GPIO = 0, |
| 27 | GPIO1B1_UART2_SOUT, |
| 28 | GPIO1B1_JTAG_TDO, |
| 29 | |
| 30 | GPIO1B0_SHIFT = 0, |
| 31 | GPIO1B0_MASK = 3, |
| 32 | GPIO1B0_GPIO = 0, |
| 33 | GPIO1B0_UART2_SIN, |
| 34 | GPIO1B0_JTAG_TDI, |
| 35 | }; |
| 36 | |
| 37 | rk_clrsetreg(&grf->gpio1b_iomux, |
| 38 | GPIO1B1_MASK << GPIO1B1_SHIFT | |
| 39 | GPIO1B0_MASK << GPIO1B0_SHIFT, |
| 40 | GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | |
| 41 | GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); |
| 42 | } |
| 43 | #endif |
Kever Yang | 8fd6019 | 2019-07-22 19:59:14 +0800 | [diff] [blame] | 44 | |
| 45 | int arch_cpu_init(void) |
| 46 | { |
| 47 | #ifdef CONFIG_ROCKCHIP_USB_UART |
| 48 | struct rk3188_grf * const grf = (void *)GRF_BASE; |
| 49 | |
| 50 | rk_clrsetreg(&grf->uoc0_con[0], |
| 51 | SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK, |
| 52 | 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT | |
| 53 | 1 << COMMON_ON_N_SHIFT); |
| 54 | rk_clrsetreg(&grf->uoc0_con[2], |
| 55 | SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT); |
| 56 | rk_clrsetreg(&grf->uoc0_con[3], |
| 57 | OPMODE_MASK | XCVRSELECT_MASK | |
| 58 | TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK, |
| 59 | OPMODE_NODRIVING << OPMODE_SHIFT | |
| 60 | XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT | |
| 61 | 1 << TERMSEL_FULLSPEED_SHIFT | |
| 62 | 1 << SUSPENDN_SHIFT); |
| 63 | rk_clrsetreg(&grf->uoc0_con[0], |
| 64 | BYPASSSEL_MASK | BYPASSDMEN_MASK, |
| 65 | 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT); |
| 66 | #endif |
| 67 | return 0; |
| 68 | } |
Kever Yang | 96bf25a | 2019-07-22 19:59:16 +0800 | [diff] [blame] | 69 | |
| 70 | #ifdef CONFIG_SPL_BUILD |
| 71 | static int setup_led(void) |
| 72 | { |
| 73 | #ifdef CONFIG_SPL_LED |
| 74 | struct udevice *dev; |
| 75 | char *led_name; |
| 76 | int ret; |
| 77 | |
| 78 | led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); |
| 79 | if (!led_name) |
| 80 | return 0; |
| 81 | ret = led_get_by_label(led_name, &dev); |
| 82 | if (ret) { |
| 83 | debug("%s: get=%d\n", __func__, ret); |
| 84 | return ret; |
| 85 | } |
| 86 | ret = led_set_on(dev, 1); |
| 87 | if (ret) |
| 88 | return ret; |
| 89 | #endif |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | void spl_board_init(void) |
| 95 | { |
| 96 | int ret; |
| 97 | |
| 98 | ret = setup_led(); |
| 99 | if (ret) { |
| 100 | debug("LED ret=%d\n", ret); |
| 101 | hang(); |
| 102 | } |
| 103 | } |
| 104 | #endif |