blob: af9044a3c2b036d5a5e04ae869796f1899b109e6 [file] [log] [blame]
Jagan Teki35049fe2021-04-26 18:23:48 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Engicam s.r.l.
4 * Copyright (C) 2020 Amarula Solutions(India)
5 * Author: Jagan Teki <jagan@amarulasolutions.com>
6 */
7
8#include <common.h>
9#include <hang.h>
10#include <init.h>
11#include <log.h>
12#include <spl.h>
13#include <asm/mach-imx/iomux-v3.h>
14#include <asm/arch/clock.h>
15#include <asm/arch/imx8mm_pins.h>
16#include <asm/arch/sys_proto.h>
17#include <asm/mach-imx/boot_mode.h>
18#include <asm/arch/ddr.h>
Shiji Yangbb112342023-08-03 09:47:16 +080019#include <asm/sections.h>
Jagan Teki35049fe2021-04-26 18:23:48 +053020
21DECLARE_GLOBAL_DATA_PTR;
22
23int spl_board_boot_device(enum boot_device boot_dev_spl)
24{
25 switch (boot_dev_spl) {
26 case SD1_BOOT:
27 case SD2_BOOT:
28 case MMC2_BOOT:
29 return BOOT_DEVICE_MMC1;
30 case SD3_BOOT:
31 case MMC3_BOOT:
32 return BOOT_DEVICE_MMC2;
33 default:
34 return BOOT_DEVICE_NONE;
35 }
36}
37
38static void spl_dram_init(void)
39{
40 ddr_init(&dram_timing);
41}
42
43void spl_board_init(void)
44{
45 debug("Normal Boot\n");
46}
47
48#ifdef CONFIG_SPL_LOAD_FIT
49int board_fit_config_name_match(const char *name)
50{
51 /* Just empty function now - can't decide what to choose */
52 debug("%s: %s\n", __func__, name);
53
54 return 0;
55}
56#endif
57
Jagan Teki35049fe2021-04-26 18:23:48 +053058int board_early_init_f(void)
59{
Peng Fan9f777272022-06-11 20:20:57 +080060 return 0;
Jagan Teki35049fe2021-04-26 18:23:48 +053061}
62
63void board_init_f(ulong dummy)
64{
65 int ret;
66
67 arch_cpu_init();
68
69 init_uart_clk(1);
70
71 board_early_init_f();
72
73 timer_init();
74
Jagan Teki35049fe2021-04-26 18:23:48 +053075 /* Clear the BSS. */
76 memset(__bss_start, 0, __bss_end - __bss_start);
77
78 ret = spl_early_init();
79 if (ret) {
80 debug("spl_early_init() failed: %d\n", ret);
81 hang();
82 }
83
Peng Fan9f777272022-06-11 20:20:57 +080084 preloader_console_init();
85
Jagan Teki35049fe2021-04-26 18:23:48 +053086 enable_tzc380();
87
88 /* DDR initialization */
89 spl_dram_init();
90
91 board_init_r(NULL, 0);
92}