Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
Ye Li | c408ed3 | 2022-07-26 16:40:49 +0800 | [diff] [blame] | 3 | * Copyright 2020-2022 NXP |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <asm/io.h> |
| 8 | #include <dm.h> |
| 9 | #include <dm/lists.h> |
| 10 | #include <dm/root.h> |
| 11 | #include <dm/device-internal.h> |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 12 | #include <asm/mach-imx/ele_api.h> |
Peng Fan | f6928f9 | 2021-08-07 16:01:09 +0800 | [diff] [blame] | 13 | #include <asm/arch/imx-regs.h> |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 14 | #include <linux/iopoll.h> |
| 15 | #include <misc.h> |
| 16 | |
| 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 19 | struct imx8ulp_mu { |
| 20 | struct mu_type *base; |
| 21 | }; |
| 22 | |
| 23 | #define MU_SR_TE0_MASK BIT(0) |
| 24 | #define MU_SR_RF0_MASK BIT(0) |
Ye Li | 606fbf4 | 2023-06-15 18:09:12 +0800 | [diff] [blame^] | 25 | #define MU_TR_COUNT 8 |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 26 | #define MU_RR_COUNT 4 |
| 27 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 28 | void mu_hal_init(ulong base) |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 29 | { |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 30 | struct mu_type *mu_base = (struct mu_type *)base; |
| 31 | |
| 32 | writel(0, &mu_base->tcr); |
| 33 | writel(0, &mu_base->rcr); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 34 | } |
| 35 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 36 | int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg) |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 37 | { |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 38 | struct mu_type *mu_base = (struct mu_type *)base; |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 39 | u32 mask = MU_SR_TE0_MASK << reg_index; |
| 40 | u32 val; |
| 41 | int ret; |
| 42 | |
| 43 | assert(reg_index < MU_TR_COUNT); |
| 44 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 45 | debug("sendmsg sr 0x%x\n", readl(&mu_base->sr)); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 46 | |
| 47 | /* Wait TX register to be empty. */ |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 48 | ret = readl_poll_timeout(&mu_base->tsr, val, val & mask, 10000); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 49 | if (ret < 0) { |
| 50 | debug("%s timeout\n", __func__); |
| 51 | return -ETIMEDOUT; |
| 52 | } |
| 53 | |
| 54 | debug("tr[%d] 0x%x\n", reg_index, msg); |
| 55 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 56 | writel(msg, &mu_base->tr[reg_index]); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 57 | |
| 58 | return 0; |
| 59 | } |
| 60 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 61 | int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg) |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 62 | { |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 63 | struct mu_type *mu_base = (struct mu_type *)base; |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 64 | u32 mask = MU_SR_RF0_MASK << reg_index; |
| 65 | u32 val; |
| 66 | int ret; |
| 67 | |
Ye Li | 606fbf4 | 2023-06-15 18:09:12 +0800 | [diff] [blame^] | 68 | assert(reg_index < MU_RR_COUNT); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 69 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 70 | debug("receivemsg sr 0x%x\n", readl(&mu_base->sr)); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 71 | |
| 72 | /* Wait RX register to be full. */ |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 73 | ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 10000); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 74 | if (ret < 0) { |
| 75 | debug("%s timeout\n", __func__); |
| 76 | return -ETIMEDOUT; |
| 77 | } |
| 78 | |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 79 | *msg = readl(&mu_base->rr[reg_index]); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 80 | |
| 81 | debug("rr[%d] 0x%x\n", reg_index, *msg); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static int imx8ulp_mu_read(struct mu_type *base, void *data) |
| 87 | { |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 88 | struct ele_msg *msg = (struct ele_msg *)data; |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 89 | int ret; |
| 90 | u8 count = 0; |
| 91 | |
| 92 | if (!msg) |
| 93 | return -EINVAL; |
| 94 | |
| 95 | /* Read first word */ |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 96 | ret = mu_hal_receivemsg((ulong)base, 0, (u32 *)msg); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 97 | if (ret) |
| 98 | return ret; |
| 99 | count++; |
| 100 | |
| 101 | /* Check size */ |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 102 | if (msg->size > ELE_MAX_MSG) { |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 103 | *((u32 *)msg) = 0; |
| 104 | return -EINVAL; |
| 105 | } |
| 106 | |
| 107 | /* Read remaining words */ |
| 108 | while (count < msg->size) { |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 109 | ret = mu_hal_receivemsg((ulong)base, count % MU_RR_COUNT, |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 110 | &msg->data[count - 1]); |
| 111 | if (ret) |
| 112 | return ret; |
| 113 | count++; |
| 114 | } |
| 115 | |
| 116 | return 0; |
| 117 | } |
| 118 | |
| 119 | static int imx8ulp_mu_write(struct mu_type *base, void *data) |
| 120 | { |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 121 | struct ele_msg *msg = (struct ele_msg *)data; |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 122 | int ret; |
| 123 | u8 count = 0; |
| 124 | |
| 125 | if (!msg) |
| 126 | return -EINVAL; |
| 127 | |
| 128 | /* Check size */ |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 129 | if (msg->size > ELE_MAX_MSG) |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 130 | return -EINVAL; |
| 131 | |
| 132 | /* Write first word */ |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 133 | ret = mu_hal_sendmsg((ulong)base, 0, *((u32 *)msg)); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 134 | if (ret) |
| 135 | return ret; |
| 136 | count++; |
| 137 | |
| 138 | /* Write remaining words */ |
| 139 | while (count < msg->size) { |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 140 | ret = mu_hal_sendmsg((ulong)base, count % MU_TR_COUNT, |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 141 | msg->data[count - 1]); |
| 142 | if (ret) |
| 143 | return ret; |
| 144 | count++; |
| 145 | } |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | /* |
| 151 | * Note the function prototype use msgid as the 2nd parameter, here |
| 152 | * we take it as no_resp. |
| 153 | */ |
| 154 | static int imx8ulp_mu_call(struct udevice *dev, int no_resp, void *tx_msg, |
| 155 | int tx_size, void *rx_msg, int rx_size) |
| 156 | { |
| 157 | struct imx8ulp_mu *priv = dev_get_priv(dev); |
| 158 | u32 result; |
| 159 | int ret; |
| 160 | |
| 161 | /* Expect tx_msg, rx_msg are the same value */ |
| 162 | if (rx_msg && tx_msg != rx_msg) |
| 163 | printf("tx_msg %p, rx_msg %p\n", tx_msg, rx_msg); |
| 164 | |
| 165 | ret = imx8ulp_mu_write(priv->base, tx_msg); |
| 166 | if (ret) |
| 167 | return ret; |
| 168 | if (!no_resp) { |
| 169 | ret = imx8ulp_mu_read(priv->base, rx_msg); |
| 170 | if (ret) |
| 171 | return ret; |
| 172 | } |
| 173 | |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 174 | result = ((struct ele_msg *)rx_msg)->data[0]; |
Ye Li | 79581a6 | 2021-08-07 16:00:51 +0800 | [diff] [blame] | 175 | if ((result & 0xff) == 0xd6) |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 176 | return 0; |
| 177 | |
| 178 | return -EIO; |
| 179 | } |
| 180 | |
| 181 | static int imx8ulp_mu_probe(struct udevice *dev) |
| 182 | { |
| 183 | struct imx8ulp_mu *priv = dev_get_priv(dev); |
| 184 | fdt_addr_t addr; |
| 185 | |
| 186 | debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv); |
| 187 | |
| 188 | addr = devfdt_get_addr(dev); |
| 189 | if (addr == FDT_ADDR_T_NONE) |
| 190 | return -EINVAL; |
| 191 | |
| 192 | priv->base = (struct mu_type *)addr; |
| 193 | |
| 194 | debug("mu base 0x%lx\n", (ulong)priv->base); |
| 195 | |
| 196 | /* U-Boot not enable interrupts, so need to enable RX interrupts */ |
Ye Li | 853cc9d | 2021-08-07 16:00:55 +0800 | [diff] [blame] | 197 | mu_hal_init((ulong)priv->base); |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 198 | |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 199 | gd->arch.ele_dev = dev; |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 200 | |
| 201 | return 0; |
| 202 | } |
| 203 | |
| 204 | static int imx8ulp_mu_remove(struct udevice *dev) |
| 205 | { |
| 206 | return 0; |
| 207 | } |
| 208 | |
| 209 | static int imx8ulp_mu_bind(struct udevice *dev) |
| 210 | { |
| 211 | debug("%s(dev=%p)\n", __func__, dev); |
| 212 | |
| 213 | return 0; |
| 214 | } |
| 215 | |
| 216 | static struct misc_ops imx8ulp_mu_ops = { |
| 217 | .call = imx8ulp_mu_call, |
| 218 | }; |
| 219 | |
| 220 | static const struct udevice_id imx8ulp_mu_ids[] = { |
| 221 | { .compatible = "fsl,imx8ulp-mu" }, |
Peng Fan | 1e9aff1 | 2022-07-26 16:40:50 +0800 | [diff] [blame] | 222 | { .compatible = "fsl,imx93-mu-s4" }, |
Ye Li | 0db17f4 | 2021-08-07 16:00:41 +0800 | [diff] [blame] | 223 | { } |
| 224 | }; |
| 225 | |
| 226 | U_BOOT_DRIVER(imx8ulp_mu) = { |
| 227 | .name = "imx8ulp_mu", |
| 228 | .id = UCLASS_MISC, |
| 229 | .of_match = imx8ulp_mu_ids, |
| 230 | .probe = imx8ulp_mu_probe, |
| 231 | .bind = imx8ulp_mu_bind, |
| 232 | .remove = imx8ulp_mu_remove, |
| 233 | .ops = &imx8ulp_mu_ops, |
| 234 | .priv_auto = sizeof(struct imx8ulp_mu), |
| 235 | }; |