maxims@google.com | 2d5a2ad | 2017-01-18 13:44:56 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This device tree is copied from |
| 3 | * https://raw.githubusercontent.com/torvalds/linux/02440622/arch/arm/boot/dts/ |
| 4 | */ |
| 5 | #include "skeleton.dtsi" |
| 6 | |
| 7 | / { |
| 8 | model = "Aspeed BMC"; |
| 9 | compatible = "aspeed,ast2500"; |
| 10 | #address-cells = <1>; |
| 11 | #size-cells = <1>; |
| 12 | interrupt-parent = <&vic>; |
| 13 | |
| 14 | cpus { |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <0>; |
| 17 | |
| 18 | cpu@0 { |
| 19 | compatible = "arm,arm1176jzf-s"; |
| 20 | device_type = "cpu"; |
| 21 | reg = <0>; |
| 22 | }; |
| 23 | }; |
| 24 | |
| 25 | ahb { |
| 26 | compatible = "simple-bus"; |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <1>; |
| 29 | ranges; |
| 30 | |
| 31 | vic: interrupt-controller@1e6c0080 { |
| 32 | compatible = "aspeed,ast2400-vic"; |
| 33 | interrupt-controller; |
| 34 | #interrupt-cells = <1>; |
| 35 | valid-sources = <0xfefff7ff 0x0807ffff>; |
| 36 | reg = <0x1e6c0080 0x80>; |
| 37 | }; |
| 38 | |
| 39 | apb { |
| 40 | compatible = "simple-bus"; |
| 41 | #address-cells = <1>; |
| 42 | #size-cells = <1>; |
| 43 | ranges; |
| 44 | |
| 45 | clk_clkin: clk_clkin@1e6e2070 { |
| 46 | #clock-cells = <0>; |
| 47 | compatible = "aspeed,g5-clkin-clock"; |
| 48 | reg = <0x1e6e2070 0x04>; |
| 49 | }; |
| 50 | |
| 51 | clk_hpll: clk_hpll@1e6e2024 { |
| 52 | #clock-cells = <0>; |
| 53 | compatible = "aspeed,g5-hpll-clock"; |
| 54 | reg = <0x1e6e2024 0x4>; |
| 55 | clocks = <&clk_clkin>; |
| 56 | }; |
| 57 | |
| 58 | clk_ahb: clk_ahb@1e6e2070 { |
| 59 | #clock-cells = <0>; |
| 60 | compatible = "aspeed,g5-ahb-clock"; |
| 61 | reg = <0x1e6e2070 0x4>; |
| 62 | clocks = <&clk_hpll>; |
| 63 | }; |
| 64 | |
| 65 | clk_apb: clk_apb@1e6e2008 { |
| 66 | #clock-cells = <0>; |
| 67 | compatible = "aspeed,g5-apb-clock"; |
| 68 | reg = <0x1e6e2008 0x4>; |
| 69 | clocks = <&clk_hpll>; |
| 70 | }; |
| 71 | |
| 72 | clk_uart: clk_uart@1e6e2008 { |
| 73 | #clock-cells = <0>; |
| 74 | compatible = "aspeed,uart-clock"; |
| 75 | reg = <0x1e6e202c 0x4>; |
| 76 | }; |
| 77 | |
| 78 | sram@1e720000 { |
| 79 | compatible = "mmio-sram"; |
| 80 | reg = <0x1e720000 0x9000>; // 36K |
| 81 | }; |
| 82 | |
| 83 | timer: timer@1e782000 { |
| 84 | compatible = "aspeed,ast2400-timer"; |
| 85 | reg = <0x1e782000 0x90>; |
| 86 | // The moxart_timer driver registers only one |
| 87 | // interrupt and assumes it's for timer 1 |
| 88 | //interrupts = <16 17 18 35 36 37 38 39>; |
| 89 | interrupts = <16>; |
| 90 | clocks = <&clk_apb>; |
| 91 | }; |
| 92 | |
| 93 | wdt1: wdt@1e785000 { |
| 94 | compatible = "aspeed,wdt"; |
| 95 | reg = <0x1e785000 0x1c>; |
| 96 | interrupts = <27>; |
| 97 | }; |
| 98 | |
| 99 | wdt2: wdt@1e785020 { |
| 100 | compatible = "aspeed,wdt"; |
| 101 | reg = <0x1e785020 0x1c>; |
| 102 | interrupts = <27>; |
| 103 | status = "disabled"; |
| 104 | }; |
| 105 | |
| 106 | wdt3: wdt@1e785040 { |
| 107 | compatible = "aspeed,wdt"; |
| 108 | reg = <0x1e785074 0x1c>; |
| 109 | status = "disabled"; |
| 110 | }; |
| 111 | |
| 112 | uart1: serial@1e783000 { |
| 113 | compatible = "ns16550a"; |
| 114 | reg = <0x1e783000 0x1000>; |
| 115 | reg-shift = <2>; |
| 116 | interrupts = <9>; |
| 117 | clocks = <&clk_uart>; |
| 118 | no-loopback-test; |
| 119 | status = "disabled"; |
| 120 | }; |
| 121 | |
| 122 | uart2: serial@1e78d000 { |
| 123 | compatible = "ns16550a"; |
| 124 | reg = <0x1e78d000 0x1000>; |
| 125 | reg-shift = <2>; |
| 126 | interrupts = <32>; |
| 127 | clocks = <&clk_uart>; |
| 128 | no-loopback-test; |
| 129 | status = "disabled"; |
| 130 | }; |
| 131 | |
| 132 | uart3: serial@1e78e000 { |
| 133 | compatible = "ns16550a"; |
| 134 | reg = <0x1e78e000 0x1000>; |
| 135 | reg-shift = <2>; |
| 136 | interrupts = <33>; |
| 137 | clocks = <&clk_uart>; |
| 138 | no-loopback-test; |
| 139 | status = "disabled"; |
| 140 | }; |
| 141 | |
| 142 | uart4: serial@1e78f000 { |
| 143 | compatible = "ns16550a"; |
| 144 | reg = <0x1e78f000 0x1000>; |
| 145 | reg-shift = <2>; |
| 146 | interrupts = <34>; |
| 147 | clocks = <&clk_uart>; |
| 148 | no-loopback-test; |
| 149 | status = "disabled"; |
| 150 | }; |
| 151 | |
| 152 | uart5: serial@1e784000 { |
| 153 | compatible = "ns16550a"; |
| 154 | reg = <0x1e784000 0x1000>; |
| 155 | reg-shift = <2>; |
| 156 | interrupts = <10>; |
| 157 | clocks = <&clk_uart>; |
| 158 | current-speed = <38400>; |
| 159 | no-loopback-test; |
| 160 | status = "disabled"; |
| 161 | }; |
| 162 | |
| 163 | uart6: serial@1e787000 { |
| 164 | compatible = "ns16550a"; |
| 165 | reg = <0x1e787000 0x1000>; |
| 166 | reg-shift = <2>; |
| 167 | interrupts = <10>; |
| 168 | clocks = <&clk_uart>; |
| 169 | no-loopback-test; |
| 170 | status = "disabled"; |
| 171 | }; |
| 172 | }; |
| 173 | }; |
| 174 | }; |