Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 3 | * Video BOOT Graphics Card POST Module |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 4 | * |
| 5 | * ======================================================================== |
Kumar Gala | 6a6d948 | 2009-07-28 21:49:52 -0500 | [diff] [blame] | 6 | * Copyright (C) 2007 Freescale Semiconductor, Inc. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 7 | * Jason Jin <Jason.jin@freescale.com> |
| 8 | * |
| 9 | * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved. |
| 10 | * |
| 11 | * This file may be distributed and/or modified under the terms of the |
| 12 | * GNU General Public License version 2.0 as published by the Free |
| 13 | * Software Foundation and appearing in the file LICENSE.GPL included |
| 14 | * in the packaging of this file. |
| 15 | * |
| 16 | * Licensees holding a valid Commercial License for this product from |
| 17 | * SciTech Software, Inc. may use this file in accordance with the |
| 18 | * Commercial License Agreement provided with the Software. |
| 19 | * |
| 20 | * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING |
| 21 | * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE. |
| 23 | * |
| 24 | * See http://www.scitechsoft.com/license/ for information about |
| 25 | * the licensing options available and how to purchase a Commercial |
| 26 | * License Agreement. |
| 27 | * |
| 28 | * Contact license@scitechsoft.com if any conditions of this licensing |
| 29 | * are not clear to you, or you have questions about licensing options. |
| 30 | * |
| 31 | * ======================================================================== |
| 32 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 33 | * Language: ANSI C |
| 34 | * Environment: Linux Kernel |
| 35 | * Developer: Kendall Bennett |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 36 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 37 | * Description: Module to implement booting PCI/AGP controllers on the |
| 38 | * bus. We use the x86 real mode emulator to run the BIOS on |
| 39 | * graphics controllers to bring the cards up. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 40 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 41 | * Note that at present this module does *not* support |
| 42 | * multiple controllers. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 43 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 44 | * The orignal name of this file is warmboot.c. |
| 45 | * Jason ported this file to u-boot to run the ATI video card |
| 46 | * BIOS in u-boot. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 47 | ****************************************************************************/ |
| 48 | #include <common.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 49 | #include <compiler.h> |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 50 | #include <bios_emul.h> |
| 51 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 52 | #include <log.h> |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 53 | #include <malloc.h> |
Simon Glass | ec86bc6 | 2022-07-30 15:52:04 -0600 | [diff] [blame] | 54 | #include <vesa.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 55 | #include <linux/delay.h> |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 56 | #include "biosemui.h" |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 57 | |
| 58 | /* Length of the BIOS image */ |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 59 | #define MAX_BIOSLEN (128 * 1024L) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 60 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 61 | /* Place to save PCI BAR's that we change and later restore */ |
| 62 | static u32 saveROMBaseAddress; |
| 63 | static u32 saveBaseAddress10; |
| 64 | static u32 saveBaseAddress14; |
| 65 | static u32 saveBaseAddress18; |
| 66 | static u32 saveBaseAddress20; |
| 67 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 68 | /* Addres im memory of VBE region */ |
| 69 | const int vbe_offset = 0x2000; |
| 70 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 71 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 72 | static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info, |
| 73 | u32 x86_dword_ptr) |
| 74 | { |
| 75 | u32 seg_ofs, flat; |
| 76 | |
| 77 | seg_ofs = le32_to_cpu(x86_dword_ptr); |
| 78 | flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff); |
| 79 | if (flat >= 0xc0000) |
| 80 | return vga_info->BIOSImage + flat - 0xc0000; |
| 81 | else |
| 82 | return buf + (flat - vbe_offset); |
| 83 | } |
| 84 | |
| 85 | static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 86 | int vesa_mode, struct vesa_state *mode_info) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 87 | { |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 88 | void *buffer = (void *)(M.mem_base + vbe_offset); |
| 89 | u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; |
| 90 | u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; |
| 91 | struct vesa_mode_info *vm; |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 92 | struct vesa_bios_ext_info *info; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 93 | const u16 *modes_bios, *ptr; |
| 94 | u16 *modes; |
| 95 | int size; |
| 96 | |
| 97 | debug("VBE: Getting information\n"); |
| 98 | regs->e.eax = VESA_GET_INFO; |
| 99 | regs->e.esi = buffer_seg; |
| 100 | regs->e.edi = buffer_adr; |
| 101 | info = buffer; |
| 102 | memset(info, '\0', sizeof(*info)); |
| 103 | strcpy(info->signature, "VBE2"); |
| 104 | BE_int86(0x10, regs, regs); |
| 105 | if (regs->e.eax != 0x4f) { |
| 106 | debug("VESA_GET_INFO: error %x\n", regs->e.eax); |
| 107 | return -ENOSYS; |
| 108 | } |
| 109 | debug("version %x\n", le16_to_cpu(info->version)); |
| 110 | debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 111 | info->oem_string_ptr)); |
| 112 | debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 113 | info->vendor_name_ptr)); |
| 114 | debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 115 | info->product_name_ptr)); |
| 116 | debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 117 | info->product_rev_ptr)); |
| 118 | modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr); |
| 119 | debug("Modes: "); |
| 120 | for (ptr = modes_bios; *ptr != 0xffff; ptr++) |
| 121 | debug("%x ", le16_to_cpu(*ptr)); |
| 122 | debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4); |
| 123 | size = (ptr - modes_bios) * sizeof(u16) + 2; |
| 124 | modes = malloc(size); |
| 125 | if (!modes) |
| 126 | return -ENOMEM; |
| 127 | memcpy(modes, modes_bios, size); |
| 128 | |
| 129 | regs->e.eax = VESA_GET_CUR_MODE; |
| 130 | BE_int86(0x10, regs, regs); |
| 131 | if (regs->e.eax != 0x4f) { |
| 132 | debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax); |
| 133 | return -ENOSYS; |
| 134 | } |
| 135 | debug("Current mode %x\n", regs->e.ebx); |
| 136 | |
| 137 | for (ptr = modes; *ptr != 0xffff; ptr++) { |
| 138 | int mode = le16_to_cpu(*ptr); |
| 139 | bool linear_ok; |
| 140 | int attr; |
| 141 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 142 | debug("Mode %x: ", mode); |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 143 | memset(buffer, '\0', sizeof(struct vesa_state)); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 144 | regs->e.eax = VESA_GET_MODE_INFO; |
| 145 | regs->e.ebx = 0; |
| 146 | regs->e.ecx = mode; |
| 147 | regs->e.edx = 0; |
| 148 | regs->e.esi = buffer_seg; |
| 149 | regs->e.edi = buffer_adr; |
| 150 | BE_int86(0x10, regs, regs); |
| 151 | if (regs->e.eax != 0x4f) { |
| 152 | debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); |
| 153 | continue; |
| 154 | } |
| 155 | memcpy(mode_info->mode_info_block, buffer, |
| 156 | sizeof(struct vesa_mode_info)); |
| 157 | mode_info->valid = true; |
| 158 | vm = &mode_info->vesa; |
| 159 | attr = le16_to_cpu(vm->mode_attributes); |
| 160 | linear_ok = attr & 0x80; |
| 161 | debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n", |
| 162 | le16_to_cpu(vm->x_resolution), |
| 163 | le16_to_cpu(vm->y_resolution), |
| 164 | vm->bits_per_pixel, vm->memory_model, |
| 165 | linear_ok ? "OK" : "not available", |
| 166 | attr); |
| 167 | debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n", |
| 168 | vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos, |
| 169 | vm->red_mask_size, vm->green_mask_size, |
| 170 | vm->blue_mask_size); |
| 171 | } |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 177 | struct vesa_state *mode_info) |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 178 | { |
| 179 | void *buffer = (void *)(M.mem_base + vbe_offset); |
| 180 | u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; |
| 181 | u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; |
| 182 | struct vesa_mode_info *vm; |
| 183 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 184 | debug("VBE: Setting VESA mode %#04x\n", vesa_mode); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 185 | regs->e.eax = VESA_SET_MODE; |
| 186 | regs->e.ebx = vesa_mode; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 187 | /* request linear framebuffer mode and don't clear display */ |
| 188 | regs->e.ebx |= (1 << 14) | (1 << 15); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 189 | BE_int86(0x10, regs, regs); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 190 | if (regs->e.eax != 0x4f) { |
| 191 | debug("VESA_SET_MODE: error %x\n", regs->e.eax); |
| 192 | return -ENOSYS; |
| 193 | } |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 194 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 195 | memset(buffer, '\0', sizeof(struct vesa_state)); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 196 | debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 197 | regs->e.eax = VESA_GET_MODE_INFO; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 198 | regs->e.ecx = vesa_mode; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 199 | regs->e.esi = buffer_seg; |
| 200 | regs->e.edi = buffer_adr; |
| 201 | BE_int86(0x10, regs, regs); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 202 | if (regs->e.eax != 0x4f) { |
| 203 | debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); |
| 204 | return -ENOSYS; |
| 205 | } |
| 206 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 207 | memcpy(mode_info->mode_info_block, buffer, |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 208 | sizeof(struct vesa_mode_info)); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 209 | mode_info->valid = true; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 210 | mode_info->video_mode = vesa_mode; |
| 211 | vm = &mode_info->vesa; |
| 212 | vm->x_resolution = le16_to_cpu(vm->x_resolution); |
| 213 | vm->y_resolution = le16_to_cpu(vm->y_resolution); |
| 214 | vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline); |
| 215 | vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr); |
| 216 | vm->mode_attributes = le16_to_cpu(vm->mode_attributes); |
| 217 | debug("VBE: Init complete\n"); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 218 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 219 | return 0; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 220 | } |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 221 | #endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 222 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 223 | /**************************************************************************** |
| 224 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 225 | pcidev - PCI device info for the video card on the bus to boot |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 226 | vga_info - BIOS emulator VGA info structure |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 227 | |
| 228 | REMARKS: |
| 229 | This function executes the BIOS POST code on the controller. We assume that |
| 230 | at this stage the controller has its I/O and memory space enabled and |
| 231 | that all other controllers are in a disabled state. |
| 232 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 233 | static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 234 | int vesa_mode, struct vesa_state *mode_info) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 235 | { |
| 236 | RMREGS regs; |
| 237 | RMSREGS sregs; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 238 | pci_dev_t bdf; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 239 | |
| 240 | /* Determine the value to store in AX for BIOS POST. Per the PCI specs, |
| 241 | AH must contain the bus and AL must contain the devfn, encoded as |
| 242 | (dev << 3) | fn |
| 243 | */ |
| 244 | memset(®s, 0, sizeof(regs)); |
| 245 | memset(&sregs, 0, sizeof(sregs)); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 246 | bdf = dm_pci_get_bdf(pcidev); |
| 247 | regs.x.ax = (int)PCI_BUS(bdf) << 8 | |
| 248 | (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 249 | /*Setup the X86 emulator for the VGA BIOS*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 250 | BE_setVGA(vga_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 251 | |
| 252 | /*Execute the BIOS POST code*/ |
| 253 | BE_callRealMode(0xC000, 0x0003, ®s, &sregs); |
| 254 | |
| 255 | /*Cleanup and exit*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 256 | BE_getVGA(vga_info); |
| 257 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 258 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 259 | /* Useful for debugging */ |
| 260 | if (0) |
| 261 | atibios_debug_mode(vga_info, ®s, vesa_mode, mode_info); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 262 | if (vesa_mode != -1) |
| 263 | atibios_set_vesa_mode(®s, vesa_mode, mode_info); |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 264 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | /**************************************************************************** |
| 268 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 269 | pcidev - PCI device info for the video card on the bus |
| 270 | bar - Place to return the base address register offset to use |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 271 | |
| 272 | RETURNS: |
| 273 | The address to use to map the secondary BIOS (AGP devices) |
| 274 | |
| 275 | REMARKS: |
| 276 | Searches all the PCI base address registers for the device looking for a |
| 277 | memory mapping that is large enough to hold our ROM BIOS. We usually end up |
| 278 | finding the framebuffer mapping (usually BAR 0x10), and we use this mapping |
| 279 | to map the BIOS for the device into. We use a mapping that is already |
| 280 | assigned to the device to ensure the memory range will be passed through |
| 281 | by any PCI->PCI or AGP->PCI bridge that may be present. |
| 282 | |
| 283 | NOTE: Usually this function is only used for AGP devices, but it may be |
| 284 | used for PCI devices that have already been POST'ed and the BIOS |
| 285 | ROM base address has been zero'ed out. |
| 286 | |
| 287 | NOTE: This function leaves the original memory aperture disabled by leaving |
| 288 | it programmed to all 1's. It must be restored to the correct value |
| 289 | later. |
| 290 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 291 | static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 292 | { |
| 293 | u32 base, size; |
| 294 | |
| 295 | for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) { |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 296 | dm_pci_read_config32(pcidev, *bar, &base); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 297 | if (!(base & 0x1)) { |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 298 | dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF); |
| 299 | dm_pci_read_config32(pcidev, *bar, &size); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 300 | size = ~(size & ~0xFF) + 1; |
| 301 | if (size >= MAX_BIOSLEN) |
| 302 | return base & ~0xFF; |
| 303 | } |
| 304 | } |
| 305 | return 0; |
| 306 | } |
| 307 | |
| 308 | /**************************************************************************** |
| 309 | REMARKS: |
| 310 | Some non-x86 Linux kernels map PCI relocateable I/O to values that |
| 311 | are above 64K, which will not work with the BIOS image that requires |
| 312 | the offset for the I/O ports to be a maximum of 16-bits. Ideally |
| 313 | someone should fix the kernel to map the I/O ports for VGA compatible |
| 314 | devices to a different location (or just all I/O ports since it is |
| 315 | unlikely you can have enough devices in the machine to use up all |
| 316 | 64K of the I/O space - a total of more than 256 cards would be |
| 317 | necessary). |
| 318 | |
| 319 | Anyway to fix this we change all I/O mapped base registers and |
| 320 | chop off the top bits. |
| 321 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 322 | static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 323 | { |
| 324 | if ((*base & 0x1) && (*base > 0xFFFE)) { |
| 325 | *base &= 0xFFFF; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 326 | dm_pci_write_config32(pcidev, reg, *base); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 327 | |
| 328 | } |
| 329 | } |
| 330 | |
| 331 | /**************************************************************************** |
| 332 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 333 | pcidev - PCI device info for the video card on the bus |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 334 | |
| 335 | RETURNS: |
| 336 | Pointers to the mapped BIOS image |
| 337 | |
| 338 | REMARKS: |
| 339 | Maps a pointer to the BIOS image on the graphics card on the PCI bus. |
| 340 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 341 | void *PCI_mapBIOSImage(struct udevice *pcidev) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 342 | { |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 343 | u32 BIOSImageBus; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 344 | int BIOSImageBAR; |
| 345 | u8 *BIOSImage; |
| 346 | |
| 347 | /*Save PCI BAR registers that might get changed*/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 348 | dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); |
| 349 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); |
| 350 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); |
| 351 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); |
| 352 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 353 | |
| 354 | /*Fix up I/O base registers to less than 64K */ |
| 355 | if(saveBaseAddress14 != 0) |
| 356 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); |
| 357 | else |
| 358 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); |
| 359 | |
| 360 | /* Some cards have problems that stop us from being able to read the |
| 361 | BIOS image from the ROM BAR. To fix this we have to do some chipset |
| 362 | specific programming for different cards to solve this problem. |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 363 | */ |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 364 | |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 365 | BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR); |
| 366 | if (BIOSImageBus == 0) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 367 | printf("Find bios addr error\n"); |
| 368 | return NULL; |
| 369 | } |
| 370 | |
Andrew Scull | 3e0f2fb | 2022-04-21 16:11:12 +0000 | [diff] [blame] | 371 | BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, 0, PCI_REGION_TYPE, |
| 372 | PCI_REGION_MEM, MAP_NOCACHE); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 373 | |
| 374 | /*Change the PCI BAR registers to map it onto the bus.*/ |
| 375 | dm_pci_write_config32(pcidev, BIOSImageBAR, 0); |
| 376 | dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 377 | udelay(1); |
| 378 | |
| 379 | /*Check that the BIOS image is valid. If not fail, or return the |
| 380 | compiled in BIOS image if that option was enabled |
| 381 | */ |
| 382 | if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) { |
| 383 | return NULL; |
| 384 | } |
| 385 | |
| 386 | return BIOSImage; |
| 387 | } |
| 388 | |
| 389 | /**************************************************************************** |
| 390 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 391 | pcidev - PCI device info for the video card on the bus |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 392 | |
| 393 | REMARKS: |
| 394 | Unmaps the BIOS image for the device and restores framebuffer mappings |
| 395 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 396 | void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage) |
| 397 | { |
| 398 | dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); |
| 399 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); |
| 400 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); |
| 401 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); |
| 402 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); |
| 403 | } |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 404 | |
| 405 | /**************************************************************************** |
| 406 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 407 | pcidev - PCI device info for the video card on the bus to boot |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 408 | VGAInfo - BIOS emulator VGA info structure |
| 409 | |
| 410 | RETURNS: |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 411 | true if successfully initialised, false if not. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 412 | |
| 413 | REMARKS: |
| 414 | Loads and POST's the display controllers BIOS, directly from the BIOS |
| 415 | image we can extract over the PCI bus. |
| 416 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 417 | static int PCI_postController(struct udevice *pcidev, uchar *bios_rom, |
| 418 | int bios_len, BE_VGAInfo *vga_info, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 419 | int vesa_mode, struct vesa_state *mode_info) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 420 | { |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 421 | u32 bios_image_len; |
| 422 | uchar *mapped_bios; |
| 423 | uchar *copy_of_bios; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 424 | pci_dev_t bdf; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 425 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 426 | if (bios_rom) { |
| 427 | copy_of_bios = bios_rom; |
| 428 | bios_image_len = bios_len; |
| 429 | } else { |
| 430 | /* |
| 431 | * Allocate memory to store copy of BIOS from display |
| 432 | * controller |
| 433 | */ |
| 434 | mapped_bios = PCI_mapBIOSImage(pcidev); |
| 435 | if (mapped_bios == NULL) { |
| 436 | printf("videoboot: Video ROM failed to map!\n"); |
| 437 | return false; |
| 438 | } |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 439 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 440 | bios_image_len = mapped_bios[2] * 512; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 441 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 442 | copy_of_bios = malloc(bios_image_len); |
| 443 | if (copy_of_bios == NULL) { |
| 444 | printf("videoboot: Out of memory!\n"); |
| 445 | return false; |
| 446 | } |
| 447 | memcpy(copy_of_bios, mapped_bios, bios_image_len); |
| 448 | PCI_unmapBIOSImage(pcidev, mapped_bios); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 449 | } |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 450 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 451 | /*Save information in vga_info structure*/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 452 | bdf = dm_pci_get_bdf(pcidev); |
| 453 | vga_info->function = PCI_FUNC(bdf); |
| 454 | vga_info->device = PCI_DEV(bdf); |
| 455 | vga_info->bus = PCI_BUS(bdf); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 456 | vga_info->pcidev = pcidev; |
| 457 | vga_info->BIOSImage = copy_of_bios; |
| 458 | vga_info->BIOSImageLen = bios_image_len; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 459 | |
| 460 | /*Now execute the BIOS POST for the device*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 461 | if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 462 | printf("videoboot: Video ROM image is invalid!\n"); |
| 463 | return false; |
| 464 | } |
| 465 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 466 | PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 467 | |
| 468 | /*Reset the size of the BIOS image to the final size*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 469 | vga_info->BIOSImageLen = copy_of_bios[2] * 512; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 470 | return true; |
| 471 | } |
| 472 | |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 473 | int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 474 | { |
| 475 | BE_VGAInfo *VGAInfo; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 476 | pci_dev_t bdf = dm_pci_get_bdf(pcidev); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 477 | |
| 478 | printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 479 | PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf)); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 480 | /*Initialise the x86 BIOS emulator*/ |
| 481 | if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) { |
| 482 | printf("videoboot: Out of memory!\n"); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 483 | return -ENOMEM; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 484 | } |
| 485 | memset(VGAInfo, 0, sizeof(*VGAInfo)); |
| 486 | BE_init(0, 65536, VGAInfo, 0); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 487 | *vga_infop = VGAInfo; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 488 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 489 | return 0; |
| 490 | } |
| 491 | |
| 492 | void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void)) |
| 493 | { |
| 494 | X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func); |
| 495 | } |
| 496 | |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 497 | int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len, |
| 498 | BE_VGAInfo *vga_info, int clean_up, int vesa_mode, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 499 | struct vesa_state *mode_info) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 500 | { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 501 | /*Post all the display controller BIOS'es*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 502 | if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info, |
| 503 | vesa_mode, mode_info)) |
| 504 | return -EINVAL; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 505 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 506 | /* |
| 507 | * Cleanup and exit the emulator if requested. If the BIOS emulator |
| 508 | * is needed after booting the card, we will not call BE_exit and |
| 509 | * leave it enabled for further use (ie: VESA driver etc). |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 510 | */ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 511 | if (clean_up) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 512 | BE_exit(); |
Bin Meng | a264c90 | 2015-04-24 15:48:05 +0800 | [diff] [blame] | 513 | if (vga_info->BIOSImage && |
Simon Glass | cc40906 | 2016-09-25 21:33:06 -0600 | [diff] [blame] | 514 | (ulong)(vga_info->BIOSImage) != 0xc0000) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 515 | free(vga_info->BIOSImage); |
| 516 | free(vga_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 517 | } |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 518 | |
| 519 | return 0; |
| 520 | } |
| 521 | |
| 522 | /**************************************************************************** |
| 523 | PARAMETERS: |
| 524 | pcidev - PCI device info for the video card on the bus to boot |
| 525 | pVGAInfo - Place to return VGA info structure is requested |
| 526 | cleanUp - true to clean up on exit, false to leave emulator active |
| 527 | |
| 528 | REMARKS: |
| 529 | Boots the PCI/AGP video card on the bus using the Video ROM BIOS image |
| 530 | and the X86 BIOS emulator module. |
| 531 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 532 | int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo, |
| 533 | int clean_up) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 534 | { |
| 535 | BE_VGAInfo *VGAInfo; |
| 536 | int ret; |
| 537 | |
| 538 | ret = biosemu_setup(pcidev, &VGAInfo); |
| 539 | if (ret) |
| 540 | return false; |
| 541 | ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL); |
| 542 | if (ret) |
| 543 | return false; |
| 544 | |
| 545 | /* Return VGA info pointer if the caller requested it*/ |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 546 | if (pVGAInfo) |
| 547 | *pVGAInfo = VGAInfo; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 548 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 549 | return true; |
| 550 | } |