blob: 7ebead6bfad6155a82eb9afb067f2555b5e7db30 [file] [log] [blame]
Jason Jina63ce952007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jina63ce952007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala6a6d9482009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jina63ce952007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jina63ce952007-07-06 08:34:56 +080036*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jina63ce952007-07-06 08:34:56 +080040*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jina63ce952007-07-06 08:34:56 +080043*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jina63ce952007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060049#include <compiler.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070050#include <bios_emul.h>
51#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060052#include <log.h>
Jason Jina63ce952007-07-06 08:34:56 +080053#include <malloc.h>
Simon Glassec86bc62022-07-30 15:52:04 -060054#include <vesa.h>
Simon Glassdbd79542020-05-10 11:40:11 -060055#include <linux/delay.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070056#include "biosemui.h"
Jason Jina63ce952007-07-06 08:34:56 +080057
58/* Length of the BIOS image */
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020059#define MAX_BIOSLEN (128 * 1024L)
Jason Jina63ce952007-07-06 08:34:56 +080060
Jason Jina63ce952007-07-06 08:34:56 +080061/* Place to save PCI BAR's that we change and later restore */
62static u32 saveROMBaseAddress;
63static u32 saveBaseAddress10;
64static u32 saveBaseAddress14;
65static u32 saveBaseAddress18;
66static u32 saveBaseAddress20;
67
Simon Glassc55b1c62014-12-29 19:32:26 -070068/* Addres im memory of VBE region */
69const int vbe_offset = 0x2000;
70
Bin Mengc9dba412018-04-11 22:02:15 -070071#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -070072static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
73 u32 x86_dword_ptr)
74{
75 u32 seg_ofs, flat;
76
77 seg_ofs = le32_to_cpu(x86_dword_ptr);
78 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
79 if (flat >= 0xc0000)
80 return vga_info->BIOSImage + flat - 0xc0000;
81 else
82 return buf + (flat - vbe_offset);
83}
84
85static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
Simon Glass5b925202022-07-30 15:52:05 -060086 int vesa_mode, struct vesa_state *mode_info)
Simon Glassacda1cc2014-11-14 20:56:40 -070087{
Simon Glassc55b1c62014-12-29 19:32:26 -070088 void *buffer = (void *)(M.mem_base + vbe_offset);
89 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
90 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
91 struct vesa_mode_info *vm;
Simon Glass5b925202022-07-30 15:52:05 -060092 struct vesa_bios_ext_info *info;
Simon Glassc55b1c62014-12-29 19:32:26 -070093 const u16 *modes_bios, *ptr;
94 u16 *modes;
95 int size;
96
97 debug("VBE: Getting information\n");
98 regs->e.eax = VESA_GET_INFO;
99 regs->e.esi = buffer_seg;
100 regs->e.edi = buffer_adr;
101 info = buffer;
102 memset(info, '\0', sizeof(*info));
103 strcpy(info->signature, "VBE2");
104 BE_int86(0x10, regs, regs);
105 if (regs->e.eax != 0x4f) {
106 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
107 return -ENOSYS;
108 }
109 debug("version %x\n", le16_to_cpu(info->version));
110 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->oem_string_ptr));
112 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->vendor_name_ptr));
114 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
115 info->product_name_ptr));
116 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
117 info->product_rev_ptr));
118 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
119 debug("Modes: ");
120 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
121 debug("%x ", le16_to_cpu(*ptr));
122 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
123 size = (ptr - modes_bios) * sizeof(u16) + 2;
124 modes = malloc(size);
125 if (!modes)
126 return -ENOMEM;
127 memcpy(modes, modes_bios, size);
128
129 regs->e.eax = VESA_GET_CUR_MODE;
130 BE_int86(0x10, regs, regs);
131 if (regs->e.eax != 0x4f) {
132 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
133 return -ENOSYS;
134 }
135 debug("Current mode %x\n", regs->e.ebx);
136
137 for (ptr = modes; *ptr != 0xffff; ptr++) {
138 int mode = le16_to_cpu(*ptr);
139 bool linear_ok;
140 int attr;
141
Simon Glassc55b1c62014-12-29 19:32:26 -0700142 debug("Mode %x: ", mode);
Simon Glass5b925202022-07-30 15:52:05 -0600143 memset(buffer, '\0', sizeof(struct vesa_state));
Simon Glassc55b1c62014-12-29 19:32:26 -0700144 regs->e.eax = VESA_GET_MODE_INFO;
145 regs->e.ebx = 0;
146 regs->e.ecx = mode;
147 regs->e.edx = 0;
148 regs->e.esi = buffer_seg;
149 regs->e.edi = buffer_adr;
150 BE_int86(0x10, regs, regs);
151 if (regs->e.eax != 0x4f) {
152 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
153 continue;
154 }
155 memcpy(mode_info->mode_info_block, buffer,
156 sizeof(struct vesa_mode_info));
157 mode_info->valid = true;
158 vm = &mode_info->vesa;
159 attr = le16_to_cpu(vm->mode_attributes);
160 linear_ok = attr & 0x80;
161 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
162 le16_to_cpu(vm->x_resolution),
163 le16_to_cpu(vm->y_resolution),
164 vm->bits_per_pixel, vm->memory_model,
165 linear_ok ? "OK" : "not available",
166 attr);
167 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
168 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
169 vm->red_mask_size, vm->green_mask_size,
170 vm->blue_mask_size);
171 }
172
173 return 0;
174}
175
176static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
Simon Glass5b925202022-07-30 15:52:05 -0600177 struct vesa_state *mode_info)
Simon Glassc55b1c62014-12-29 19:32:26 -0700178{
179 void *buffer = (void *)(M.mem_base + vbe_offset);
180 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
181 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
182 struct vesa_mode_info *vm;
183
Simon Glassacda1cc2014-11-14 20:56:40 -0700184 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700185 regs->e.eax = VESA_SET_MODE;
186 regs->e.ebx = vesa_mode;
Simon Glassc55b1c62014-12-29 19:32:26 -0700187 /* request linear framebuffer mode and don't clear display */
188 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glassacda1cc2014-11-14 20:56:40 -0700189 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700190 if (regs->e.eax != 0x4f) {
191 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
192 return -ENOSYS;
193 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700194
Simon Glass5b925202022-07-30 15:52:05 -0600195 memset(buffer, '\0', sizeof(struct vesa_state));
Simon Glassc55b1c62014-12-29 19:32:26 -0700196 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700197 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glassacda1cc2014-11-14 20:56:40 -0700198 regs->e.ecx = vesa_mode;
Simon Glassacda1cc2014-11-14 20:56:40 -0700199 regs->e.esi = buffer_seg;
200 regs->e.edi = buffer_adr;
201 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700202 if (regs->e.eax != 0x4f) {
203 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
204 return -ENOSYS;
205 }
206
Simon Glassacda1cc2014-11-14 20:56:40 -0700207 memcpy(mode_info->mode_info_block, buffer,
Simon Glassc55b1c62014-12-29 19:32:26 -0700208 sizeof(struct vesa_mode_info));
Simon Glassacda1cc2014-11-14 20:56:40 -0700209 mode_info->valid = true;
Simon Glassc55b1c62014-12-29 19:32:26 -0700210 mode_info->video_mode = vesa_mode;
211 vm = &mode_info->vesa;
212 vm->x_resolution = le16_to_cpu(vm->x_resolution);
213 vm->y_resolution = le16_to_cpu(vm->y_resolution);
214 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
215 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
216 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
217 debug("VBE: Init complete\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700218
Simon Glassc55b1c62014-12-29 19:32:26 -0700219 return 0;
Simon Glassacda1cc2014-11-14 20:56:40 -0700220}
Bin Mengc9dba412018-04-11 22:02:15 -0700221#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
Simon Glassacda1cc2014-11-14 20:56:40 -0700222
Jason Jina63ce952007-07-06 08:34:56 +0800223/****************************************************************************
224PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200225pcidev - PCI device info for the video card on the bus to boot
Simon Glassacda1cc2014-11-14 20:56:40 -0700226vga_info - BIOS emulator VGA info structure
Jason Jina63ce952007-07-06 08:34:56 +0800227
228REMARKS:
229This function executes the BIOS POST code on the controller. We assume that
230at this stage the controller has its I/O and memory space enabled and
231that all other controllers are in a disabled state.
232****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700233static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
Simon Glass5b925202022-07-30 15:52:05 -0600234 int vesa_mode, struct vesa_state *mode_info)
Jason Jina63ce952007-07-06 08:34:56 +0800235{
236 RMREGS regs;
237 RMSREGS sregs;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700238 pci_dev_t bdf;
Jason Jina63ce952007-07-06 08:34:56 +0800239
240 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
241 AH must contain the bus and AL must contain the devfn, encoded as
242 (dev << 3) | fn
243 */
244 memset(&regs, 0, sizeof(regs));
245 memset(&sregs, 0, sizeof(sregs));
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700246 bdf = dm_pci_get_bdf(pcidev);
247 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
248 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
Jason Jina63ce952007-07-06 08:34:56 +0800249 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700250 BE_setVGA(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800251
252 /*Execute the BIOS POST code*/
253 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
254
255 /*Cleanup and exit*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700256 BE_getVGA(vga_info);
257
Bin Mengc9dba412018-04-11 22:02:15 -0700258#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -0700259 /* Useful for debugging */
260 if (0)
261 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glassacda1cc2014-11-14 20:56:40 -0700262 if (vesa_mode != -1)
263 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Bin Mengc9dba412018-04-11 22:02:15 -0700264#endif
Jason Jina63ce952007-07-06 08:34:56 +0800265}
266
267/****************************************************************************
268PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200269pcidev - PCI device info for the video card on the bus
270bar - Place to return the base address register offset to use
Jason Jina63ce952007-07-06 08:34:56 +0800271
272RETURNS:
273The address to use to map the secondary BIOS (AGP devices)
274
275REMARKS:
276Searches all the PCI base address registers for the device looking for a
277memory mapping that is large enough to hold our ROM BIOS. We usually end up
278finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
279to map the BIOS for the device into. We use a mapping that is already
280assigned to the device to ensure the memory range will be passed through
281by any PCI->PCI or AGP->PCI bridge that may be present.
282
283NOTE: Usually this function is only used for AGP devices, but it may be
284 used for PCI devices that have already been POST'ed and the BIOS
285 ROM base address has been zero'ed out.
286
287NOTE: This function leaves the original memory aperture disabled by leaving
288 it programmed to all 1's. It must be restored to the correct value
289 later.
290****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700291static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
Jason Jina63ce952007-07-06 08:34:56 +0800292{
293 u32 base, size;
294
295 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700296 dm_pci_read_config32(pcidev, *bar, &base);
Jason Jina63ce952007-07-06 08:34:56 +0800297 if (!(base & 0x1)) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700298 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
299 dm_pci_read_config32(pcidev, *bar, &size);
Jason Jina63ce952007-07-06 08:34:56 +0800300 size = ~(size & ~0xFF) + 1;
301 if (size >= MAX_BIOSLEN)
302 return base & ~0xFF;
303 }
304 }
305 return 0;
306}
307
308/****************************************************************************
309REMARKS:
310Some non-x86 Linux kernels map PCI relocateable I/O to values that
311are above 64K, which will not work with the BIOS image that requires
312the offset for the I/O ports to be a maximum of 16-bits. Ideally
313someone should fix the kernel to map the I/O ports for VGA compatible
314devices to a different location (or just all I/O ports since it is
315unlikely you can have enough devices in the machine to use up all
31664K of the I/O space - a total of more than 256 cards would be
317necessary).
318
319Anyway to fix this we change all I/O mapped base registers and
320chop off the top bits.
321****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700322static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
Jason Jina63ce952007-07-06 08:34:56 +0800323{
324 if ((*base & 0x1) && (*base > 0xFFFE)) {
325 *base &= 0xFFFF;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700326 dm_pci_write_config32(pcidev, reg, *base);
Jason Jina63ce952007-07-06 08:34:56 +0800327
328 }
329}
330
331/****************************************************************************
332PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200333pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800334
335RETURNS:
336Pointers to the mapped BIOS image
337
338REMARKS:
339Maps a pointer to the BIOS image on the graphics card on the PCI bus.
340****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700341void *PCI_mapBIOSImage(struct udevice *pcidev)
Jason Jina63ce952007-07-06 08:34:56 +0800342{
Ed Swarthout224dad22010-03-31 15:52:40 -0500343 u32 BIOSImageBus;
Jason Jina63ce952007-07-06 08:34:56 +0800344 int BIOSImageBAR;
345 u8 *BIOSImage;
346
347 /*Save PCI BAR registers that might get changed*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700348 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
349 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
350 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
351 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
352 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Jason Jina63ce952007-07-06 08:34:56 +0800353
354 /*Fix up I/O base registers to less than 64K */
355 if(saveBaseAddress14 != 0)
356 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
357 else
358 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
359
360 /* Some cards have problems that stop us from being able to read the
361 BIOS image from the ROM BAR. To fix this we have to do some chipset
362 specific programming for different cards to solve this problem.
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200363 */
Jason Jina63ce952007-07-06 08:34:56 +0800364
Ed Swarthout224dad22010-03-31 15:52:40 -0500365 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
366 if (BIOSImageBus == 0) {
Jason Jina63ce952007-07-06 08:34:56 +0800367 printf("Find bios addr error\n");
368 return NULL;
369 }
370
Andrew Scull3e0f2fb2022-04-21 16:11:12 +0000371 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, 0, PCI_REGION_TYPE,
372 PCI_REGION_MEM, MAP_NOCACHE);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700373
374 /*Change the PCI BAR registers to map it onto the bus.*/
375 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
376 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Jason Jina63ce952007-07-06 08:34:56 +0800377 udelay(1);
378
379 /*Check that the BIOS image is valid. If not fail, or return the
380 compiled in BIOS image if that option was enabled
381 */
382 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
383 return NULL;
384 }
385
386 return BIOSImage;
387}
388
389/****************************************************************************
390PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200391pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800392
393REMARKS:
394Unmaps the BIOS image for the device and restores framebuffer mappings
395****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700396void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
397{
398 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
399 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
400 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
401 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
402 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
403}
Jason Jina63ce952007-07-06 08:34:56 +0800404
405/****************************************************************************
406PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200407pcidev - PCI device info for the video card on the bus to boot
Jason Jina63ce952007-07-06 08:34:56 +0800408VGAInfo - BIOS emulator VGA info structure
409
410RETURNS:
York Sun4a598092013-04-01 11:29:11 -0700411true if successfully initialised, false if not.
Jason Jina63ce952007-07-06 08:34:56 +0800412
413REMARKS:
414Loads and POST's the display controllers BIOS, directly from the BIOS
415image we can extract over the PCI bus.
416****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700417static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
418 int bios_len, BE_VGAInfo *vga_info,
Simon Glass5b925202022-07-30 15:52:05 -0600419 int vesa_mode, struct vesa_state *mode_info)
Jason Jina63ce952007-07-06 08:34:56 +0800420{
Simon Glassacda1cc2014-11-14 20:56:40 -0700421 u32 bios_image_len;
422 uchar *mapped_bios;
423 uchar *copy_of_bios;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700424 pci_dev_t bdf;
Jason Jina63ce952007-07-06 08:34:56 +0800425
Simon Glassacda1cc2014-11-14 20:56:40 -0700426 if (bios_rom) {
427 copy_of_bios = bios_rom;
428 bios_image_len = bios_len;
429 } else {
430 /*
431 * Allocate memory to store copy of BIOS from display
432 * controller
433 */
434 mapped_bios = PCI_mapBIOSImage(pcidev);
435 if (mapped_bios == NULL) {
436 printf("videoboot: Video ROM failed to map!\n");
437 return false;
438 }
Jason Jina63ce952007-07-06 08:34:56 +0800439
Simon Glassacda1cc2014-11-14 20:56:40 -0700440 bios_image_len = mapped_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800441
Simon Glassacda1cc2014-11-14 20:56:40 -0700442 copy_of_bios = malloc(bios_image_len);
443 if (copy_of_bios == NULL) {
444 printf("videoboot: Out of memory!\n");
445 return false;
446 }
447 memcpy(copy_of_bios, mapped_bios, bios_image_len);
448 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jina63ce952007-07-06 08:34:56 +0800449 }
Jason Jina63ce952007-07-06 08:34:56 +0800450
Simon Glassacda1cc2014-11-14 20:56:40 -0700451 /*Save information in vga_info structure*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700452 bdf = dm_pci_get_bdf(pcidev);
453 vga_info->function = PCI_FUNC(bdf);
454 vga_info->device = PCI_DEV(bdf);
455 vga_info->bus = PCI_BUS(bdf);
Simon Glassacda1cc2014-11-14 20:56:40 -0700456 vga_info->pcidev = pcidev;
457 vga_info->BIOSImage = copy_of_bios;
458 vga_info->BIOSImageLen = bios_image_len;
Jason Jina63ce952007-07-06 08:34:56 +0800459
460 /*Now execute the BIOS POST for the device*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700461 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jina63ce952007-07-06 08:34:56 +0800462 printf("videoboot: Video ROM image is invalid!\n");
463 return false;
464 }
465
Simon Glassacda1cc2014-11-14 20:56:40 -0700466 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jina63ce952007-07-06 08:34:56 +0800467
468 /*Reset the size of the BIOS image to the final size*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700469 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800470 return true;
471}
472
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700473int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
Jason Jina63ce952007-07-06 08:34:56 +0800474{
475 BE_VGAInfo *VGAInfo;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700476 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Jason Jina63ce952007-07-06 08:34:56 +0800477
478 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700479 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
Jason Jina63ce952007-07-06 08:34:56 +0800480 /*Initialise the x86 BIOS emulator*/
481 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
482 printf("videoboot: Out of memory!\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700483 return -ENOMEM;
Jason Jina63ce952007-07-06 08:34:56 +0800484 }
485 memset(VGAInfo, 0, sizeof(*VGAInfo));
486 BE_init(0, 65536, VGAInfo, 0);
Simon Glassacda1cc2014-11-14 20:56:40 -0700487 *vga_infop = VGAInfo;
Jason Jina63ce952007-07-06 08:34:56 +0800488
Simon Glassacda1cc2014-11-14 20:56:40 -0700489 return 0;
490}
491
492void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
493{
494 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
495}
496
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700497int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
498 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
Simon Glass5b925202022-07-30 15:52:05 -0600499 struct vesa_state *mode_info)
Simon Glassacda1cc2014-11-14 20:56:40 -0700500{
Jason Jina63ce952007-07-06 08:34:56 +0800501 /*Post all the display controller BIOS'es*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700502 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
503 vesa_mode, mode_info))
504 return -EINVAL;
Jason Jina63ce952007-07-06 08:34:56 +0800505
Simon Glassacda1cc2014-11-14 20:56:40 -0700506 /*
507 * Cleanup and exit the emulator if requested. If the BIOS emulator
508 * is needed after booting the card, we will not call BE_exit and
509 * leave it enabled for further use (ie: VESA driver etc).
Jason Jina63ce952007-07-06 08:34:56 +0800510 */
Simon Glassacda1cc2014-11-14 20:56:40 -0700511 if (clean_up) {
Jason Jina63ce952007-07-06 08:34:56 +0800512 BE_exit();
Bin Menga264c902015-04-24 15:48:05 +0800513 if (vga_info->BIOSImage &&
Simon Glasscc409062016-09-25 21:33:06 -0600514 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glassacda1cc2014-11-14 20:56:40 -0700515 free(vga_info->BIOSImage);
516 free(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800517 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700518
519 return 0;
520}
521
522/****************************************************************************
523PARAMETERS:
524pcidev - PCI device info for the video card on the bus to boot
525pVGAInfo - Place to return VGA info structure is requested
526cleanUp - true to clean up on exit, false to leave emulator active
527
528REMARKS:
529Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
530and the X86 BIOS emulator module.
531****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700532int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
533 int clean_up)
Simon Glassacda1cc2014-11-14 20:56:40 -0700534{
535 BE_VGAInfo *VGAInfo;
536 int ret;
537
538 ret = biosemu_setup(pcidev, &VGAInfo);
539 if (ret)
540 return false;
541 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
542 if (ret)
543 return false;
544
545 /* Return VGA info pointer if the caller requested it*/
Jason Jina63ce952007-07-06 08:34:56 +0800546 if (pVGAInfo)
547 *pVGAInfo = VGAInfo;
Simon Glassacda1cc2014-11-14 20:56:40 -0700548
Jason Jina63ce952007-07-06 08:34:56 +0800549 return true;
550}