blob: e19ab016217305706a1e1a16a2393a31aae8d401 [file] [log] [blame]
Bharat Kumar Reddy Gooty436efc02019-12-16 09:09:43 -08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Broadcom.
4 */
5#include <common.h>
6#include <asm/gic.h>
7#include <asm/gic-v3.h>
8#include <asm/io.h>
9
10static u32 lpi_id_bits;
11
12#define LPI_NRBITS lpi_id_bits
13#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
14#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
15
16/*
17 * Program the GIC LPI configuration tables for all
18 * the re-distributors and enable the LPI table
19 * base: Configuration table address
20 * num_redist: number of redistributors
21 */
22int gic_lpi_tables_init(u64 base, u32 num_redist)
23{
24 u32 gicd_typer;
25 u64 val;
26 u64 tmp;
27 int i;
28 u64 redist_lpi_base;
29 u64 pend_base = GICR_BASE + GICR_PENDBASER;
30
31 gicd_typer = readl(GICD_BASE + GICD_TYPER);
32
33 /* GIC support for Locality specific peripheral interrupts (LPI's) */
34 if (!(gicd_typer & GICD_TYPER_LPIS)) {
35 pr_err("GIC implementation does not support LPI's\n");
36 return -EINVAL;
37 }
38
39 /*
40 * Check for LPI is disabled for all the redistributors.
41 * Once the LPI table is enabled, can not program the
42 * LPI configuration tables again, unless the GIC is reset.
43 */
44 for (i = 0; i < num_redist; i++) {
45 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
46
47 if ((readl((uintptr_t)(GICR_BASE + offset))) &
48 GICR_CTLR_ENABLE_LPIS) {
49 pr_err("Re-Distributor %d LPI is already enabled\n",
50 i);
51 return -EINVAL;
52 }
53 }
54
55 /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */
56 lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer),
57 ITS_MAX_LPI_NRBITS);
58
59 /* Set PropBase */
60 val = (base |
61 GICR_PROPBASER_INNERSHAREABLE |
62 GICR_PROPBASER_RAWAWB |
63 ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK));
64
65 writeq(val, (GICR_BASE + GICR_PROPBASER));
66 tmp = readl(GICR_BASE + GICR_PROPBASER);
67 if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
68 if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) {
69 val &= ~(GICR_PROPBASER_SHAREABILITY_MASK |
70 GICR_PROPBASER_CACHEABILITY_MASK);
71 val |= GICR_PROPBASER_NC;
72 writeq(val, (GICR_BASE + GICR_PROPBASER));
73 }
74 }
75
76 redist_lpi_base = base + LPI_PROPBASE_SZ;
77
78 for (i = 0; i < num_redist; i++) {
79 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
80
81 val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) |
82 GICR_PENDBASER_INNERSHAREABLE |
83 GICR_PENDBASER_RAWAWB);
84
85 writeq(val, (uintptr_t)(pend_base + offset));
86 tmp = readq((uintptr_t)(pend_base + offset));
87 if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
88 val &= ~(GICR_PENDBASER_SHAREABILITY_MASK |
89 GICR_PENDBASER_CACHEABILITY_MASK);
90 val |= GICR_PENDBASER_NC;
91 writeq(val, (uintptr_t)(pend_base + offset));
92 }
93
94 /* Enable LPI for the redistributor */
95 writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset));
96 }
97
98 return 0;
99}
100