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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001menu "Generic Driver Options"
2
Masahiro Yamada57ad8ee2014-10-23 22:26:09 +09003config DM
4 bool "Enable Driver Model"
Masahiro Yamada57ad8ee2014-10-23 22:26:09 +09005 help
Simon Glassd8b771d2015-02-05 21:41:35 -07006 This config option enables Driver Model. This brings in the core
7 support, including scanning of platform data on start-up. If
8 CONFIG_OF_CONTROL is enabled, the device tree will be scanned also
9 when available.
Simon Glass93e414d2015-02-05 21:41:36 -070010
11config SPL_DM
12 bool "Enable Driver Model for SPL"
13 depends on DM && SPL
14 help
15 Enable driver model in SPL. You will need to provide a
16 suitable malloc() implementation. If you are not using the
17 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
18 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
Andy Yan1fa20e4d2017-07-24 17:43:34 +080019 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
Simon Glass93e414d2015-02-05 21:41:36 -070020 In most cases driver model will only allocate a few uclasses
21 and devices in SPL, so 1KB should be enable. See
Andy Yan1fa20e4d2017-07-24 17:43:34 +080022 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
Simon Glass93e414d2015-02-05 21:41:36 -070023
Simon Glassc833c002017-04-02 09:50:31 -060024config TPL_DM
25 bool "Enable Driver Model for TPL"
26 depends on DM && TPL
27 help
28 Enable driver model in TPL. You will need to provide a
29 suitable malloc() implementation. If you are not using the
30 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
31 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
Andy Yan1fa20e4d2017-07-24 17:43:34 +080032 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
Simon Glassc833c002017-04-02 09:50:31 -060033 In most cases driver model will only allocate a few uclasses
34 and devices in SPL, so 1KB should be enough. See
Andy Yan1fa20e4d2017-07-24 17:43:34 +080035 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
Simon Glassc833c002017-04-02 09:50:31 -060036 Disable this for very small implementations.
37
Simon Glass93e414d2015-02-05 21:41:36 -070038config DM_WARN
39 bool "Enable warnings in driver model"
Masahiro Yamadacfc2f7d2015-02-24 22:26:21 +090040 depends on DM
41 default y
Simon Glass93e414d2015-02-05 21:41:36 -070042 help
43 The dm_warn() function can use up quite a bit of space for its
44 strings. By default this is disabled for SPL builds to save space.
45 This will cause dm_warn() to be compiled out - it will do nothing
46 when called.
Simon Glass93e414d2015-02-05 21:41:36 -070047
Masahiro Yamadaf70f39f2017-09-29 12:31:20 +090048config DM_DEBUG
49 bool "Enable debug messages in driver model core"
50 depends on DM
51 help
52 Say Y here if you want to compile in debug messages in DM core.
53
Simon Glass93e414d2015-02-05 21:41:36 -070054config DM_DEVICE_REMOVE
55 bool "Support device removal"
Masahiro Yamadacfc2f7d2015-02-24 22:26:21 +090056 depends on DM
57 default y
Simon Glass93e414d2015-02-05 21:41:36 -070058 help
59 We can save some code space by dropping support for removing a
Jean-Jacques Hiblot00b29882018-12-07 14:50:53 +010060 device.
Simon Glass93e414d2015-02-05 21:41:36 -070061
Hans de Goede246ba262015-07-01 20:52:59 +020062 Note that this may have undesirable results in the USB subsystem as
63 it causes unplugged devices to linger around in the dm-tree, and it
64 causes USB host controllers to not be stopped when booting the OS.
65
Jean-Jacques Hiblot00b29882018-12-07 14:50:53 +010066config SPL_DM_DEVICE_REMOVE
67 bool "Support device removal in SPL"
68 depends on SPL_DM
69 default n
70 help
71 We can save some code space by dropping support for removing a
72 device. This is not normally required in SPL, so by default this
73 option is disabled for SPL.
74
Simon Glass93e414d2015-02-05 21:41:36 -070075config DM_STDIO
76 bool "Support stdio registration"
Masahiro Yamadacfc2f7d2015-02-24 22:26:21 +090077 depends on DM
78 default y
Simon Glass93e414d2015-02-05 21:41:36 -070079 help
80 Normally serial drivers register with stdio so that they can be used
81 as normal output devices. In SPL we don't normally use stdio, so
82 we can omit this feature.
Simon Glass1bd3deb2015-02-27 22:06:30 -070083
84config DM_SEQ_ALIAS
85 bool "Support numbered aliases in device tree"
86 depends on DM
87 default y
88 help
89 Most boards will have a '/aliases' node containing the path to
90 numbered devices (e.g. serial0 = &serial0). This feature can be
Nathan Rossi7fa6ff42016-01-08 03:00:45 +100091 disabled if it is not required.
92
93config SPL_DM_SEQ_ALIAS
94 bool "Support numbered aliases in device tree in SPL"
Adam Fordac4d80e2019-08-24 13:50:34 -050095 depends on SPL_DM
Nathan Rossi7fa6ff42016-01-08 03:00:45 +100096 default n
97 help
98 Most boards will have a '/aliases' node containing the path to
99 numbered devices (e.g. serial0 = &serial0). This feature can be
Simon Glass1bd3deb2015-02-27 22:06:30 -0700100 disabled if it is not required, to save code space in SPL.
Simon Glass8e5efa02015-07-17 09:22:07 -0600101
102config REGMAP
103 bool "Support register maps"
104 depends on DM
105 help
106 Hardware peripherals tend to have one or more sets of registers
107 which can be accessed to control the hardware. A register map
108 models this with a simple read/write interface. It can in principle
109 support any bus type (I2C, SPI) but so far this only supports
110 direct memory access.
111
huang lindd8515e2015-11-17 14:20:13 +0800112config SPL_REGMAP
113 bool "Support register maps in SPL"
Philipp Tomsichcdda3492017-06-29 01:37:10 +0200114 depends on SPL_DM
huang lindd8515e2015-11-17 14:20:13 +0800115 help
116 Hardware peripherals tend to have one or more sets of registers
117 which can be accessed to control the hardware. A register map
118 models this with a simple read/write interface. It can in principle
119 support any bus type (I2C, SPI) but so far this only supports
120 direct memory access.
121
Philipp Tomsich03cdf692017-06-29 01:38:49 +0200122config TPL_REGMAP
123 bool "Support register maps in TPL"
124 depends on TPL_DM
125 help
126 Hardware peripherals tend to have one or more sets of registers
127 which can be accessed to control the hardware. A register map
128 models this with a simple read/write interface. It can in principle
129 support any bus type (I2C, SPI) but so far this only supports
130 direct memory access.
131
Simon Glass8e5efa02015-07-17 09:22:07 -0600132config SYSCON
133 bool "Support system controllers"
134 depends on REGMAP
135 help
136 Many SoCs have a number of system controllers which are dealt with
137 as a group by a single driver. Some common functionality is provided
138 by this uclass, including accessing registers via regmap and
139 assigning a unique number to each.
Masahiro Yamada8b15b162015-07-25 21:52:35 +0900140
huang lindd8515e2015-11-17 14:20:13 +0800141config SPL_SYSCON
142 bool "Support system controllers in SPL"
Philipp Tomsichcdda3492017-06-29 01:37:10 +0200143 depends on SPL_REGMAP
huang lindd8515e2015-11-17 14:20:13 +0800144 help
145 Many SoCs have a number of system controllers which are dealt with
146 as a group by a single driver. Some common functionality is provided
147 by this uclass, including accessing registers via regmap and
148 assigning a unique number to each.
149
Philipp Tomsich03cdf692017-06-29 01:38:49 +0200150config TPL_SYSCON
151 bool "Support system controllers in TPL"
152 depends on TPL_REGMAP
153 help
154 Many SoCs have a number of system controllers which are dealt with
155 as a group by a single driver. Some common functionality is provided
156 by this uclass, including accessing registers via regmap and
157 assigning a unique number to each.
158
Masahiro Yamada029bfca2015-07-25 21:52:37 +0900159config DEVRES
160 bool "Managed device resources"
161 depends on DM
162 help
163 This option enables the Managed device resources core support.
164 Device resources managed by the devres framework are automatically
165 released whether initialization fails half-way or the device gets
166 detached.
167
168 If this option is disabled, devres functions fall back to
169 non-managed variants. For example, devres_alloc() to kzalloc(),
170 devm_kmalloc() to kmalloc(), etc.
171
Masahiro Yamada8b15b162015-07-25 21:52:35 +0900172config DEBUG_DEVRES
Masahiro Yamadaf929c0b2015-07-25 21:52:38 +0900173 bool "Managed device resources debugging functions"
Masahiro Yamada029bfca2015-07-25 21:52:37 +0900174 depends on DEVRES
Masahiro Yamada8b15b162015-07-25 21:52:35 +0900175 help
176 If this option is enabled, devres debug messages are printed.
Masahiro Yamadaf929c0b2015-07-25 21:52:38 +0900177 Also, a function is available to dump a list of device resources.
Masahiro Yamada8b15b162015-07-25 21:52:35 +0900178 Select this if you are having a problem with devres or want to
179 debug resource management for a managed device.
180
181 If you are unsure about this, Say N here.
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900182
Marek Vasut298e6082015-08-03 01:15:48 +0200183config SIMPLE_BUS
184 bool "Support simple-bus driver"
185 depends on DM && OF_CONTROL
186 default y
187 help
188 Supports the 'simple-bus' driver, which is used on some systems.
189
190config SPL_SIMPLE_BUS
191 bool "Support simple-bus driver in SPL"
192 depends on SPL_DM && SPL_OF_CONTROL
Michal Simekb32467f2015-12-01 08:37:16 +0100193 default y
Marek Vasut298e6082015-08-03 01:15:48 +0200194 help
195 Supports the 'simple-bus' driver, which is used on some systems
196 in SPL.
197
Sean Andersonb7860542020-06-24 06:41:12 -0400198config SIMPLE_PM_BUS
199 bool "Support simple-pm-bus driver"
200 depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
201 help
202 Supports the 'simple-pm-bus' driver, which is used for busses that
203 have power domains and/or clocks which need to be enabled before use.
204
Stefan Roeseadc09052015-09-02 07:41:12 +0200205config OF_TRANSLATE
206 bool "Translate addresses using fdt_translate_address"
207 depends on DM && OF_CONTROL
208 default y
209 help
210 If this option is enabled, the reg property will be translated
211 using the fdt_translate_address() function. This is necessary
212 on some platforms (e.g. MVEBU) using complex "ranges"
213 properties in many nodes. As this translation is not handled
214 correctly in the default simple_bus_translate() function.
215
216 If this option is not enabled, simple_bus_translate() will be
217 used for the address translation. This function is faster and
218 smaller in size than fdt_translate_address().
219
220config SPL_OF_TRANSLATE
Stefan Roesef05eeb22015-11-26 13:38:01 +0100221 bool "Translate addresses using fdt_translate_address in SPL"
Stefan Roeseadc09052015-09-02 07:41:12 +0200222 depends on SPL_DM && SPL_OF_CONTROL
223 default n
224 help
225 If this option is enabled, the reg property will be translated
226 using the fdt_translate_address() function. This is necessary
227 on some platforms (e.g. MVEBU) using complex "ranges"
228 properties in many nodes. As this translation is not handled
229 correctly in the default simple_bus_translate() function.
230
231 If this option is not enabled, simple_bus_translate() will be
232 used for the address translation. This function is faster and
233 smaller in size than fdt_translate_address().
234
Stefan Roese85bddff2019-04-12 16:42:28 +0200235config TRANSLATION_OFFSET
236 bool "Platforms specific translation offset"
237 depends on DM && OF_CONTROL
238 help
239 Some platforms need a special address translation. Those
240 platforms (e.g. mvebu in SPL) can configure a translation
241 offset by enabling this option and setting the translation_offset
242 variable in the GD in their platform- / board-specific code.
243
Paul Burtondbef2f02016-05-17 07:43:24 +0100244config OF_ISA_BUS
245 bool
246 depends on OF_TRANSLATE
247 help
248 Is this option is enabled then support for the ISA bus will
249 be included for addresses read from DT. This is something that
250 should be known to be required or not based upon the board
Chris Packham3b6b4622019-01-13 22:13:24 +1300251 being targeted, and whether or not it makes use of an ISA bus.
Paul Burtondbef2f02016-05-17 07:43:24 +0100252
253 The bus is matched based upon its node name equalling "isa". The
254 busses #address-cells should equal 2, with the first cell being
255 used to hold flags & flag 0x1 indicating that the address range
256 should be accessed using I/O port in/out accessors. The second
257 cell holds the offset into ISA bus address space. The #size-cells
258 property should equal 1, and of course holds the size of the
259 address range used by a device.
260
261 If this option is not enabled then support for the ISA bus is
262 not included and any such busses used in DT will be treated as
263 typical simple-bus compatible busses. This will lead to
264 mistranslation of device addresses, so ensure that this is
265 enabled if your board does include an ISA bus.
266
Simon Glass34ef0c22017-05-18 20:09:03 -0600267config DM_DEV_READ_INLINE
268 bool
269 default y if !OF_LIVE
270
Simon Glass9fb9e9b2020-04-09 10:27:38 -0600271config ACPIGEN
272 bool "Support ACPI table generation in driver model"
Simon Glass55f3cde2020-07-16 21:22:39 -0600273 default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
Simon Glass9fb9e9b2020-04-09 10:27:38 -0600274 help
275 This option enables generation of ACPI tables using driver-model
276 devices. It adds a new operation struct to each driver, to support
277 things like generating device-specific tables and returning the ACPI
278 name of a device.
279
Simon Glassd73344b2020-09-22 12:45:14 -0600280config INTEL_ACPIGEN
281 bool "Support ACPI table generation for Intel SoCs"
282 depends on ACPIGEN
283 help
284 This option adds some functions used for programatic generation of
285 ACPI tables on Intel SoCs. This provides features for writing CPU
286 information such as P states and T stages. Also included is a way
287 to create a GNVS table and set it up.
288
Simon Glass5f78ee72020-09-10 20:21:25 -0600289config BOUNCE_BUFFER
290 bool "Include bounce buffer API"
291 help
292 Some peripherals support DMA from a subset of physically
293 addressable memory only. To support such peripherals, the
294 bounce buffer API uses a temporary buffer: it copies data
295 to/from DMA regions while managing cache operations.
296
297 A second possible use of bounce buffers is their ability to
298 provide aligned buffers for DMA operations.
299
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900300endmenu