| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mtd/denali,nand.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Denali NAND controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Masahiro Yamada <yamada.masahiro@socionext.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | enum: |
| 15 | - altr,socfpga-denali-nand |
| 16 | - socionext,uniphier-denali-nand-v5a |
| 17 | - socionext,uniphier-denali-nand-v5b |
| 18 | |
| 19 | reg-names: |
| 20 | description: | |
| 21 | There are two register regions: |
| 22 | nand_data: host data/command interface |
| 23 | denali_reg: register interface |
| 24 | items: |
| 25 | - const: nand_data |
| 26 | - const: denali_reg |
| 27 | |
| 28 | reg: |
| 29 | minItems: 2 |
| 30 | maxItems: 2 |
| 31 | |
| 32 | interrupts: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | clock-names: |
| 36 | description: | |
| 37 | There are three clocks: |
| 38 | nand: controller core clock |
| 39 | nand_x: bus interface clock |
| 40 | ecc: ECC circuit clock |
| 41 | items: |
| 42 | - const: nand |
| 43 | - const: nand_x |
| 44 | - const: ecc |
| 45 | |
| 46 | clocks: |
| 47 | minItems: 3 |
| 48 | maxItems: 3 |
| 49 | |
| 50 | reset-names: |
| 51 | description: | |
| 52 | There are two optional resets: |
| 53 | nand: controller core reset |
| 54 | reg: register reset |
| 55 | oneOf: |
| 56 | - items: |
| 57 | - const: nand |
| 58 | - const: reg |
| 59 | - const: nand |
| 60 | - const: reg |
| 61 | |
| 62 | resets: |
| 63 | minItems: 1 |
| 64 | maxItems: 2 |
| 65 | |
| 66 | patternProperties: |
| 67 | "^nand@[a-f0-9]$": |
| 68 | type: object |
| 69 | $ref: raw-nand-chip.yaml |
| 70 | unevaluatedProperties: false |
| 71 | |
| 72 | allOf: |
| 73 | - $ref: nand-controller.yaml |
| 74 | |
| 75 | - if: |
| 76 | properties: |
| 77 | compatible: |
| 78 | contains: |
| 79 | const: altr,socfpga-denali-nand |
| 80 | then: |
| 81 | patternProperties: |
| 82 | "^nand@[a-f0-9]$": |
| 83 | properties: |
| 84 | nand-ecc-strength: |
| 85 | enum: |
| 86 | - 8 |
| 87 | - 15 |
| 88 | nand-ecc-step-size: |
| 89 | enum: |
| 90 | - 512 |
| 91 | |
| 92 | - if: |
| 93 | properties: |
| 94 | compatible: |
| 95 | contains: |
| 96 | const: socionext,uniphier-denali-nand-v5a |
| 97 | then: |
| 98 | patternProperties: |
| 99 | "^nand@[a-f0-9]$": |
| 100 | properties: |
| 101 | nand-ecc-strength: |
| 102 | enum: |
| 103 | - 8 |
| 104 | - 16 |
| 105 | - 24 |
| 106 | nand-ecc-step-size: |
| 107 | enum: |
| 108 | - 1024 |
| 109 | |
| 110 | - if: |
| 111 | properties: |
| 112 | compatible: |
| 113 | contains: |
| 114 | const: socionext,uniphier-denali-nand-v5b |
| 115 | then: |
| 116 | patternProperties: |
| 117 | "^nand@[a-f0-9]$": |
| 118 | properties: |
| 119 | nand-ecc-strength: |
| 120 | enum: |
| 121 | - 8 |
| 122 | - 16 |
| 123 | nand-ecc-step-size: |
| 124 | enum: |
| 125 | - 1024 |
| 126 | |
| 127 | required: |
| 128 | - compatible |
| 129 | - reg |
| 130 | - interrupts |
| 131 | - clock-names |
| 132 | - clocks |
| 133 | |
| 134 | unevaluatedProperties: false |
| 135 | |
| 136 | examples: |
| 137 | - | |
| 138 | nand-controller@ff900000 { |
| 139 | compatible = "altr,socfpga-denali-nand"; |
| 140 | reg-names = "nand_data", "denali_reg"; |
| 141 | reg = <0xff900000 0x20>, <0xffb80000 0x1000>; |
| 142 | interrupts = <0 144 4>; |
| 143 | clock-names = "nand", "nand_x", "ecc"; |
| 144 | clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; |
| 145 | reset-names = "nand", "reg"; |
| 146 | resets = <&nand_rst>, <&nand_reg_rst>; |
| 147 | #address-cells = <1>; |
| 148 | #size-cells = <0>; |
| 149 | |
| 150 | nand@0 { |
| 151 | reg = <0>; |
| 152 | }; |
| 153 | }; |