blob: f40cacaed43f24c1bf396981ec87ca2f4cd7a625 [file] [log] [blame]
Alifer Moraesa0a29482020-03-06 07:46:33 -03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 NXP
4 */
5
6#ifndef __IMX8M_PHANBELL_H
7#define __IMX8M_PHANBELL_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#define CONFIG_SPL_MAX_SIZE (172 * 1024)
13#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Alifer Moraesa0a29482020-03-06 07:46:33 -030014
15#ifdef CONFIG_SPL_BUILD
16/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Alifer Moraesa0a29482020-03-06 07:46:33 -030017#define CONFIG_SPL_STACK 0x187FF0
Alifer Moraesa0a29482020-03-06 07:46:33 -030018#define CONFIG_SPL_BSS_START_ADDR 0x00180000
19#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
20#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
22#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
23
24/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
25#define CONFIG_MALLOC_F_ADDR 0x182000
26/* For RAW image gives a error info not panic */
27#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
Alifer Moraesa0a29482020-03-06 07:46:33 -030028#endif
29
Alifer Moraesa0a29482020-03-06 07:46:33 -030030/* ENET Config */
31/* ENET1 */
32#if defined(CONFIG_CMD_NET)
Alifer Moraesa0a29482020-03-06 07:46:33 -030033#define CONFIG_FEC_MXC_PHYADDR 0
34#define FEC_QUIRK_ENET_MAC
35
Alifer Moraesa0a29482020-03-06 07:46:33 -030036#define IMX_FEC_BASE 0x30BE0000
Alifer Moraesa0a29482020-03-06 07:46:33 -030037#endif
38
39#define CONFIG_MFG_ENV_SETTINGS \
40 "initrd_addr=0x43800000\0" \
41 "initrd_high=0xffffffff\0" \
42
43/* Initial environment variables */
44#define CONFIG_EXTRA_ENV_SETTINGS \
45 CONFIG_MFG_ENV_SETTINGS \
46 "script=boot.scr\0" \
47 "image=Image\0" \
48 "console=ttymxc0,115200\0" \
49 "fdt_addr=0x43000000\0" \
50 "fdt_high=0xffffffffffffffff\0" \
51 "boot_fdt=try\0" \
52 "fdt_file=imx8mq-phanbell.dtb\0" \
53 "initrd_addr=0x43800000\0" \
54 "initrd_high=0xffffffffffffffff\0" \
55 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
Tom Rinib113bca2021-12-11 14:55:52 -050056 "mmcpart=1\0" \
Alifer Moraesa0a29482020-03-06 07:46:33 -030057 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
58 "mmcautodetect=yes\0" \
59 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
60 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
61 "bootscript=echo Running bootscript from mmc ...; " \
62 "source\0" \
63 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
64 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
65 "mmcboot=echo Booting from mmc ...; " \
66 "run mmcargs; " \
67 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
68 "if run loadfdt; then " \
69 "booti ${loadaddr} - ${fdt_addr}; " \
70 "else " \
71 "echo WARN: Cannot load the DT; " \
72 "fi; " \
73 "else " \
74 "echo wait for boot; " \
75 "fi;\0" \
76 "netargs=setenv bootargs console=${console} " \
77 "root=/dev/nfs " \
78 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
79 "netboot=echo Booting from net ...; " \
80 "run netargs; " \
81 "if test ${ip_dyn} = yes; then " \
82 "setenv get_cmd dhcp; " \
83 "else " \
84 "setenv get_cmd tftp; " \
85 "fi; " \
86 "${get_cmd} ${loadaddr} ${image}; " \
87 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
88 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
89 "booti ${loadaddr} - ${fdt_addr}; " \
90 "else " \
91 "echo WARN: Cannot load the DT; " \
92 "fi; " \
93 "else " \
94 "booti; " \
95 "fi;\0"
96
Alifer Moraesa0a29482020-03-06 07:46:33 -030097/* Link Definitions */
Alifer Moraesa0a29482020-03-06 07:46:33 -030098
99#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
100#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
101#define CONFIG_SYS_INIT_SP_OFFSET \
102 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
103#define CONFIG_SYS_INIT_SP_ADDR \
104 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
105
Alifer Moraesa0a29482020-03-06 07:46:33 -0300106#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
107
Alifer Moraesa0a29482020-03-06 07:46:33 -0300108#define CONFIG_SYS_SDRAM_BASE 0x40000000
109#define PHYS_SDRAM 0x40000000
110#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
111
Alifer Moraesa0a29482020-03-06 07:46:33 -0300112#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
113
114/* Monitor Command Prompt */
Alifer Moraesa0a29482020-03-06 07:46:33 -0300115#define CONFIG_SYS_CBSIZE 1024
116#define CONFIG_SYS_MAXARGS 64
117#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
118#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
119 sizeof(CONFIG_SYS_PROMPT) + 16)
120
Alifer Moraesa0a29482020-03-06 07:46:33 -0300121#define CONFIG_SYS_FSL_USDHC_NUM 2
122#define CONFIG_SYS_FSL_ESDHC_ADDR 0
123
Alifer Moraesa0a29482020-03-06 07:46:33 -0300124#endif