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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / dts / upstream / src / arm64 / qcom / x1e001de-devkit.dts
blob: 5e3970b26e2f95456a8acfd78728d6a65f64ff83 [file] [log] [blame]
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "x1e80100.dtsi"
12#include "x1e80100-pmics.dtsi"
13
14/ {
15 model = "Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows";
16 compatible = "qcom,x1e001de-devkit", "qcom,x1e001de", "qcom,x1e80100";
17
18 aliases {
19 serial0 = &uart21;
20 };
21
22 wcd938x: audio-codec {
23 compatible = "qcom,wcd9385-codec";
24
25 pinctrl-names = "default";
26 pinctrl-0 = <&wcd_default>;
27
28 qcom,micbias1-microvolt = <1800000>;
29 qcom,micbias2-microvolt = <1800000>;
30 qcom,micbias3-microvolt = <1800000>;
31 qcom,micbias4-microvolt = <1800000>;
32 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
33 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
34 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
35 qcom,rx-device = <&wcd_rx>;
36 qcom,tx-device = <&wcd_tx>;
37
38 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
39
40 vdd-buck-supply = <&vreg_l15b_1p8>;
41 vdd-rxtx-supply = <&vreg_l15b_1p8>;
42 vdd-io-supply = <&vreg_l15b_1p8>;
43 vdd-mic-bias-supply = <&vreg_bob1>;
44
45 #sound-dai-cells = <1>;
46 };
47
48 chosen {
49 stdout-path = "serial0:115200n8";
50 };
51
52 pmic-glink {
53 compatible = "qcom,x1e80100-pmic-glink",
54 "qcom,sm8550-pmic-glink",
55 "qcom,pmic-glink";
56 #address-cells = <1>;
57 #size-cells = <0>;
58 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
59 <&tlmm 123 GPIO_ACTIVE_HIGH>,
60 <&tlmm 125 GPIO_ACTIVE_HIGH>;
61
62 /* Back panel port closer to the RJ45 connector */
63 connector@0 {
64 compatible = "usb-c-connector";
65 reg = <0>;
66 power-role = "dual";
67 data-role = "dual";
68
69 ports {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 port@0 {
74 reg = <0>;
75
76 pmic_glink_ss0_hs_in: endpoint {
77 remote-endpoint = <&usb_1_ss0_dwc3_hs>;
78 };
79 };
80
81 port@1 {
82 reg = <1>;
83
84 pmic_glink_ss0_ss_in: endpoint {
85 remote-endpoint = <&retimer_ss0_ss_out>;
86 };
87 };
88
89 port@2 {
90 reg = <2>;
91
92 pmic_glink_ss0_con_sbu_in: endpoint {
93 remote-endpoint = <&retimer_ss0_con_sbu_out>;
94 };
95 };
96 };
97 };
98
99 /* Back panel port closer to the audio jack */
100 connector@1 {
101 compatible = "usb-c-connector";
102 reg = <1>;
103 power-role = "dual";
104 data-role = "host";
105
106 ports {
107 #address-cells = <1>;
108 #size-cells = <0>;
109
110 port@0 {
111 reg = <0>;
112
113 pmic_glink_ss1_hs_in: endpoint {
114 remote-endpoint = <&usb_1_ss1_dwc3_hs>;
115 };
116 };
117
118 port@1 {
119 reg = <1>;
120
121 pmic_glink_ss1_ss_in: endpoint {
122 remote-endpoint = <&retimer_ss1_ss_out>;
123 };
124 };
125
126 port@2 {
127 reg = <2>;
128
129 pmic_glink_ss1_con_sbu_in: endpoint {
130 remote-endpoint = <&retimer_ss1_con_sbu_out>;
131 };
132 };
133 };
134 };
135
136 /* Front panel port */
137 connector@2 {
138 compatible = "usb-c-connector";
139 reg = <2>;
140 power-role = "dual";
141 data-role = "host";
142
143 ports {
144 #address-cells = <1>;
145 #size-cells = <0>;
146
147 port@0 {
148 reg = <0>;
149
150 pmic_glink_ss2_hs_in: endpoint {
151 remote-endpoint = <&usb_1_ss2_dwc3_hs>;
152 };
153 };
154
155 port@1 {
156 reg = <1>;
157
158 pmic_glink_ss2_ss_in: endpoint {
159 remote-endpoint = <&retimer_ss2_ss_out>;
160 };
161 };
162
163 port@2 {
164 reg = <2>;
165
166 pmic_glink_ss2_con_sbu_in: endpoint {
167 remote-endpoint = <&retimer_ss2_con_sbu_out>;
168 };
169 };
170 };
171 };
172 };
173
174 reserved-memory {
175 linux,cma {
176 compatible = "shared-dma-pool";
177 size = <0x0 0x8000000>;
178 reusable;
179 linux,cma-default;
180 };
181 };
182
183 sound {
184 compatible = "qcom,x1e80100-sndcard";
185 model = "X1E001DE-DEVKIT";
186 audio-routing = "IN1_HPHL", "HPHL_OUT",
187 "IN2_HPHR", "HPHR_OUT",
188 "AMIC2", "MIC BIAS2",
189 "TX SWR_INPUT1", "ADC2_OUTPUT";
190
191 wcd-playback-dai-link {
192 link-name = "WCD Playback";
193
194 cpu {
195 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
196 };
197
198 codec {
199 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
200 };
201
202 platform {
203 sound-dai = <&q6apm>;
204 };
205 };
206
207 wcd-capture-dai-link {
208 link-name = "WCD Capture";
209
210 cpu {
211 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
212 };
213
214 codec {
215 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
216 };
217
218 platform {
219 sound-dai = <&q6apm>;
220 };
221 };
222 };
223
224 vreg_nvme: regulator-nvme {
225 compatible = "regulator-fixed";
226
227 regulator-name = "VREG_NVME_3P3";
228 regulator-min-microvolt = <3300000>;
229 regulator-max-microvolt = <3300000>;
230
231 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
232 enable-active-high;
233
234 pinctrl-names = "default";
235 pinctrl-0 = <&nvme_reg_en>;
236
237 regulator-boot-on;
238 };
239
240 vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
241 compatible = "regulator-fixed";
242
243 regulator-name = "VREG_RTMR0_1P15";
244 regulator-min-microvolt = <1150000>;
245 regulator-max-microvolt = <1150000>;
246
247 gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
248 enable-active-high;
249
250 pinctrl-0 = <&usb0_pwr_1p15_en>;
251 pinctrl-names = "default";
252
253 regulator-boot-on;
254 };
255
256 vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
257 compatible = "regulator-fixed";
258
259 regulator-name = "VREG_RTMR0_1P8";
260 regulator-min-microvolt = <1800000>;
261 regulator-max-microvolt = <1800000>;
262
263 gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
264 enable-active-high;
265
266 pinctrl-0 = <&usb0_1p8_reg_en>;
267 pinctrl-names = "default";
268
269 regulator-boot-on;
270 };
271
272 vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
273 compatible = "regulator-fixed";
274
275 regulator-name = "VREG_RTMR0_3P3";
276 regulator-min-microvolt = <3300000>;
277 regulator-max-microvolt = <3300000>;
278
279 gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
280 enable-active-high;
281
282 pinctrl-0 = <&usb0_3p3_reg_en>;
283 pinctrl-names = "default";
284
285 regulator-boot-on;
286 };
287
288 vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
289 compatible = "regulator-fixed";
290
291 regulator-name = "VREG_RTMR1_1P15";
292 regulator-min-microvolt = <1150000>;
293 regulator-max-microvolt = <1150000>;
294
295 gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
296 enable-active-high;
297
298 pinctrl-0 = <&rtmr1_1p15_reg_en>;
299 pinctrl-names = "default";
300
301 regulator-boot-on;
302 };
303
304 vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
305 compatible = "regulator-fixed";
306
307 regulator-name = "VREG_RTMR1_1P8";
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <1800000>;
310
311 gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
312 enable-active-high;
313
314 pinctrl-0 = <&rtmr1_1p8_reg_en>;
315 pinctrl-names = "default";
316
317 regulator-boot-on;
318 };
319
320 vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
321 compatible = "regulator-fixed";
322
323 regulator-name = "VREG_RTMR1_3P3";
324 regulator-min-microvolt = <3300000>;
325 regulator-max-microvolt = <3300000>;
326
327 gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
328 enable-active-high;
329
330 pinctrl-0 = <&rtmr1_3p3_reg_en>;
331 pinctrl-names = "default";
332
333 regulator-boot-on;
334 };
335
336 vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
337 compatible = "regulator-fixed";
338
339 regulator-name = "VREG_RTMR2_1P15";
340 regulator-min-microvolt = <1150000>;
341 regulator-max-microvolt = <1150000>;
342
343 gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
344 enable-active-high;
345
346 pinctrl-0 = <&rtmr2_1p15_reg_en>;
347 pinctrl-names = "default";
348
349 regulator-boot-on;
350 };
351
352 vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
353 compatible = "regulator-fixed";
354
355 regulator-name = "VREG_RTMR2_1P8";
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <1800000>;
358
359 gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
360 enable-active-high;
361
362 pinctrl-0 = <&rtmr2_1p8_reg_en>;
363 pinctrl-names = "default";
364
365 regulator-boot-on;
366 };
367
368 vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
369 compatible = "regulator-fixed";
370
371 regulator-name = "VREG_RTMR2_3P3";
372 regulator-min-microvolt = <3300000>;
373 regulator-max-microvolt = <3300000>;
374
375 gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
376 enable-active-high;
377
378 pinctrl-0 = <&rtmr2_3p3_reg_en>;
379 pinctrl-names = "default";
380
381 regulator-boot-on;
382 };
383
384 vph_pwr: regulator-vph-pwr {
385 compatible = "regulator-fixed";
386
387 regulator-name = "vph_pwr";
388 regulator-min-microvolt = <3700000>;
389 regulator-max-microvolt = <3700000>;
390
391 regulator-always-on;
392 regulator-boot-on;
393 };
394
395 vreg_wwan: regulator-wwan {
396 compatible = "regulator-fixed";
397
398 regulator-name = "SDX_VPH_PWR";
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
401
402 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>;
403 enable-active-high;
404
405 pinctrl-0 = <&wwan_sw_en>;
406 pinctrl-names = "default";
407
408 regulator-boot-on;
409 };
410};
411
412&apps_rsc {
413 regulators-0 {
414 compatible = "qcom,pm8550-rpmh-regulators";
415 qcom,pmic-id = "b";
416
417 vdd-bob1-supply = <&vph_pwr>;
418 vdd-bob2-supply = <&vph_pwr>;
419 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
420 vdd-l2-l13-l14-supply = <&vreg_bob1>;
421 vdd-l5-l16-supply = <&vreg_bob1>;
422 vdd-l6-l7-supply = <&vreg_bob2>;
423 vdd-l8-l9-supply = <&vreg_bob1>;
424 vdd-l12-supply = <&vreg_s5j_1p2>;
425 vdd-l15-supply = <&vreg_s4c_1p8>;
426 vdd-l17-supply = <&vreg_bob2>;
427
428 vreg_bob1: bob1 {
429 regulator-name = "vreg_bob1";
430 regulator-min-microvolt = <3008000>;
431 regulator-max-microvolt = <3960000>;
432 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
433 };
434
435 vreg_bob2: bob2 {
436 regulator-name = "vreg_bob2";
437 regulator-min-microvolt = <2504000>;
438 regulator-max-microvolt = <3008000>;
439 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
440 };
441
442 vreg_l1b_1p8: ldo1 {
443 regulator-name = "vreg_l1b_1p8";
444 regulator-min-microvolt = <1800000>;
445 regulator-max-microvolt = <1800000>;
446 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
447 };
448
449 vreg_l2b_3p0: ldo2 {
450 regulator-name = "vreg_l2b_3p0";
451 regulator-min-microvolt = <3072000>;
452 regulator-max-microvolt = <3100000>;
453 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
454 };
455
456 vreg_l4b_1p8: ldo4 {
457 regulator-name = "vreg_l4b_1p8";
458 regulator-min-microvolt = <1800000>;
459 regulator-max-microvolt = <1800000>;
460 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
461 };
462
463 vreg_l5b_3p0: ldo5 {
464 regulator-name = "vreg_l5b_3p0";
465 regulator-min-microvolt = <3000000>;
466 regulator-max-microvolt = <3000000>;
467 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
468 };
469
470 vreg_l6b_1p8: ldo6 {
471 regulator-name = "vreg_l6b_1p8";
472 regulator-min-microvolt = <1800000>;
473 regulator-max-microvolt = <2960000>;
474 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
475 };
476
477 vreg_l7b_2p8: ldo7 {
478 regulator-name = "vreg_l7b_2p8";
479 regulator-min-microvolt = <2800000>;
480 regulator-max-microvolt = <2800000>;
481 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
482 };
483
484 vreg_l8b_3p0: ldo8 {
485 regulator-name = "vreg_l8b_3p0";
486 regulator-min-microvolt = <3072000>;
487 regulator-max-microvolt = <3072000>;
488 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
489 };
490
491 vreg_l9b_2p9: ldo9 {
492 regulator-name = "vreg_l9b_2p9";
493 regulator-min-microvolt = <2960000>;
494 regulator-max-microvolt = <2960000>;
495 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
496 };
497
498 vreg_l10b_1p8: ldo10 {
499 regulator-name = "vreg_l10b_1p8";
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <1800000>;
502 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
503 };
504
505 vreg_l12b_1p2: ldo12 {
506 regulator-name = "vreg_l12b_1p2";
507 regulator-min-microvolt = <1200000>;
508 regulator-max-microvolt = <1200000>;
509 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
510 };
511
512 vreg_l13b_3p0: ldo13 {
513 regulator-name = "vreg_l13b_3p0";
514 regulator-min-microvolt = <3072000>;
515 regulator-max-microvolt = <3100000>;
516 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
517 };
518
519 vreg_l14b_3p0: ldo14 {
520 regulator-name = "vreg_l14b_3p0";
521 regulator-min-microvolt = <3072000>;
522 regulator-max-microvolt = <3072000>;
523 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
524 };
525
526 vreg_l15b_1p8: ldo15 {
527 regulator-name = "vreg_l15b_1p8";
528 regulator-min-microvolt = <1800000>;
529 regulator-max-microvolt = <1800000>;
530 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
531 };
532
533 vreg_l16b_2p9: ldo16 {
534 regulator-name = "vreg_l16b_2p9";
535 regulator-min-microvolt = <2912000>;
536 regulator-max-microvolt = <2912000>;
537 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
538 };
539
540 vreg_l17b_2p5: ldo17 {
541 regulator-name = "vreg_l17b_2p5";
542 regulator-min-microvolt = <2504000>;
543 regulator-max-microvolt = <2504000>;
544 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
545 };
546 };
547
548 regulators-1 {
549 compatible = "qcom,pm8550ve-rpmh-regulators";
550 qcom,pmic-id = "c";
551
552 vdd-l1-supply = <&vreg_s5j_1p2>;
553 vdd-l2-supply = <&vreg_s1f_0p7>;
554 vdd-l3-supply = <&vreg_s1f_0p7>;
555 vdd-s4-supply = <&vph_pwr>;
556
557 vreg_s4c_1p8: smps4 {
558 regulator-name = "vreg_s4c_1p8";
559 regulator-min-microvolt = <1856000>;
560 regulator-max-microvolt = <2000000>;
561 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
562 };
563
564 vreg_l1c_1p2: ldo1 {
565 regulator-name = "vreg_l1c_1p2";
566 regulator-min-microvolt = <1200000>;
567 regulator-max-microvolt = <1200000>;
568 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
569 };
570
571 vreg_l2c_0p8: ldo2 {
572 regulator-name = "vreg_l2c_0p8";
573 regulator-min-microvolt = <880000>;
574 regulator-max-microvolt = <920000>;
575 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
576 };
577
578 vreg_l3c_0p8: ldo3 {
579 regulator-name = "vreg_l3c_0p8";
580 regulator-min-microvolt = <880000>;
581 regulator-max-microvolt = <920000>;
582 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
583 };
584 };
585
586 regulators-2 {
587 compatible = "qcom,pmc8380-rpmh-regulators";
588 qcom,pmic-id = "d";
589
590 vdd-l1-supply = <&vreg_s1f_0p7>;
591 vdd-l2-supply = <&vreg_s1f_0p7>;
592 vdd-l3-supply = <&vreg_s4c_1p8>;
593 vdd-s1-supply = <&vph_pwr>;
594
595 vreg_l1d_0p8: ldo1 {
596 regulator-name = "vreg_l1d_0p8";
597 regulator-min-microvolt = <880000>;
598 regulator-max-microvolt = <920000>;
599 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
600 };
601
602 vreg_l2d_0p9: ldo2 {
603 regulator-name = "vreg_l2d_0p9";
604 regulator-min-microvolt = <912000>;
605 regulator-max-microvolt = <920000>;
606 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
607 };
608
609 vreg_l3d_1p8: ldo3 {
610 regulator-name = "vreg_l3d_1p8";
611 regulator-min-microvolt = <1800000>;
612 regulator-max-microvolt = <1800000>;
613 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
614 };
615 };
616
617 regulators-3 {
618 compatible = "qcom,pmc8380-rpmh-regulators";
619 qcom,pmic-id = "e";
620
621 vdd-l2-supply = <&vreg_s1f_0p7>;
622 vdd-l3-supply = <&vreg_s5j_1p2>;
623
624 vreg_l2e_0p8: ldo2 {
625 regulator-name = "vreg_l2e_0p8";
626 regulator-min-microvolt = <880000>;
627 regulator-max-microvolt = <920000>;
628 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
629 };
630
631 vreg_l3e_1p2: ldo3 {
632 regulator-name = "vreg_l3e_1p2";
633 regulator-min-microvolt = <1200000>;
634 regulator-max-microvolt = <1200000>;
635 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
636 };
637 };
638
639 regulators-4 {
640 compatible = "qcom,pmc8380-rpmh-regulators";
641 qcom,pmic-id = "f";
642
643 vdd-l1-supply = <&vreg_s5j_1p2>;
644 vdd-l2-supply = <&vreg_s5j_1p2>;
645 vdd-l3-supply = <&vreg_s5j_1p2>;
646 vdd-s1-supply = <&vph_pwr>;
647
648 vreg_s1f_0p7: smps1 {
649 regulator-name = "vreg_s1f_0p7";
650 regulator-min-microvolt = <700000>;
651 regulator-max-microvolt = <1100000>;
652 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
653 };
654
655 vreg_l1f_1p0: ldo1 {
656 regulator-name = "vreg_l1f_1p0";
657 regulator-min-microvolt = <1024000>;
658 regulator-max-microvolt = <1024000>;
659 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
660 };
661
662 vreg_l2f_1p0: ldo2 {
663 regulator-name = "vreg_l2f_1p0";
664 regulator-min-microvolt = <1024000>;
665 regulator-max-microvolt = <1024000>;
666 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
667 };
668
669 vreg_l3f_1p0: ldo3 {
670 regulator-name = "vreg_l3f_1p0";
671 regulator-min-microvolt = <1024000>;
672 regulator-max-microvolt = <1024000>;
673 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
674 };
675 };
676
677 regulators-6 {
678 compatible = "qcom,pm8550ve-rpmh-regulators";
679 qcom,pmic-id = "i";
680
681 vdd-l1-supply = <&vreg_s4c_1p8>;
682 vdd-l2-supply = <&vreg_s5j_1p2>;
683 vdd-l3-supply = <&vreg_s1f_0p7>;
684 vdd-s1-supply = <&vph_pwr>;
685 vdd-s2-supply = <&vph_pwr>;
686
687 vreg_s1i_0p9: smps1 {
688 regulator-name = "vreg_s1i_0p9";
689 regulator-min-microvolt = <900000>;
690 regulator-max-microvolt = <920000>;
691 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
692 };
693
694 vreg_s2i_1p0: smps2 {
695 regulator-name = "vreg_s2i_1p0";
696 regulator-min-microvolt = <1000000>;
697 regulator-max-microvolt = <1100000>;
698 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
699 };
700
701 vreg_l1i_1p8: ldo1 {
702 regulator-name = "vreg_l1i_1p8";
703 regulator-min-microvolt = <1800000>;
704 regulator-max-microvolt = <1800000>;
705 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
706 };
707
708 vreg_l2i_1p2: ldo2 {
709 regulator-name = "vreg_l2i_1p2";
710 regulator-min-microvolt = <1200000>;
711 regulator-max-microvolt = <1200000>;
712 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
713 };
714
715 vreg_l3i_0p8: ldo3 {
716 regulator-name = "vreg_l3i_0p8";
717 regulator-min-microvolt = <880000>;
718 regulator-max-microvolt = <920000>;
719 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
720 };
721 };
722
723 regulators-7 {
724 compatible = "qcom,pm8550ve-rpmh-regulators";
725 qcom,pmic-id = "j";
726
727 vdd-l1-supply = <&vreg_s1f_0p7>;
728 vdd-l2-supply = <&vreg_s5j_1p2>;
729 vdd-l3-supply = <&vreg_s1f_0p7>;
730 vdd-s5-supply = <&vph_pwr>;
731
732 vreg_s5j_1p2: smps5 {
733 regulator-name = "vreg_s5j_1p2";
734 regulator-min-microvolt = <1256000>;
735 regulator-max-microvolt = <1304000>;
736 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
737 };
738
739 vreg_l1j_0p8: ldo1 {
740 regulator-name = "vreg_l1j_0p8";
741 regulator-min-microvolt = <880000>;
742 regulator-max-microvolt = <920000>;
743 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
744 };
745
746 vreg_l2j_1p2: ldo2 {
747 regulator-name = "vreg_l2j_1p2";
748 regulator-min-microvolt = <1200000>;
749 regulator-max-microvolt = <1200000>;
750 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
751 };
752
753 vreg_l3j_0p8: ldo3 {
754 regulator-name = "vreg_l3j_0p8";
755 regulator-min-microvolt = <880000>;
756 regulator-max-microvolt = <920000>;
757 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
758 };
759 };
760};
761
762&gpu {
763 status = "okay";
764
765 zap-shader {
766 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";
767 };
768};
769
770&i2c1 {
771 clock-frequency = <400000>;
772
773 status = "okay";
774
775 typec-mux@8 {
776 compatible = "parade,ps8830";
777 reg = <0x08>;
778
779 clocks = <&rpmhcc RPMH_RF_CLK5>;
780 clock-names = "xo";
781
782 vdd-supply = <&vreg_rtmr2_1p15>;
783 vdd33-supply = <&vreg_rtmr2_3p3>;
784 vdd33-cap-supply = <&vreg_rtmr2_3p3>;
785 vddar-supply = <&vreg_rtmr2_1p15>;
786 vddat-supply = <&vreg_rtmr2_1p15>;
787 vddio-supply = <&vreg_rtmr2_1p8>;
788
789 reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>;
790
791 orientation-switch;
792 retimer-switch;
793
794 ports {
795 #address-cells = <1>;
796 #size-cells = <0>;
797
798 port@0 {
799 reg = <0>;
800
801 retimer_ss2_ss_out: endpoint {
802 remote-endpoint = <&pmic_glink_ss2_ss_in>;
803 };
804 };
805
806 port@1 {
807 reg = <1>;
808
809 retimer_ss2_ss_in: endpoint {
810 remote-endpoint = <&usb_1_ss2_qmpphy_out>;
811 };
812 };
813
814 port@2 {
815 reg = <2>;
816
817 retimer_ss2_con_sbu_out: endpoint {
818 remote-endpoint = <&pmic_glink_ss2_con_sbu_in>;
819 };
820 };
821 };
822 };
823};
824
825&i2c3 {
826 clock-frequency = <400000>;
827
828 status = "okay";
829
830 typec-mux@8 {
831 compatible = "parade,ps8830";
832 reg = <0x08>;
833
834 clocks = <&rpmhcc RPMH_RF_CLK3>;
835 clock-names = "xo";
836
837 vdd-supply = <&vreg_rtmr0_1p15>;
838 vdd33-supply = <&vreg_rtmr0_3p3>;
839 vdd33-cap-supply = <&vreg_rtmr0_3p3>;
840 vddar-supply = <&vreg_rtmr0_1p15>;
841 vddat-supply = <&vreg_rtmr0_1p15>;
842 vddio-supply = <&vreg_rtmr0_1p8>;
843
844 reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>;
845
846 retimer-switch;
847 orientation-switch;
848
849 ports {
850 #address-cells = <1>;
851 #size-cells = <0>;
852
853 port@0 {
854 reg = <0>;
855
856 retimer_ss0_ss_out: endpoint {
857 remote-endpoint = <&pmic_glink_ss0_ss_in>;
858 };
859 };
860
861 port@1 {
862 reg = <1>;
863
864 retimer_ss0_ss_in: endpoint {
865 remote-endpoint = <&usb_1_ss0_qmpphy_out>;
866 };
867 };
868
869 port@2 {
870 reg = <2>;
871
872 retimer_ss0_con_sbu_out: endpoint {
873 remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
874 };
875 };
876 };
877 };
878};
879
880&i2c7 {
881 clock-frequency = <400000>;
882
883 status = "okay";
884
885 typec-mux@8 {
886 compatible = "parade,ps8830";
887 reg = <0x8>;
888
889 clocks = <&rpmhcc RPMH_RF_CLK4>;
890 clock-names = "xo";
891
892 vdd-supply = <&vreg_rtmr1_1p15>;
893 vdd33-supply = <&vreg_rtmr1_3p3>;
894 vdd33-cap-supply = <&vreg_rtmr1_3p3>;
895 vddar-supply = <&vreg_rtmr1_1p15>;
896 vddat-supply = <&vreg_rtmr1_1p15>;
897 vddio-supply = <&vreg_rtmr1_1p8>;
898
899 reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>;
900
901 retimer-switch;
902 orientation-switch;
903
904 ports {
905 #address-cells = <1>;
906 #size-cells = <0>;
907
908 port@0 {
909 reg = <0>;
910
911 retimer_ss1_ss_out: endpoint {
912 remote-endpoint = <&pmic_glink_ss1_ss_in>;
913 };
914 };
915
916 port@1 {
917 reg = <1>;
918
919 retimer_ss1_ss_in: endpoint {
920 remote-endpoint = <&usb_1_ss1_qmpphy_out>;
921 };
922 };
923
924 port@2 {
925 reg = <2>;
926
927 retimer_ss1_con_sbu_out: endpoint {
928 remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
929 };
930 };
931 };
932 };
933};
934
935&mdss {
936 status = "okay";
937};
938
939&mdss_dp0 {
940 status = "okay";
941};
942
943&mdss_dp0_out {
944 data-lanes = <0 1>;
945};
946
947&mdss_dp1 {
948 status = "okay";
949};
950
951&mdss_dp1_out {
952 data-lanes = <0 1>;
953};
954
955&mdss_dp2 {
956 status = "okay";
957};
958
959&mdss_dp2_out {
960 data-lanes = <0 1>;
961};
962
963&pcie4 {
964 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
965 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
966
967 pinctrl-0 = <&pcie4_default>;
968 pinctrl-names = "default";
969
970 status = "okay";
971};
972
973&pcie4_phy {
974 vdda-phy-supply = <&vreg_l3i_0p8>;
975 vdda-pll-supply = <&vreg_l3e_1p2>;
976
977 status = "okay";
978};
979
980&pcie5 {
981 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
982 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
983
984 vddpe-3v3-supply = <&vreg_wwan>;
985
986 pinctrl-0 = <&pcie5_default>;
987 pinctrl-names = "default";
988
989 status = "okay";
990};
991
992&pcie5_phy {
993 vdda-phy-supply = <&vreg_l3i_0p8>;
994 vdda-pll-supply = <&vreg_l3e_1p2>;
995
996 status = "okay";
997};
998
999&pcie6a {
1000 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
1001 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
1002
1003 vddpe-3v3-supply = <&vreg_nvme>;
1004
1005 pinctrl-names = "default";
1006 pinctrl-0 = <&pcie6a_default>;
1007
1008 status = "okay";
1009};
1010
1011&pcie6a_phy {
1012 vdda-phy-supply = <&vreg_l1d_0p8>;
1013 vdda-pll-supply = <&vreg_l2j_1p2>;
1014
1015 status = "okay";
1016};
1017
1018&pm8550_gpios {
1019 usb0_3p3_reg_en: usb0-3p3-reg-en-state {
1020 pins = "gpio11";
1021 function = "normal";
1022 };
1023};
1024
1025&pmc8380_5_gpios {
1026 usb0_pwr_1p15_en: usb0-pwr-1p15-en-state {
1027 pins = "gpio8";
1028 function = "normal";
1029 };
1030};
1031
1032&pm8550ve_9_gpios {
1033 usb0_1p8_reg_en: usb0-1p8-reg-en-state {
1034 pins = "gpio8";
1035 function = "normal";
1036 };
1037};
1038
1039&qupv3_0 {
1040 status = "okay";
1041};
1042
1043&qupv3_1 {
1044 status = "okay";
1045};
1046
1047&qupv3_2 {
1048 status = "okay";
1049};
1050
1051&remoteproc_adsp {
1052 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcadsp8380.mbn",
1053 "qcom/x1e80100/Thundercomm/DEVKIT/adsp_dtbs.elf";
1054
1055 status = "okay";
1056};
1057
1058&remoteproc_cdsp {
1059 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qccdsp8380.mbn",
1060 "qcom/x1e80100/Thundercomm/DEVKIT/cdsp_dtbs.elf";
1061
1062 status = "okay";
1063};
1064
1065&sdhc_2 {
1066 cd-gpios = <&tlmm 71 GPIO_ACTIVE_LOW>;
1067 pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
1068 pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
1069 pinctrl-names = "default", "sleep";
1070 vmmc-supply = <&vreg_l9b_2p9>;
1071 vqmmc-supply = <&vreg_l6b_1p8>;
1072 bus-width = <4>;
1073 no-sdio;
1074 no-mmc;
1075 status = "okay";
1076};
1077
1078&smb2360_0 {
1079 status = "okay";
1080};
1081
1082&smb2360_0_eusb2_repeater {
1083 vdd18-supply = <&vreg_l3d_1p8>;
1084 vdd3-supply = <&vreg_l2b_3p0>;
1085};
1086
1087&smb2360_1 {
1088 status = "okay";
1089};
1090
1091&smb2360_1_eusb2_repeater {
1092 vdd18-supply = <&vreg_l3d_1p8>;
1093 vdd3-supply = <&vreg_l14b_3p0>;
1094};
1095
1096&smb2360_2 {
1097 status = "okay";
1098};
1099
1100&smb2360_2_eusb2_repeater {
1101 vdd18-supply = <&vreg_l3d_1p8>;
1102 vdd3-supply = <&vreg_l8b_3p0>;
1103};
1104
1105&swr1 {
1106 status = "okay";
1107
1108 /* WCD9385 RX */
1109 wcd_rx: codec@0,4 {
1110 compatible = "sdw20217010d00";
1111 reg = <0 4>;
1112 qcom,rx-port-mapping = <1 2 3 4 5>;
1113 };
1114};
1115
1116&swr2 {
1117 status = "okay";
1118
1119 /* WCD9385 TX */
1120 wcd_tx: codec@0,3 {
1121 compatible = "sdw20217010d00";
1122 reg = <0 3>;
1123 qcom,tx-port-mapping = <2 2 3 4>;
1124 };
1125};
1126
1127&tlmm {
1128 gpio-reserved-ranges = <44 4>; /* SPI (TPM) */
1129
1130 nvme_reg_en: nvme-reg-en-state {
1131 pins = "gpio18";
1132 function = "gpio";
1133 drive-strength = <2>;
1134 bias-disable;
1135 };
1136
1137 pcie4_default: pcie4-default-state {
1138 clkreq-n-pins {
1139 pins = "gpio147";
1140 function = "pcie4_clk";
1141 drive-strength = <2>;
1142 bias-pull-up;
1143 };
1144
1145 perst-n-pins {
1146 pins = "gpio146";
1147 function = "gpio";
1148 drive-strength = <2>;
1149 bias-disable;
1150 };
1151
1152 wake-n-pins {
1153 pins = "gpio148";
1154 function = "gpio";
1155 drive-strength = <2>;
1156 bias-pull-up;
1157 };
1158 };
1159
1160 pcie5_default: pcie5-default-state {
1161 clkreq-n-pins {
1162 pins = "gpio150";
1163 function = "pcie5_clk";
1164 drive-strength = <2>;
1165 bias-pull-up;
1166 };
1167
1168 perst-n-pins {
1169 pins = "gpio149";
1170 function = "gpio";
1171 drive-strength = <2>;
1172 bias-disable;
1173 };
1174
1175 wake-n-pins {
1176 pins = "gpio151";
1177 function = "gpio";
1178 drive-strength = <2>;
1179 bias-pull-up;
1180 };
1181 };
1182
1183 pcie6a_default: pcie6a-default-state {
1184 clkreq-n-pins {
1185 pins = "gpio153";
1186 function = "pcie6a_clk";
1187 drive-strength = <2>;
1188 bias-pull-up;
1189 };
1190
1191 perst-n-pins {
1192 pins = "gpio152";
1193 function = "gpio";
1194 drive-strength = <2>;
1195 bias-disable;
1196 };
1197
1198 wake-n-pins {
1199 pins = "gpio154";
1200 function = "gpio";
1201 drive-strength = <2>;
1202 bias-pull-up;
1203 };
1204 };
1205
1206 rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {
1207 pins = "gpio188";
1208 function = "gpio";
1209 drive-strength = <2>;
1210 bias-disable;
1211 };
1212
1213 rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {
1214 pins = "gpio175";
1215 function = "gpio";
1216 drive-strength = <2>;
1217 bias-disable;
1218 };
1219
1220 rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {
1221 pins = "gpio186";
1222 function = "gpio";
1223 drive-strength = <2>;
1224 bias-disable;
1225 };
1226
1227 rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state {
1228 pins = "gpio189";
1229 function = "gpio";
1230 drive-strength = <2>;
1231 bias-disable;
1232 };
1233
1234 rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state {
1235 pins = "gpio126";
1236 function = "gpio";
1237 drive-strength = <2>;
1238 bias-disable;
1239 };
1240
1241 rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state {
1242 pins = "gpio187";
1243 function = "gpio";
1244 drive-strength = <2>;
1245 bias-disable;
1246 };
1247
1248 sdc2_card_det_n: sdc2-card-det-state {
1249 pins = "gpio71";
1250 function = "gpio";
1251 drive-strength = <2>;
1252 bias-pull-up;
1253 };
1254
1255 wcd_default: wcd-reset-n-active-state {
1256 pins = "gpio191";
1257 function = "gpio";
1258 drive-strength = <16>;
1259 bias-disable;
1260 output-low;
1261 };
1262
1263 wwan_sw_en: wwan-sw-en-state {
1264 pins = "gpio221";
1265 function = "gpio";
1266 drive-strength = <4>;
1267 bias-disable;
1268 };
1269};
1270
1271&uart21 {
1272 compatible = "qcom,geni-debug-uart";
1273 status = "okay";
1274};
1275
1276&usb_1_ss0_hsphy {
1277 vdd-supply = <&vreg_l3j_0p8>;
1278 vdda12-supply = <&vreg_l2j_1p2>;
1279
1280 phys = <&smb2360_0_eusb2_repeater>;
1281
1282 status = "okay";
1283};
1284
1285&usb_1_ss0_qmpphy {
1286 vdda-phy-supply = <&vreg_l2j_1p2>;
1287 vdda-pll-supply = <&vreg_l1j_0p8>;
1288
1289 status = "okay";
1290};
1291
1292&usb_1_ss0 {
1293 status = "okay";
1294};
1295
1296&usb_1_ss0_dwc3 {
1297 dr_mode = "otg";
1298 usb-role-switch;
1299};
1300
1301&usb_1_ss0_dwc3_hs {
1302 remote-endpoint = <&pmic_glink_ss0_hs_in>;
1303};
1304
1305&usb_1_ss0_qmpphy_out {
1306 remote-endpoint = <&retimer_ss0_ss_in>;
1307};
1308
1309&usb_1_ss1_hsphy {
1310 vdd-supply = <&vreg_l3j_0p8>;
1311 vdda12-supply = <&vreg_l2j_1p2>;
1312
1313 phys = <&smb2360_1_eusb2_repeater>;
1314
1315 status = "okay";
1316};
1317
1318&usb_1_ss1_qmpphy {
1319 vdda-phy-supply = <&vreg_l2j_1p2>;
1320 vdda-pll-supply = <&vreg_l2d_0p9>;
1321
1322 status = "okay";
1323};
1324
1325&usb_1_ss1 {
1326 status = "okay";
1327};
1328
1329&usb_1_ss1_dwc3 {
1330 dr_mode = "host";
1331};
1332
1333&usb_1_ss1_dwc3_hs {
1334 remote-endpoint = <&pmic_glink_ss1_hs_in>;
1335};
1336
1337&usb_1_ss1_qmpphy_out {
1338 remote-endpoint = <&retimer_ss1_ss_in>;
1339};
1340
1341&usb_1_ss2_hsphy {
1342 vdd-supply = <&vreg_l3j_0p8>;
1343 vdda12-supply = <&vreg_l2j_1p2>;
1344
1345 phys = <&smb2360_2_eusb2_repeater>;
1346
1347 status = "okay";
1348};
1349
1350&usb_1_ss2_qmpphy {
1351 vdda-phy-supply = <&vreg_l2j_1p2>;
1352 vdda-pll-supply = <&vreg_l2d_0p9>;
1353
1354 status = "okay";
1355};
1356
1357&usb_1_ss2 {
1358 status = "okay";
1359};
1360
1361&usb_1_ss2_dwc3 {
1362 dr_mode = "host";
1363};
1364
1365&usb_1_ss2_dwc3_hs {
1366 remote-endpoint = <&pmic_glink_ss2_hs_in>;
1367};
1368
1369&usb_1_ss2_qmpphy_out {
1370 remote-endpoint = <&retimer_ss2_ss_in>;
1371};