dts/upstream/src/arm64/qcom/sdm845-db845c-navigation-mezzanine.dtso

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022, Linaro Ltd.
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/clock/qcom,camcc-sdm845.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	reserved-memory {
		linux,cma {
			compatible = "shared-dma-pool";
			size = <0x0 0x8000000>;
			reusable;
			linux,cma-default;
		};
	};
};

&camss {
	vdda-phy-supply = <&vreg_l1a_0p875>;
	vdda-pll-supply = <&vreg_l26a_1p2>;

	status = "okay";

	ports {
		port@0 {
			csiphy0_ep: endpoint {
				data-lanes = <0 1 2 3>;
				remote-endpoint = <&ov8856_ep>;
			};
		};
	};
};

&cci {
	status = "okay";
};

&cci_i2c0 {
	#address-cells = <1>;
	#size-cells = <0>;

	camera@10 {
		compatible = "ovti,ov8856";
		reg = <0x10>;

		/* CAM0_RST_N */
		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&cam0_default>;

		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
		clock-names = "xvclk";
		clock-frequency = <19200000>;

		/*
		 * The &vreg_s4a_1p8 trace is powered on as a,
		 * so it is represented by a fixed regulator.
		 *
		 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
		 * both have to be enabled through the power management
		 * gpios.
		 */
		dovdd-supply = <&vreg_lvs1a_1p8>;
		avdd-supply = <&cam0_avdd_2v8>;
		dvdd-supply = <&cam0_dvdd_1v2>;

		port {
			ov8856_ep: endpoint {
				link-frequencies = /bits/ 64
					<360000000 180000000>;
				data-lanes = <1 2 3 4>;
				remote-endpoint = <&csiphy0_ep>;
			};
		};
	};
};