blob: 9482bec1aa5736360a54c9f943bdb2a4641c9fa8 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Nuvoton Technology Corp.
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
5 * Jacky huang <ychuang3@nuvoton.com>
6 */
7
8/dts-v1/;
9#include "ma35d1.dtsi"
10
11/ {
12 model = "Nuvoton MA35D1-IoT";
13 compatible = "nuvoton,ma35d1-iot", "nuvoton,ma35d1";
14
15 aliases {
16 serial0 = &uart0;
Tom Rini9c8af152024-12-24 12:03:04 -060017 serial10 = &uart10;
18 serial12 = &uart12;
19 serial13 = &uart13;
20 serial14 = &uart14;
Tom Rini53633a82024-02-29 12:33:36 -050021 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 mem: memory@80000000 {
28 device_type = "memory";
29 reg = <0x00000000 0x80000000 0 0x20000000>; /* 512M DRAM */
30 };
31
32 clk_hxt: clock-hxt {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <24000000>;
36 clock-output-names = "clk_hxt";
37 };
38};
39
Tom Rini53633a82024-02-29 12:33:36 -050040&clk {
41 assigned-clocks = <&clk CAPLL>,
42 <&clk DDRPLL>,
43 <&clk APLL>,
44 <&clk EPLL>,
45 <&clk VPLL>;
46 assigned-clock-rates = <800000000>,
47 <266000000>,
48 <180000000>,
49 <500000000>,
50 <102000000>;
51 nuvoton,pll-mode = "integer",
52 "fractional",
53 "integer",
54 "integer",
55 "integer";
56};
Tom Rini9c8af152024-12-24 12:03:04 -060057
58&pinctrl {
59 uart-grp {
60 pinctrl_uart0: uart0-pins {
61 nuvoton,pins = <4 14 1>,
62 <4 15 1>;
63 bias-disable;
64 power-source = <1>;
65 };
66
67 pinctrl_uart10: uart10-pins {
68 nuvoton,pins = <7 4 2>,
69 <7 5 2>,
70 <7 6 2>,
71 <7 7 2>;
72 bias-disable;
73 power-source = <1>;
74 };
75
76 pinctrl_uart12: uart12-pins {
77 nuvoton,pins = <2 13 2>,
78 <2 14 2>,
79 <2 15 2>;
80 bias-disable;
81 power-source = <1>;
82 };
83
84 pinctrl_uart13: uart13-pins {
85 nuvoton,pins = <7 12 3>,
86 <7 13 3>;
87 bias-disable;
88 power-source = <1>;
89 };
90
91 pinctrl_uart14: uart14-pins {
92 nuvoton,pins = <7 14 2>,
93 <7 15 2>;
94 bias-disable;
95 power-source = <1>;
96 };
97 };
98};
99
100&uart0 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart0>;
103 status = "okay";
104};
105
106&uart10 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_uart10>;
109 status = "okay";
110};
111
112&uart12 {
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_uart12>;
115 status = "okay";
116};
117
118&uart13 {
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_uart13>;
121 status = "okay";
122};
123
124&uart14 {
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_uart14>;
127 status = "okay";
128};