blob: 97e4b52066dcf205156b3525cbf411650635af14 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12-common.dtsi"
8#include <dt-bindings/clock/axg-audio-clkc.h>
9#include <dt-bindings/power/meson-sm1-power.h>
10#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
12
13/ {
14 compatible = "amlogic,sm1";
15
16 tdmif_a: audio-controller-0 {
17 compatible = "amlogic,axg-tdm-iface";
18 #sound-dai-cells = <0>;
19 sound-name-prefix = "TDM_A";
Tom Rini6b642ac2024-10-01 12:20:28 -060020 clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
21 <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
22 <&clkc_audio AUD_CLKID_MST_A_MCLK>;
23 clock-names = "sclk", "lrclk", "mclk";
Tom Rini53633a82024-02-29 12:33:36 -050024 status = "disabled";
25 };
26
27 tdmif_b: audio-controller-1 {
28 compatible = "amlogic,axg-tdm-iface";
29 #sound-dai-cells = <0>;
30 sound-name-prefix = "TDM_B";
Tom Rini6b642ac2024-10-01 12:20:28 -060031 clocks = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
32 <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
33 <&clkc_audio AUD_CLKID_MST_B_MCLK>;
34 clock-names = "sclk", "lrclk", "mclk";
Tom Rini53633a82024-02-29 12:33:36 -050035 status = "disabled";
36 };
37
38 tdmif_c: audio-controller-2 {
39 compatible = "amlogic,axg-tdm-iface";
40 #sound-dai-cells = <0>;
41 sound-name-prefix = "TDM_C";
Tom Rini6b642ac2024-10-01 12:20:28 -060042 clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
43 <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
44 <&clkc_audio AUD_CLKID_MST_C_MCLK>;
45 clock-names = "sclk", "lrclk", "mclk";
Tom Rini53633a82024-02-29 12:33:36 -050046 status = "disabled";
47 };
48
49 cpus {
50 #address-cells = <0x2>;
51 #size-cells = <0x0>;
52
53 cpu0: cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,cortex-a55";
56 reg = <0x0 0x0>;
57 enable-method = "psci";
58 next-level-cache = <&l2>;
59 #cooling-cells = <2>;
60 };
61
62 cpu1: cpu@1 {
63 device_type = "cpu";
64 compatible = "arm,cortex-a55";
65 reg = <0x0 0x1>;
66 enable-method = "psci";
67 next-level-cache = <&l2>;
68 #cooling-cells = <2>;
69 };
70
71 cpu2: cpu@2 {
72 device_type = "cpu";
73 compatible = "arm,cortex-a55";
74 reg = <0x0 0x2>;
75 enable-method = "psci";
76 next-level-cache = <&l2>;
77 #cooling-cells = <2>;
78 };
79
80 cpu3: cpu@3 {
81 device_type = "cpu";
82 compatible = "arm,cortex-a55";
83 reg = <0x0 0x3>;
84 enable-method = "psci";
85 next-level-cache = <&l2>;
86 #cooling-cells = <2>;
87 };
88
89 l2: l2-cache0 {
90 compatible = "cache";
91 cache-level = <2>;
92 cache-unified;
93 };
94 };
95
96 cpu_opp_table: opp-table {
97 compatible = "operating-points-v2";
98 opp-shared;
99
100 opp-1000000000 {
101 opp-hz = /bits/ 64 <1000000000>;
102 opp-microvolt = <770000>;
103 };
104
105 opp-1200000000 {
106 opp-hz = /bits/ 64 <1200000000>;
107 opp-microvolt = <780000>;
108 };
109
110 opp-1404000000 {
111 opp-hz = /bits/ 64 <1404000000>;
112 opp-microvolt = <790000>;
113 };
114
115 opp-1500000000 {
116 opp-hz = /bits/ 64 <1500000000>;
117 opp-microvolt = <800000>;
118 };
119
120 opp-1608000000 {
121 opp-hz = /bits/ 64 <1608000000>;
122 opp-microvolt = <810000>;
123 };
124
125 opp-1704000000 {
126 opp-hz = /bits/ 64 <1704000000>;
127 opp-microvolt = <850000>;
128 };
129
130 opp-1800000000 {
131 opp-hz = /bits/ 64 <1800000000>;
132 opp-microvolt = <900000>;
133 };
134
135 opp-1908000000 {
136 opp-hz = /bits/ 64 <1908000000>;
137 opp-microvolt = <950000>;
138 };
139 };
140};
141
142&apb {
143 audio: bus@60000 {
144 compatible = "simple-bus";
145 reg = <0x0 0x60000 0x0 0x1000>;
146 #address-cells = <2>;
147 #size-cells = <2>;
148 ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
149
150 clkc_audio: clock-controller@0 {
151 status = "disabled";
152 compatible = "amlogic,sm1-audio-clkc";
153 reg = <0x0 0x0 0x0 0xb4>;
154 #clock-cells = <1>;
155 #reset-cells = <1>;
156
157 clocks = <&clkc CLKID_AUDIO>,
158 <&clkc CLKID_MPLL0>,
159 <&clkc CLKID_MPLL1>,
160 <&clkc CLKID_MPLL2>,
161 <&clkc CLKID_MPLL3>,
162 <&clkc CLKID_HIFI_PLL>,
163 <&clkc CLKID_FCLK_DIV3>,
164 <&clkc CLKID_FCLK_DIV4>,
165 <&clkc CLKID_FCLK_DIV5>;
166 clock-names = "pclk",
167 "mst_in0",
168 "mst_in1",
169 "mst_in2",
170 "mst_in3",
171 "mst_in4",
172 "mst_in5",
173 "mst_in6",
174 "mst_in7";
175
176 resets = <&reset RESET_AUDIO>;
177 };
178
179 toddr_a: audio-controller@100 {
180 compatible = "amlogic,sm1-toddr",
181 "amlogic,axg-toddr";
182 reg = <0x0 0x100 0x0 0x2c>;
183 #sound-dai-cells = <0>;
184 sound-name-prefix = "TODDR_A";
185 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
186 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
187 resets = <&arb AXG_ARB_TODDR_A>,
188 <&clkc_audio AUD_RESET_TODDR_A>;
189 reset-names = "arb", "rst";
190 amlogic,fifo-depth = <8192>;
191 status = "disabled";
192 };
193
194 toddr_b: audio-controller@140 {
195 compatible = "amlogic,sm1-toddr",
196 "amlogic,axg-toddr";
197 reg = <0x0 0x140 0x0 0x2c>;
198 #sound-dai-cells = <0>;
199 sound-name-prefix = "TODDR_B";
200 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
201 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
202 resets = <&arb AXG_ARB_TODDR_B>,
203 <&clkc_audio AUD_RESET_TODDR_B>;
204 reset-names = "arb", "rst";
205 amlogic,fifo-depth = <256>;
206 status = "disabled";
207 };
208
209 toddr_c: audio-controller@180 {
210 compatible = "amlogic,sm1-toddr",
211 "amlogic,axg-toddr";
212 reg = <0x0 0x180 0x0 0x2c>;
213 #sound-dai-cells = <0>;
214 sound-name-prefix = "TODDR_C";
215 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
216 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
217 resets = <&arb AXG_ARB_TODDR_C>,
218 <&clkc_audio AUD_RESET_TODDR_C>;
219 reset-names = "arb", "rst";
220 amlogic,fifo-depth = <256>;
221 status = "disabled";
222 };
223
224 frddr_a: audio-controller@1c0 {
225 compatible = "amlogic,sm1-frddr",
226 "amlogic,axg-frddr";
227 reg = <0x0 0x1c0 0x0 0x2c>;
228 #sound-dai-cells = <0>;
229 sound-name-prefix = "FRDDR_A";
230 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
231 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
232 resets = <&arb AXG_ARB_FRDDR_A>,
233 <&clkc_audio AUD_RESET_FRDDR_A>;
234 reset-names = "arb", "rst";
235 amlogic,fifo-depth = <512>;
236 status = "disabled";
237 };
238
239 frddr_b: audio-controller@200 {
240 compatible = "amlogic,sm1-frddr",
241 "amlogic,axg-frddr";
242 reg = <0x0 0x200 0x0 0x2c>;
243 #sound-dai-cells = <0>;
244 sound-name-prefix = "FRDDR_B";
245 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
246 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
247 resets = <&arb AXG_ARB_FRDDR_B>,
248 <&clkc_audio AUD_RESET_FRDDR_B>;
249 reset-names = "arb", "rst";
250 amlogic,fifo-depth = <256>;
251 status = "disabled";
252 };
253
254 frddr_c: audio-controller@240 {
255 compatible = "amlogic,sm1-frddr",
256 "amlogic,axg-frddr";
257 reg = <0x0 0x240 0x0 0x2c>;
258 #sound-dai-cells = <0>;
259 sound-name-prefix = "FRDDR_C";
260 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
261 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
262 resets = <&arb AXG_ARB_FRDDR_C>,
263 <&clkc_audio AUD_RESET_FRDDR_C>;
264 reset-names = "arb", "rst";
265 amlogic,fifo-depth = <256>;
266 status = "disabled";
267 };
268
269 arb: reset-controller@280 {
270 status = "disabled";
271 compatible = "amlogic,meson-sm1-audio-arb";
272 reg = <0x0 0x280 0x0 0x4>;
273 #reset-cells = <1>;
274 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
275 };
276
277 tdmin_a: audio-controller@300 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600278 compatible = "amlogic,sm1-tdmin";
Tom Rini53633a82024-02-29 12:33:36 -0500279 reg = <0x0 0x300 0x0 0x40>;
280 sound-name-prefix = "TDMIN_A";
281 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
282 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
283 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
284 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
285 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
286 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
287 clock-names = "pclk", "sclk", "sclk_sel",
288 "lrclk", "lrclk_sel";
289 status = "disabled";
290 };
291
292 tdmin_b: audio-controller@340 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600293 compatible = "amlogic,sm1-tdmin";
Tom Rini53633a82024-02-29 12:33:36 -0500294 reg = <0x0 0x340 0x0 0x40>;
295 sound-name-prefix = "TDMIN_B";
296 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
297 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
298 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
299 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
300 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
301 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
302 clock-names = "pclk", "sclk", "sclk_sel",
303 "lrclk", "lrclk_sel";
304 status = "disabled";
305 };
306
307 tdmin_c: audio-controller@380 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600308 compatible = "amlogic,sm1-tdmin";
Tom Rini53633a82024-02-29 12:33:36 -0500309 reg = <0x0 0x380 0x0 0x40>;
310 sound-name-prefix = "TDMIN_C";
311 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
312 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
313 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
314 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
315 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
316 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
317 clock-names = "pclk", "sclk", "sclk_sel",
318 "lrclk", "lrclk_sel";
319 status = "disabled";
320 };
321
322 tdmin_lb: audio-controller@3c0 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600323 compatible = "amlogic,sm1-tdmin";
Tom Rini53633a82024-02-29 12:33:36 -0500324 reg = <0x0 0x3c0 0x0 0x40>;
325 sound-name-prefix = "TDMIN_LB";
326 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
327 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
328 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
329 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
330 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
331 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
332 clock-names = "pclk", "sclk", "sclk_sel",
333 "lrclk", "lrclk_sel";
334 status = "disabled";
335 };
336
337 spdifin: audio-controller@400 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600338 compatible = "amlogic,sm1-spdifin",
Tom Rini53633a82024-02-29 12:33:36 -0500339 "amlogic,axg-spdifin";
340 reg = <0x0 0x400 0x0 0x30>;
341 #sound-dai-cells = <0>;
342 sound-name-prefix = "SPDIFIN";
343 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
344 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
345 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
346 clock-names = "pclk", "refclk";
347 resets = <&clkc_audio AUD_RESET_SPDIFIN>;
348 status = "disabled";
349 };
350
351 spdifout_a: audio-controller@480 {
Tom Rini6b642ac2024-10-01 12:20:28 -0600352 compatible = "amlogic,sm1-spdifout",
Tom Rini53633a82024-02-29 12:33:36 -0500353 "amlogic,axg-spdifout";
354 reg = <0x0 0x480 0x0 0x50>;
355 #sound-dai-cells = <0>;
356 sound-name-prefix = "SPDIFOUT_A";
357 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
358 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
359 clock-names = "pclk", "mclk";
360 resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
361 status = "disabled";
362 };
363
364 tdmout_a: audio-controller@500 {
365 compatible = "amlogic,sm1-tdmout";
366 reg = <0x0 0x500 0x0 0x40>;
367 sound-name-prefix = "TDMOUT_A";
368 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
369 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
370 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
371 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
372 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
373 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
374 clock-names = "pclk", "sclk", "sclk_sel",
375 "lrclk", "lrclk_sel";
376 status = "disabled";
377 };
378
379 tdmout_b: audio-controller@540 {
380 compatible = "amlogic,sm1-tdmout";
381 reg = <0x0 0x540 0x0 0x40>;
382 sound-name-prefix = "TDMOUT_B";
383 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
384 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
385 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
386 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
387 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
388 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
389 clock-names = "pclk", "sclk", "sclk_sel",
390 "lrclk", "lrclk_sel";
391 status = "disabled";
392 };
393
394 tdmout_c: audio-controller@580 {
395 compatible = "amlogic,sm1-tdmout";
396 reg = <0x0 0x580 0x0 0x40>;
397 sound-name-prefix = "TDMOUT_C";
398 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
399 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
400 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
401 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
402 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
403 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
404 clock-names = "pclk", "sclk", "sclk_sel",
405 "lrclk", "lrclk_sel";
406 status = "disabled";
407 };
408
409 toacodec: audio-controller@740 {
410 compatible = "amlogic,sm1-toacodec",
411 "amlogic,g12a-toacodec";
412 reg = <0x0 0x740 0x0 0x4>;
413 #sound-dai-cells = <1>;
414 sound-name-prefix = "TOACODEC";
415 resets = <&clkc_audio AUD_RESET_TOACODEC>;
416 status = "disabled";
417 };
418
419 tohdmitx: audio-controller@744 {
420 compatible = "amlogic,sm1-tohdmitx",
421 "amlogic,g12a-tohdmitx";
422 reg = <0x0 0x744 0x0 0x4>;
423 #sound-dai-cells = <1>;
424 sound-name-prefix = "TOHDMITX";
425 resets = <&clkc_audio AUD_RESET_TOHDMITX>;
426 status = "disabled";
427 };
428
429 toddr_d: audio-controller@840 {
430 compatible = "amlogic,sm1-toddr",
431 "amlogic,axg-toddr";
432 reg = <0x0 0x840 0x0 0x2c>;
433 #sound-dai-cells = <0>;
434 sound-name-prefix = "TODDR_D";
435 interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
436 clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
437 resets = <&arb AXG_ARB_TODDR_D>,
438 <&clkc_audio AUD_RESET_TODDR_D>;
439 reset-names = "arb", "rst";
440 amlogic,fifo-depth = <256>;
441 status = "disabled";
442 };
443
444 frddr_d: audio-controller@880 {
445 compatible = "amlogic,sm1-frddr",
446 "amlogic,axg-frddr";
447 reg = <0x0 0x880 0x0 0x2c>;
448 #sound-dai-cells = <0>;
449 sound-name-prefix = "FRDDR_D";
450 interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
451 clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
452 resets = <&arb AXG_ARB_FRDDR_D>,
453 <&clkc_audio AUD_RESET_FRDDR_D>;
454 reset-names = "arb", "rst";
455 amlogic,fifo-depth = <256>;
456 status = "disabled";
457 };
458 };
459
460 pdm: audio-controller@61000 {
461 compatible = "amlogic,sm1-pdm",
462 "amlogic,axg-pdm";
463 reg = <0x0 0x61000 0x0 0x34>;
464 #sound-dai-cells = <0>;
465 sound-name-prefix = "PDM";
466 clocks = <&clkc_audio AUD_CLKID_PDM>,
467 <&clkc_audio AUD_CLKID_PDM_DCLK>,
468 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
469 clock-names = "pclk", "dclk", "sysclk";
470 resets = <&clkc_audio AUD_RESET_PDM>;
471 status = "disabled";
472 };
473};
474
475&cecb_AO {
476 compatible = "amlogic,meson-sm1-ao-cec";
477};
478
479&clk_msr {
480 compatible = "amlogic,meson-sm1-clk-measure";
481};
482
483
484&clkc {
485 compatible = "amlogic,sm1-clkc";
486};
487
488&cpu_thermal {
489 cooling-maps {
490 map0 {
491 trip = <&cpu_passive>;
492 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
493 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
494 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
495 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
496 };
497
498 map1 {
499 trip = <&cpu_hot>;
500 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
501 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
502 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
503 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
504 };
505 };
506};
507
508&ethmac {
509 power-domains = <&pwrc PWRC_SM1_ETH_ID>;
510};
511
512&gpio_intc {
513 compatible = "amlogic,meson-sm1-gpio-intc",
514 "amlogic,meson-gpio-intc";
515};
516
Tom Rini6b642ac2024-10-01 12:20:28 -0600517&hdmi_tx {
518 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
519};
520
Tom Rini53633a82024-02-29 12:33:36 -0500521&pcie {
522 power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
523};
524
525&pmu {
526 compatible = "amlogic,sm1-ddr-pmu";
527};
528
529&pwrc {
530 compatible = "amlogic,meson-sm1-pwrc";
531};
532
533&simplefb_cvbs {
534 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
535};
536
537&simplefb_hdmi {
538 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
539};
540
541&vdec {
542 compatible = "amlogic,sm1-vdec";
543};
544
545&vpu {
546 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
547};
548
549&usb {
550 power-domains = <&pwrc PWRC_SM1_USB_ID>;
551};
552
553&npu {
554 power-domains = <&pwrc PWRC_SM1_NNA_ID>;
555};