dts/upstream/src/arm/st/stm32mp15xx-dhcom-drc02.dtsi

// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 */

#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>

&adc {
	status = "disabled";
};

&dac {
	status = "disabled";
};

&gpiob {
	/*
	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
	 * GPIO line, however the STM32 UART driver assumes RX happens
	 * during TX anyway and that it only controls drive enable DE
	 * line. Hence, the RX is always enabled here.
	 */
	rs485-rx-en-hog {
		gpio-hog;
		gpios = <8 0>;
		output-low;
		line-name = "rs485-rx-en";
	};
};

&gpiod {
	gpio-line-names = "", "", "", "",
			  "", "", "DHCOM-B", "",
			  "", "", "", "DRC02-Out1",
			  "DRC02-Out2", "", "", "";
};

&gpioi {
	gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I",
			  "DHCOM-R", "DHCOM-M", "", "",
			  "DRC02-In2", "", "", "",
			  "", "", "", "";

	/*
	 * NOTE: The USB Hub on the DRC02 needs a reset signal to be
	 * pulled high in order to be detected by the USB Controller.
	 * This signal should be handled by USB power sequencing in
	 * order to reset the Hub when USB bus is powered down, but
	 * so far there is no such functionality.
	 */
	usb-hub-hog {
		gpio-hog;
		gpios = <2 0>;
		output-high;
		line-name = "usb-hub-reset";
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c04";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&i2c4 {
	touchscreen@49 {
		status = "disabled";
	};
};

&i2c5 {	/* TP7/TP8 */
	pinctrl-names = "default";
	pinctrl-0 = <&i2c5_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;
};

&sdmmc3 {
	/*
	 * On DRC02, the SoM does not have SDIO WiFi. The pins
	 * are used for on-board microSD slot instead.
	 */
	/delete-property/broken-cd;
	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
	disable-wp;
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins_a>;
	cs-gpios = <&gpioz 3 0>;
	/* Use PIO for the display */
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "disabled";	/* Enable once there is display driver */
	/*
	 * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
	 * also connected to the display board connector.
	 */
};

&usart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&usart3_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

/*
 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
 *       however the STM32MP1 pinmux cannot map them to UART4 .
 */

&uart8 {	/* RS485 */
	linux,rs485-enabled-at-boot-time;
	pinctrl-names = "default";
	pinctrl-0 = <&uart8_pins_a>;
	rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

&usbh_ehci {
	status = "okay";
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&vdd_usb>;
};

&usbphyc_port1 {
	phy-supply = <&vdd_usb>;
};