Tom Rini | 9c8af15 | 2024-12-24 12:03:04 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) Protonic Holland |
| 4 | * Author: David Jander <david@protonic.nl> |
| 5 | */ |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "stm32mp151.dtsi" |
| 9 | #include "stm32mp15xc.dtsi" |
| 10 | #include "stm32mp15-pinctrl.dtsi" |
| 11 | #include "stm32mp15xxaa-pinctrl.dtsi" |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/input/input.h> |
| 14 | #include <dt-bindings/leds/common.h> |
| 15 | |
| 16 | / { |
| 17 | model = "Protonic MECT1S"; |
| 18 | compatible = "prt,mect1s", "st,stm32mp151"; |
| 19 | |
| 20 | chosen { |
| 21 | stdout-path = "serial0:1500000n8"; |
| 22 | }; |
| 23 | |
| 24 | aliases { |
| 25 | serial0 = &uart4; |
| 26 | ethernet0 = ðernet0; |
| 27 | ethernet1 = ðernet1; |
| 28 | ethernet2 = ðernet2; |
| 29 | ethernet3 = ðernet3; |
| 30 | ethernet4 = ðernet4; |
| 31 | }; |
| 32 | |
| 33 | v3v3: regulator-v3v3 { |
| 34 | compatible = "regulator-fixed"; |
| 35 | regulator-name = "v3v3"; |
| 36 | regulator-min-microvolt = <3300000>; |
| 37 | regulator-max-microvolt = <3300000>; |
| 38 | }; |
| 39 | |
| 40 | v5v: regulator-v5v { |
| 41 | compatible = "regulator-fixed"; |
| 42 | regulator-name = "v5v"; |
| 43 | regulator-min-microvolt = <5000000>; |
| 44 | regulator-max-microvolt = <5000000>; |
| 45 | regulator-always-on; |
| 46 | }; |
| 47 | |
| 48 | led { |
| 49 | compatible = "gpio-leds"; |
| 50 | |
| 51 | led-0 { |
| 52 | color = <LED_COLOR_ID_RED>; |
| 53 | function = LED_FUNCTION_DEBUG; |
| 54 | gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; |
| 55 | }; |
| 56 | |
| 57 | led-1 { |
| 58 | color = <LED_COLOR_ID_GREEN>; |
| 59 | function = LED_FUNCTION_DEBUG; |
| 60 | gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; |
| 61 | linux,default-trigger = "heartbeat"; |
| 62 | }; |
| 63 | }; |
| 64 | }; |
| 65 | |
| 66 | &clk_hse { |
| 67 | clock-frequency = <24000000>; |
| 68 | }; |
| 69 | |
| 70 | &clk_lse { |
| 71 | status = "disabled"; |
| 72 | }; |
| 73 | |
| 74 | ðernet0 { |
| 75 | status = "okay"; |
| 76 | pinctrl-0 = <ðernet0_rmii_pins_a>; |
| 77 | pinctrl-1 = <ðernet0_rmii_sleep_pins_a>; |
| 78 | pinctrl-names = "default", "sleep"; |
| 79 | phy-mode = "rmii"; |
| 80 | max-speed = <100>; |
| 81 | st,eth-clk-sel; |
| 82 | |
| 83 | fixed-link { |
| 84 | speed = <100>; |
| 85 | full-duplex; |
| 86 | }; |
| 87 | |
| 88 | mdio0: mdio { |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; |
| 91 | compatible = "snps,dwmac-mdio"; |
| 92 | }; |
| 93 | }; |
| 94 | |
| 95 | &{ethernet0_rmii_pins_a/pins1} { |
| 96 | pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */ |
| 97 | <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */ |
| 98 | <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ |
| 99 | <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ |
| 100 | <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ |
| 101 | }; |
| 102 | |
| 103 | &{ethernet0_rmii_pins_a/pins2} { |
| 104 | pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ |
| 105 | <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ |
| 106 | <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */ |
| 107 | <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ |
| 108 | }; |
| 109 | |
| 110 | &{ethernet0_rmii_sleep_pins_a/pins1} { |
| 111 | pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */ |
| 112 | <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */ |
| 113 | <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ |
| 114 | <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ |
| 115 | <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ |
| 116 | <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ |
| 117 | <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ |
| 118 | }; |
| 119 | |
| 120 | &mdio0 { |
| 121 | /* All this DP83TG720R PHYs can't be probed before switch@0 is |
| 122 | * probed so we need to use compatible with PHYid |
| 123 | */ |
| 124 | /* TI DP83TG720R */ |
| 125 | t1_phy0: ethernet-phy@8 { |
| 126 | compatible = "ethernet-phy-id2000.a284"; |
| 127 | reg = <8>; |
| 128 | interrupts-extended = <&gpioi 5 IRQ_TYPE_LEVEL_LOW>; |
| 129 | reset-gpios = <&gpioh 13 GPIO_ACTIVE_LOW>; |
| 130 | reset-assert-us = <10>; |
| 131 | reset-deassert-us = <35>; |
| 132 | }; |
| 133 | |
| 134 | /* TI DP83TG720R */ |
| 135 | t1_phy1: ethernet-phy@c { |
| 136 | compatible = "ethernet-phy-id2000.a284"; |
| 137 | reg = <12>; |
| 138 | interrupts-extended = <&gpioj 0 IRQ_TYPE_LEVEL_LOW>; |
| 139 | reset-gpios = <&gpioh 14 GPIO_ACTIVE_LOW>; |
| 140 | reset-assert-us = <10>; |
| 141 | reset-deassert-us = <35>; |
| 142 | }; |
| 143 | |
| 144 | /* TI DP83TG720R */ |
| 145 | t1_phy2: ethernet-phy@4 { |
| 146 | compatible = "ethernet-phy-id2000.a284"; |
| 147 | reg = <4>; |
| 148 | interrupts-extended = <&gpioi 7 IRQ_TYPE_LEVEL_LOW>; |
| 149 | reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>; |
| 150 | reset-assert-us = <10>; |
| 151 | reset-deassert-us = <35>; |
| 152 | }; |
| 153 | |
| 154 | /* TI DP83TG720R */ |
| 155 | t1_phy3: ethernet-phy@d { |
| 156 | compatible = "ethernet-phy-id2000.a284"; |
| 157 | reg = <13>; |
| 158 | interrupts-extended = <&gpioi 15 IRQ_TYPE_LEVEL_LOW>; |
| 159 | reset-gpios = <&gpioi 13 GPIO_ACTIVE_LOW>; |
| 160 | reset-assert-us = <10000>; |
| 161 | reset-deassert-us = <1000>; |
| 162 | }; |
| 163 | }; |
| 164 | |
| 165 | &qspi { |
| 166 | pinctrl-names = "default", "sleep"; |
| 167 | pinctrl-0 = <&qspi_clk_pins_a |
| 168 | &qspi_bk1_pins_a |
| 169 | &qspi_cs1_pins_a>; |
| 170 | pinctrl-1 = <&qspi_clk_sleep_pins_a |
| 171 | &qspi_bk1_sleep_pins_a |
| 172 | &qspi_cs1_sleep_pins_a>; |
| 173 | status = "okay"; |
| 174 | |
| 175 | flash@0 { |
| 176 | compatible = "jedec,spi-nor"; |
| 177 | reg = <0>; |
| 178 | spi-rx-bus-width = <4>; |
| 179 | spi-max-frequency = <1000000>; |
| 180 | #address-cells = <1>; |
| 181 | #size-cells = <1>; |
| 182 | }; |
| 183 | }; |
| 184 | |
| 185 | &{qspi_bk1_pins_a/pins} { |
| 186 | /delete-property/ bias-disable; |
| 187 | bias-pull-up; |
| 188 | drive-push-pull; |
| 189 | slew-rate = <1>; |
| 190 | }; |
| 191 | |
| 192 | &spi2 { |
| 193 | pinctrl-0 = <&spi2_pins_b>; |
| 194 | pinctrl-names = "default"; |
| 195 | cs-gpios = <&gpioj 3 GPIO_ACTIVE_LOW>; |
| 196 | /delete-property/dmas; |
| 197 | /delete-property/dma-names; |
| 198 | status = "okay"; |
| 199 | |
| 200 | switch@0 { |
| 201 | compatible = "nxp,sja1105q"; |
| 202 | reg = <0>; |
| 203 | spi-max-frequency = <1000000>; |
| 204 | spi-rx-delay-us = <1>; |
| 205 | spi-tx-delay-us = <1>; |
| 206 | spi-cpha; |
| 207 | |
| 208 | ports { |
| 209 | #address-cells = <1>; |
| 210 | #size-cells = <0>; |
| 211 | |
| 212 | ethernet1: port@0 { |
| 213 | reg = <0>; |
| 214 | label = "t10"; |
| 215 | phy-mode = "rgmii-id"; |
| 216 | phy-handle = <&t1_phy0>; |
| 217 | }; |
| 218 | |
| 219 | ethernet2: port@1 { |
| 220 | reg = <1>; |
| 221 | label = "t11"; |
| 222 | phy-mode = "rgmii-id"; |
| 223 | phy-handle = <&t1_phy1>; |
| 224 | }; |
| 225 | |
| 226 | ethernet3: port@2 { |
| 227 | reg = <2>; |
| 228 | label = "t12"; |
| 229 | phy-mode = "rgmii-id"; |
| 230 | phy-handle = <&t1_phy2>; |
| 231 | }; |
| 232 | |
| 233 | ethernet4: port@3 { |
| 234 | reg = <3>; |
| 235 | label = "t13"; |
| 236 | phy-mode = "rgmii-id"; |
| 237 | phy-handle = <&t1_phy3>; |
| 238 | }; |
| 239 | |
| 240 | port@4 { |
| 241 | reg = <4>; |
| 242 | label = "cpu"; |
| 243 | ethernet = <ðernet0>; |
| 244 | phy-mode = "rmii"; |
| 245 | |
| 246 | /* RGMII mode is not working properly, using RMII instead. */ |
| 247 | fixed-link { |
| 248 | speed = <100>; |
| 249 | full-duplex; |
| 250 | }; |
| 251 | }; |
| 252 | }; |
| 253 | }; |
| 254 | }; |
| 255 | |
| 256 | &uart4 { |
| 257 | pinctrl-names = "default", "sleep", "idle"; |
| 258 | pinctrl-0 = <&uart4_pins_a>; |
| 259 | pinctrl-1 = <&uart4_sleep_pins_a>; |
| 260 | pinctrl-2 = <&uart4_idle_pins_a>; |
| 261 | /delete-property/dmas; |
| 262 | /delete-property/dma-names; |
| 263 | status = "okay"; |
| 264 | }; |
| 265 | |
| 266 | &usbh_ehci { |
| 267 | status = "okay"; |
| 268 | }; |
| 269 | |
| 270 | &usbotg_hs { |
| 271 | dr_mode = "host"; |
| 272 | pinctrl-0 = <&usbotg_hs_pins_a>; |
| 273 | pinctrl-names = "default"; |
| 274 | phys = <&usbphyc_port1 0>; |
| 275 | phy-names = "usb2-phy"; |
| 276 | vbus-supply = <&v5v>; |
| 277 | status = "okay"; |
| 278 | }; |
| 279 | |
| 280 | &usbphyc { |
| 281 | status = "okay"; |
| 282 | }; |
| 283 | |
| 284 | &usbphyc_port0 { |
| 285 | phy-supply = <&v3v3>; |
| 286 | }; |
| 287 | |
| 288 | &usbphyc_port1 { |
| 289 | phy-supply = <&v3v3>; |
| 290 | }; |