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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / dts / upstream / src / arm / st / stm32mp15-pinctrl.dtsi
blob: 95fafc51a1c8e89d3bbcac9cbe16ca2e7f9bc4ac [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9 /omit-if-no-ref/
10 adc1_ain_pins_a: adc1-ain-0 {
11 pins {
12 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
13 <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
14 <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
15 <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
16 <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
17 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */
18 };
19 };
20
21 /omit-if-no-ref/
22 adc1_in6_pins_a: adc1-in6-0 {
23 pins {
24 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
25 };
26 };
27
28 /omit-if-no-ref/
29 adc12_ain_pins_a: adc12-ain-0 {
30 pins {
31 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
32 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
33 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
34 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
35 };
36 };
37
38 /omit-if-no-ref/
39 adc12_ain_pins_b: adc12-ain-1 {
40 pins {
41 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
42 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
43 };
44 };
45
46 /omit-if-no-ref/
47 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
48 pins {
49 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
50 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
51 };
52 };
53
54 /omit-if-no-ref/
55 cec_pins_a: cec-0 {
56 pins {
57 pinmux = <STM32_PINMUX('A', 15, AF4)>;
58 bias-disable;
59 drive-open-drain;
60 slew-rate = <0>;
61 };
62 };
63
64 /omit-if-no-ref/
65 cec_sleep_pins_a: cec-sleep-0 {
66 pins {
67 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
68 };
69 };
70
71 /omit-if-no-ref/
72 cec_pins_b: cec-1 {
73 pins {
74 pinmux = <STM32_PINMUX('B', 6, AF5)>;
75 bias-disable;
76 drive-open-drain;
77 slew-rate = <0>;
78 };
79 };
80
81 /omit-if-no-ref/
82 cec_sleep_pins_b: cec-sleep-1 {
83 pins {
84 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
85 };
86 };
87
88 /omit-if-no-ref/
89 dac_ch1_pins_a: dac-ch1-0 {
90 pins {
91 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
92 };
93 };
94
95 /omit-if-no-ref/
96 dac_ch2_pins_a: dac-ch2-0 {
97 pins {
98 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
99 };
100 };
101
102 /omit-if-no-ref/
103 dcmi_pins_a: dcmi-0 {
104 pins {
105 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
106 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
107 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
108 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
109 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
110 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
111 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
112 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
113 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
114 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
115 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
116 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
117 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
118 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
119 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
120 bias-disable;
121 };
122 };
123
124 /omit-if-no-ref/
125 dcmi_sleep_pins_a: dcmi-sleep-0 {
126 pins {
127 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
128 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
129 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
130 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
131 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
132 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
133 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
134 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
135 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
136 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
137 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
138 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
139 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
140 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
141 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
142 };
143 };
144
145 /omit-if-no-ref/
146 dcmi_pins_b: dcmi-1 {
147 pins {
148 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
149 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
150 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
151 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
152 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
153 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
154 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
155 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
156 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
157 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
158 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
159 bias-disable;
160 };
161 };
162
163 /omit-if-no-ref/
164 dcmi_sleep_pins_b: dcmi-sleep-1 {
165 pins {
166 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
167 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
168 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
169 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
170 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
171 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
172 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
173 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
174 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
175 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
176 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
177 };
178 };
179
180 /omit-if-no-ref/
181 dcmi_pins_c: dcmi-2 {
182 pins {
183 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
184 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
185 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
186 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
187 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
188 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
189 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
190 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
191 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
192 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */
193 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
194 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
195 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */
196 bias-pull-up;
197 };
198 };
199
200 /omit-if-no-ref/
201 dcmi_sleep_pins_c: dcmi-sleep-2 {
202 pins {
203 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
204 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
205 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
206 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
207 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
208 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
209 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
210 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
211 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
212 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */
213 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
214 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
215 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */
216 };
217 };
218
219 /omit-if-no-ref/
220 ethernet0_rgmii_pins_a: rgmii-0 {
221 pins1 {
222 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
223 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
224 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
225 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
226 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
227 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
228 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
229 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <2>;
233 };
234 pins2 {
235 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
236 bias-disable;
237 drive-push-pull;
238 slew-rate = <0>;
239 };
240 pins3 {
241 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
242 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
243 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
244 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
245 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
246 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
247 bias-disable;
248 };
249 };
250
251 /omit-if-no-ref/
252 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
253 pins1 {
254 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
255 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
256 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
257 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
258 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
259 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
260 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
261 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
262 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
263 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
264 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
265 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
266 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
267 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
268 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
269 };
270 };
271
272 /omit-if-no-ref/
273 ethernet0_rgmii_pins_b: rgmii-1 {
274 pins1 {
275 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
276 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
277 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
278 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
279 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
280 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
281 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
282 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
283 bias-disable;
284 drive-push-pull;
285 slew-rate = <2>;
286 };
287 pins2 {
288 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
289 bias-disable;
290 drive-push-pull;
291 slew-rate = <0>;
292 };
293 pins3 {
294 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
295 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
296 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
297 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
298 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
299 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
300 bias-disable;
301 };
302 };
303
304 /omit-if-no-ref/
305 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
306 pins1 {
307 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
308 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
309 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
310 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
311 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
312 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
313 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
314 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
315 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
316 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
317 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
318 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
319 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
320 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
321 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
322 };
323 };
324
325 /omit-if-no-ref/
326 ethernet0_rgmii_pins_c: rgmii-2 {
327 pins1 {
328 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
329 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
330 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
331 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
332 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
333 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
334 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
335 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
336 bias-disable;
337 drive-push-pull;
338 slew-rate = <2>;
339 };
340 pins2 {
341 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
342 bias-disable;
343 drive-push-pull;
344 slew-rate = <0>;
345 };
346 pins3 {
347 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
348 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
349 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
350 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
351 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
352 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
353 bias-disable;
354 };
355 };
356
357 /omit-if-no-ref/
358 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
359 pins1 {
360 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
361 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
362 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
363 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
364 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
365 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
366 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
367 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
368 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
369 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
370 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
371 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
372 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
373 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
374 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
375 };
376 };
377
378 /omit-if-no-ref/
379 ethernet0_rgmii_pins_d: rgmii-3 {
380 pins1 {
381 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
382 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
383 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
384 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
385 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
386 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
387 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
388 bias-disable;
389 drive-push-pull;
390 slew-rate = <2>;
391 };
392 pins2 {
393 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
394 bias-disable;
395 drive-push-pull;
396 slew-rate = <0>;
397 };
398 pins3 {
399 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
400 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
401 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
402 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
403 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
404 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
405 bias-disable;
406 };
407 };
408
409 /omit-if-no-ref/
410 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
411 pins1 {
412 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
413 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
414 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
415 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
416 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
417 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
418 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
419 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
420 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
421 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
422 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
423 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
424 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
425 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
426 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
427 };
428 };
429
430 /omit-if-no-ref/
431 ethernet0_rgmii_pins_e: rgmii-4 {
432 pins1 {
433 pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
434 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
435 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
436 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
437 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
438 <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */
439 bias-disable;
440 drive-push-pull;
441 slew-rate = <2>;
442 };
443 pins2 {
444 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
445 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
446 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
447 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
448 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
449 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
450 bias-disable;
451 };
452 };
453
454 /omit-if-no-ref/
455 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
456 pins1 {
457 pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
458 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
459 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
460 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
461 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
462 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
463 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
464 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
465 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
466 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
467 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
468 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
469 };
470 };
471
472 /omit-if-no-ref/
473 ethernet0_rmii_pins_a: rmii-0 {
474 pins1 {
475 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
476 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
477 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
478 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
479 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
480 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
481 bias-disable;
482 drive-push-pull;
483 slew-rate = <2>;
484 };
485 pins2 {
486 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
487 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
488 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
489 bias-disable;
490 };
491 };
492
493 /omit-if-no-ref/
494 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
495 pins1 {
496 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
497 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
498 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
499 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
500 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
501 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
502 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
503 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
504 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
505 };
506 };
507
508 /omit-if-no-ref/
509 ethernet0_rmii_pins_b: rmii-1 {
510 pins1 {
511 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
512 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
513 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
514 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
515 bias-disable;
516 drive-push-pull;
517 slew-rate = <1>;
518 };
519 pins2 {
520 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
521 bias-disable;
522 drive-push-pull;
523 slew-rate = <0>;
524 };
525 pins3 {
526 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
527 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
528 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
529 bias-disable;
530 };
531 pins4 {
532 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
533 };
534 };
535
536 /omit-if-no-ref/
537 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
538 pins1 {
539 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
540 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
541 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
542 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
543 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
544 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
545 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
546 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
547 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
548 };
549 };
550
551 /omit-if-no-ref/
552 ethernet0_rmii_pins_c: rmii-2 {
553 pins1 {
554 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
555 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
556 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
557 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
558 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
559 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
560 bias-disable;
561 drive-push-pull;
562 slew-rate = <2>;
563 };
564 pins2 {
565 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
566 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
567 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
568 bias-disable;
569 };
570 };
571
572 /omit-if-no-ref/
573 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
574 pins1 {
575 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
576 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
577 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
578 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
579 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
580 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
581 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
582 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
583 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
584 };
585 };
586
587 /omit-if-no-ref/
588 fmc_pins_a: fmc-0 {
589 pins1 {
590 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
591 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
592 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
593 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
594 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
595 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
596 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
597 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
598 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
599 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
600 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
601 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
602 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
603 bias-disable;
604 drive-push-pull;
605 slew-rate = <1>;
606 };
607 pins2 {
608 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
609 bias-pull-up;
610 };
611 };
612
613 /omit-if-no-ref/
614 fmc_sleep_pins_a: fmc-sleep-0 {
615 pins {
616 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
617 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
618 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
619 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
620 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
621 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
622 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
623 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
624 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
625 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
626 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
627 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
628 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
629 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
630 };
631 };
632
633 /omit-if-no-ref/
634 fmc_pins_b: fmc-1 {
635 pins {
636 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
637 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
638 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
639 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
640 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
641 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
642 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
643 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
644 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
645 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
646 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
647 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
648 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
649 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
650 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
651 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
652 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
653 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
654 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
655 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
656 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
657 bias-disable;
658 drive-push-pull;
659 slew-rate = <3>;
660 };
661 };
662
663 /omit-if-no-ref/
664 fmc_sleep_pins_b: fmc-sleep-1 {
665 pins {
666 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
667 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
668 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
669 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
670 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
671 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
672 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
673 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
674 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
675 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
676 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
677 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
678 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
679 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
680 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
681 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
682 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
683 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
684 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
685 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
686 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
687 };
688 };
689
690 /omit-if-no-ref/
691 i2c1_pins_a: i2c1-0 {
692 pins {
693 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
694 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
695 bias-disable;
696 drive-open-drain;
697 slew-rate = <0>;
698 };
699 };
700
701 /omit-if-no-ref/
702 i2c1_sleep_pins_a: i2c1-sleep-0 {
703 pins {
704 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
705 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
706 };
707 };
708
709 /omit-if-no-ref/
710 i2c1_pins_b: i2c1-1 {
711 pins {
712 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
713 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
714 bias-disable;
715 drive-open-drain;
716 slew-rate = <0>;
717 };
718 };
719
720 /omit-if-no-ref/
721 i2c1_sleep_pins_b: i2c1-sleep-1 {
722 pins {
723 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
724 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
725 };
726 };
727
728 /omit-if-no-ref/
729 i2c2_pins_a: i2c2-0 {
730 pins {
731 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
732 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
733 bias-disable;
734 drive-open-drain;
735 slew-rate = <0>;
736 };
737 };
738
739 /omit-if-no-ref/
740 i2c2_sleep_pins_a: i2c2-sleep-0 {
741 pins {
742 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
743 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
744 };
745 };
746
747 /omit-if-no-ref/
748 i2c2_pins_b1: i2c2-1 {
749 pins {
750 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
751 bias-disable;
752 drive-open-drain;
753 slew-rate = <0>;
754 };
755 };
756
757 /omit-if-no-ref/
758 i2c2_sleep_pins_b1: i2c2-sleep-1 {
759 pins {
760 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
761 };
762 };
763
764 /omit-if-no-ref/
765 i2c2_pins_c: i2c2-2 {
766 pins {
767 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
768 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
769 bias-disable;
770 drive-open-drain;
771 slew-rate = <0>;
772 };
773 };
774
775 /omit-if-no-ref/
776 i2c2_pins_sleep_c: i2c2-sleep-2 {
777 pins {
778 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
779 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
780 };
781 };
782
783 /omit-if-no-ref/
784 i2c5_pins_a: i2c5-0 {
785 pins {
786 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
787 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
788 bias-disable;
789 drive-open-drain;
790 slew-rate = <0>;
791 };
792 };
793
794 /omit-if-no-ref/
795 i2c5_sleep_pins_a: i2c5-sleep-0 {
796 pins {
797 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
798 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
799
800 };
801 };
802
803 /omit-if-no-ref/
804 i2c5_pins_b: i2c5-1 {
805 pins {
806 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
807 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
808 bias-disable;
809 drive-open-drain;
810 slew-rate = <0>;
811 };
812 };
813
814 /omit-if-no-ref/
815 i2c5_sleep_pins_b: i2c5-sleep-1 {
816 pins {
817 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
818 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
819 };
820 };
821
822 /omit-if-no-ref/
823 i2s2_pins_a: i2s2-0 {
824 pins {
825 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
826 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
827 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
828 slew-rate = <1>;
829 drive-push-pull;
830 bias-disable;
831 };
832 };
833
834 /omit-if-no-ref/
835 i2s2_sleep_pins_a: i2s2-sleep-0 {
836 pins {
837 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
838 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
839 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
840 };
841 };
842
843 /omit-if-no-ref/
844 i2s2_pins_b: i2s2-1 {
845 pins {
846 pinmux = <STM32_PINMUX('C', 3, AF5)>, /* I2S2_SDO */
847 <STM32_PINMUX('B', 12, AF5)>, /* I2S2_WS */
848 <STM32_PINMUX('B', 13, AF5)>; /* I2S2_CK */
849 bias-disable;
850 drive-push-pull;
851 slew-rate = <1>;
852 };
853 };
854
855 /omit-if-no-ref/
856 i2s2_sleep_pins_b: i2s2-sleep-1 {
857 pins {
858 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* I2S2_SDO */
859 <STM32_PINMUX('B', 12, ANALOG)>, /* I2S2_WS */
860 <STM32_PINMUX('B', 13, ANALOG)>; /* I2S2_CK */
861 };
862 };
863
864 /omit-if-no-ref/
865 ltdc_pins_a: ltdc-0 {
866 pins {
867 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
868 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
869 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
870 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
871 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
872 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
873 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
874 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
875 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
876 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
877 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
878 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
879 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
880 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
881 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
882 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
883 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
884 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
885 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
886 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
887 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
888 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
889 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
890 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
891 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
892 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
893 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
894 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
895 bias-disable;
896 drive-push-pull;
897 slew-rate = <1>;
898 };
899 };
900
901 /omit-if-no-ref/
902 ltdc_sleep_pins_a: ltdc-sleep-0 {
903 pins {
904 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
905 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
906 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
907 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
908 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
909 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
910 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
911 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
912 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
913 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
914 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
915 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
916 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
917 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
918 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
919 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
920 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
921 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
922 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
923 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
924 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
925 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
926 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
927 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
928 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
929 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
930 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
931 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
932 };
933 };
934
935 /omit-if-no-ref/
936 ltdc_pins_b: ltdc-1 {
937 pins {
938 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
939 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
940 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
941 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
942 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
943 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
944 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
945 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
946 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
947 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
948 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
949 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
950 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
951 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
952 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
953 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
954 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
955 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
956 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
957 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
958 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
959 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
960 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
961 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
962 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
963 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
964 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
965 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
966 bias-disable;
967 drive-push-pull;
968 slew-rate = <1>;
969 };
970 };
971
972 /omit-if-no-ref/
973 ltdc_sleep_pins_b: ltdc-sleep-1 {
974 pins {
975 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
976 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
977 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
978 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
979 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
980 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
981 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
982 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
983 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
984 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
985 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
986 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
987 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
988 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
989 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
990 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
991 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
992 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
993 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
994 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
995 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
996 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
997 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
998 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
999 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
1000 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
1001 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
1002 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
1003 };
1004 };
1005
1006 /omit-if-no-ref/
1007 ltdc_pins_c: ltdc-2 {
1008 pins1 {
1009 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
1010 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
1011 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
1012 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
1013 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
1014 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
1015 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
1016 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
1017 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
1018 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
1019 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
1020 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
1021 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
1022 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
1023 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
1024 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
1025 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
1026 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
1027 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
1028 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
1029 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
1030 bias-disable;
1031 drive-push-pull;
1032 slew-rate = <0>;
1033 };
1034 pins2 {
1035 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
1036 bias-disable;
1037 drive-push-pull;
1038 slew-rate = <1>;
1039 };
1040 };
1041
1042 /omit-if-no-ref/
1043 ltdc_sleep_pins_c: ltdc-sleep-2 {
1044 pins1 {
1045 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
1046 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
1047 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
1048 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
1049 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
1050 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
1051 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
1052 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
1053 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
1054 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
1055 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
1056 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
1057 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
1058 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
1059 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
1060 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
1061 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
1062 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
1063 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
1064 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
1065 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
1066 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
1067 };
1068 };
1069
1070 /omit-if-no-ref/
1071 ltdc_pins_d: ltdc-3 {
1072 pins1 {
1073 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
1074 bias-disable;
1075 drive-push-pull;
1076 slew-rate = <3>;
1077 };
1078 pins2 {
1079 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
1080 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
1081 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
1082 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
1083 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
1084 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
1085 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
1086 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
1087 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
1088 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
1089 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
1090 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
1091 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
1092 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
1093 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
1094 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
1095 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
1096 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
1097 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
1098 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
1099 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
1100 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
1101 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
1102 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
1103 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
1104 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
1105 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
1106 bias-disable;
1107 drive-push-pull;
1108 slew-rate = <2>;
1109 };
1110 };
1111
1112 /omit-if-no-ref/
1113 ltdc_sleep_pins_d: ltdc-sleep-3 {
1114 pins {
1115 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
1116 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
1117 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
1118 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
1119 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
1120 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
1121 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
1122 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
1123 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
1124 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
1125 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
1126 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
1127 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
1128 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
1129 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
1130 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
1131 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
1132 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
1133 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
1134 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
1135 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
1136 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
1137 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
1138 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
1139 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
1140 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
1141 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
1142 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
1143 };
1144 };
1145
1146 /omit-if-no-ref/
1147 ltdc_pins_e: ltdc-4 {
1148 pins1 {
1149 pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
1150 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
1151 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
1152 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
1153 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
1154 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
1155 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
1156 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
1157 <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */
1158 <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
1159 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
1160 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
1161 <STM32_PINMUX('H', 4, AF14)>, /* LTDC_G4 */
1162 <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */
1163 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
1164 <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */
1165 <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */
1166 <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
1167 <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
1168 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
1169 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
1170 <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */
1171 <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */
1172 <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */
1173 <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */
1174 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
1175 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
1176 bias-disable;
1177 drive-push-pull;
1178 slew-rate = <0>;
1179 };
1180
1181 pins2 {
1182 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */
1183 bias-disable;
1184 drive-push-pull;
1185 slew-rate = <1>;
1186 };
1187 };
1188
1189 /omit-if-no-ref/
1190 ltdc_sleep_pins_e: ltdc-sleep-4 {
1191 pins {
1192 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */
1193 <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */
1194 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
1195 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
1196 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
1197 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
1198 <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */
1199 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
1200 <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */
1201 <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */
1202 <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */
1203 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
1204 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
1205 <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */
1206 <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */
1207 <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */
1208 <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */
1209 <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */
1210 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
1211 <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */
1212 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G4 */
1213 <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */
1214 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
1215 <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */
1216 <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */
1217 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
1218 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
1219 <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */
1220 };
1221 };
1222
1223 /omit-if-no-ref/
1224 mco1_pins_a: mco1-0 {
1225 pins {
1226 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
1227 bias-disable;
1228 drive-push-pull;
1229 slew-rate = <1>;
1230 };
1231 };
1232
1233 /omit-if-no-ref/
1234 mco1_sleep_pins_a: mco1-sleep-0 {
1235 pins {
1236 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
1237 };
1238 };
1239
1240 /omit-if-no-ref/
1241 mco2_pins_a: mco2-0 {
1242 pins {
1243 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
1244 bias-disable;
1245 drive-push-pull;
1246 slew-rate = <2>;
1247 };
1248 };
1249
1250 /omit-if-no-ref/
1251 mco2_sleep_pins_a: mco2-sleep-0 {
1252 pins {
1253 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
1254 };
1255 };
1256
1257 /omit-if-no-ref/
1258 m_can1_pins_a: m-can1-0 {
1259 pins1 {
1260 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1261 slew-rate = <1>;
1262 drive-push-pull;
1263 bias-disable;
1264 };
1265 pins2 {
1266 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
1267 bias-disable;
1268 };
1269 };
1270
1271 /omit-if-no-ref/
1272 m_can1_sleep_pins_a: m_can1-sleep-0 {
1273 pins {
1274 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1275 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
1276 };
1277 };
1278
1279 /omit-if-no-ref/
1280 m_can1_pins_b: m-can1-1 {
1281 pins1 {
1282 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
1283 slew-rate = <1>;
1284 drive-push-pull;
1285 bias-disable;
1286 };
1287 pins2 {
1288 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
1289 bias-disable;
1290 };
1291 };
1292
1293 /omit-if-no-ref/
1294 m_can1_sleep_pins_b: m_can1-sleep-1 {
1295 pins {
1296 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
1297 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
1298 };
1299 };
1300
1301 /omit-if-no-ref/
1302 m_can1_pins_c: m-can1-2 {
1303 pins1 {
1304 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1305 slew-rate = <1>;
1306 drive-push-pull;
1307 bias-disable;
1308 };
1309 pins2 {
1310 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
1311 bias-disable;
1312 };
1313 };
1314
1315 /omit-if-no-ref/
1316 m_can1_sleep_pins_c: m_can1-sleep-2 {
1317 pins {
1318 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1319 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
1320 };
1321 };
1322
1323 /omit-if-no-ref/
1324 m_can1_pins_d: m-can1-3 {
1325 pins1 {
1326 pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
1327 slew-rate = <1>;
1328 drive-push-pull;
1329 bias-disable;
1330 };
1331 pins2 {
1332 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
1333 bias-disable;
1334 };
1335 };
1336
1337 /omit-if-no-ref/
1338 m_can1_sleep_pins_d: m_can1-sleep-3 {
1339 pins {
1340 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* CAN1_TX */
1341 <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */
1342 };
1343 };
1344
1345 /omit-if-no-ref/
1346 m_can2_pins_a: m-can2-0 {
1347 pins1 {
1348 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1349 slew-rate = <1>;
1350 drive-push-pull;
1351 bias-disable;
1352 };
1353 pins2 {
1354 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1355 bias-disable;
1356 };
1357 };
1358
1359 /omit-if-no-ref/
1360 m_can2_sleep_pins_a: m_can2-sleep-0 {
1361 pins {
1362 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1363 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
1364 };
1365 };
1366
1367 /omit-if-no-ref/
1368 pwm1_pins_a: pwm1-0 {
1369 pins {
1370 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1371 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
1372 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
1373 bias-pull-down;
1374 drive-push-pull;
1375 slew-rate = <0>;
1376 };
1377 };
1378
1379 /omit-if-no-ref/
1380 pwm1_sleep_pins_a: pwm1-sleep-0 {
1381 pins {
1382 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1383 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
1384 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
1385 };
1386 };
1387
1388 /omit-if-no-ref/
1389 pwm1_pins_b: pwm1-1 {
1390 pins {
1391 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1392 bias-pull-down;
1393 drive-push-pull;
1394 slew-rate = <0>;
1395 };
1396 };
1397
1398 /omit-if-no-ref/
1399 pwm1_sleep_pins_b: pwm1-sleep-1 {
1400 pins {
1401 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1402 };
1403 };
1404
1405 /omit-if-no-ref/
1406 pwm1_pins_c: pwm1-2 {
1407 pins {
1408 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
1409 drive-push-pull;
1410 slew-rate = <0>;
1411 };
1412 };
1413
1414 /omit-if-no-ref/
1415 pwm1_sleep_pins_c: pwm1-sleep-2 {
1416 pins {
1417 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
1418 };
1419 };
1420
1421 /omit-if-no-ref/
1422 pwm2_pins_a: pwm2-0 {
1423 pins {
1424 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1425 bias-pull-down;
1426 drive-push-pull;
1427 slew-rate = <0>;
1428 };
1429 };
1430
1431 /omit-if-no-ref/
1432 pwm2_sleep_pins_a: pwm2-sleep-0 {
1433 pins {
1434 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1435 };
1436 };
1437
1438 /omit-if-no-ref/
1439 pwm3_pins_a: pwm3-0 {
1440 pins {
1441 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1442 bias-pull-down;
1443 drive-push-pull;
1444 slew-rate = <0>;
1445 };
1446 };
1447
1448 /omit-if-no-ref/
1449 pwm3_sleep_pins_a: pwm3-sleep-0 {
1450 pins {
1451 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1452 };
1453 };
1454
1455 /omit-if-no-ref/
1456 pwm3_pins_b: pwm3-1 {
1457 pins {
1458 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1459 bias-disable;
1460 drive-push-pull;
1461 slew-rate = <0>;
1462 };
1463 };
1464
1465 /omit-if-no-ref/
1466 pwm3_sleep_pins_b: pwm3-sleep-1 {
1467 pins {
1468 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1469 };
1470 };
1471
1472 /omit-if-no-ref/
1473 pwm4_pins_a: pwm4-0 {
1474 pins {
1475 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1476 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
1477 bias-pull-down;
1478 drive-push-pull;
1479 slew-rate = <0>;
1480 };
1481 };
1482
1483 /omit-if-no-ref/
1484 pwm4_sleep_pins_a: pwm4-sleep-0 {
1485 pins {
1486 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1487 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
1488 };
1489 };
1490
1491 /omit-if-no-ref/
1492 pwm4_pins_b: pwm4-1 {
1493 pins {
1494 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1495 bias-pull-down;
1496 drive-push-pull;
1497 slew-rate = <0>;
1498 };
1499 };
1500
1501 /omit-if-no-ref/
1502 pwm4_sleep_pins_b: pwm4-sleep-1 {
1503 pins {
1504 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1505 };
1506 };
1507
1508 /omit-if-no-ref/
1509 pwm5_pins_a: pwm5-0 {
1510 pins {
1511 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1512 bias-pull-down;
1513 drive-push-pull;
1514 slew-rate = <0>;
1515 };
1516 };
1517
1518 /omit-if-no-ref/
1519 pwm5_sleep_pins_a: pwm5-sleep-0 {
1520 pins {
1521 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1522 };
1523 };
1524
1525 /omit-if-no-ref/
1526 pwm5_pins_b: pwm5-1 {
1527 pins {
1528 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1529 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1530 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1531 bias-disable;
1532 drive-push-pull;
1533 slew-rate = <0>;
1534 };
1535 };
1536
1537 /omit-if-no-ref/
1538 pwm5_sleep_pins_b: pwm5-sleep-1 {
1539 pins {
1540 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1541 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1542 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1543 };
1544 };
1545
1546 /omit-if-no-ref/
1547 pwm8_pins_a: pwm8-0 {
1548 pins {
1549 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1550 bias-pull-down;
1551 drive-push-pull;
1552 slew-rate = <0>;
1553 };
1554 };
1555
1556 /omit-if-no-ref/
1557 pwm8_sleep_pins_a: pwm8-sleep-0 {
1558 pins {
1559 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1560 };
1561 };
1562
1563 /omit-if-no-ref/
1564 pwm8_pins_b: pwm8-1 {
1565 pins {
1566 pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
1567 <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
1568 <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
1569 <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */
1570 drive-push-pull;
1571 slew-rate = <0>;
1572 };
1573 };
1574
1575 /omit-if-no-ref/
1576 pwm8_sleep_pins_b: pwm8-sleep-1 {
1577 pins {
1578 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
1579 <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
1580 <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
1581 <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */
1582 };
1583 };
1584
1585 /omit-if-no-ref/
1586 pwm12_pins_a: pwm12-0 {
1587 pins {
1588 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1589 bias-pull-down;
1590 drive-push-pull;
1591 slew-rate = <0>;
1592 };
1593 };
1594
1595 /omit-if-no-ref/
1596 pwm12_sleep_pins_a: pwm12-sleep-0 {
1597 pins {
1598 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1599 };
1600 };
1601
1602 /omit-if-no-ref/
1603 qspi_clk_pins_a: qspi-clk-0 {
1604 pins {
1605 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1606 bias-disable;
1607 drive-push-pull;
1608 slew-rate = <3>;
1609 };
1610 };
1611
1612 /omit-if-no-ref/
1613 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1614 pins {
1615 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1616 };
1617 };
1618
1619 /omit-if-no-ref/
1620 qspi_bk1_pins_a: qspi-bk1-0 {
1621 pins {
1622 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1623 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1624 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1625 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1626 bias-disable;
1627 drive-push-pull;
1628 slew-rate = <1>;
1629 };
1630 };
1631
1632 /omit-if-no-ref/
1633 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1634 pins {
1635 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1636 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1637 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1638 <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */
1639 };
1640 };
1641
1642 /omit-if-no-ref/
1643 qspi_bk2_pins_a: qspi-bk2-0 {
1644 pins {
1645 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1646 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1647 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1648 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1649 bias-disable;
1650 drive-push-pull;
1651 slew-rate = <1>;
1652 };
1653 };
1654
1655 /omit-if-no-ref/
1656 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1657 pins {
1658 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1659 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1660 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1661 <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */
1662 };
1663 };
1664
1665 /omit-if-no-ref/
1666 qspi_cs1_pins_a: qspi-cs1-0 {
1667 pins {
1668 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1669 bias-pull-up;
1670 drive-push-pull;
1671 slew-rate = <1>;
1672 };
1673 };
1674
1675 /omit-if-no-ref/
1676 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
1677 pins {
1678 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1679 };
1680 };
1681
1682 /omit-if-no-ref/
1683 qspi_cs2_pins_a: qspi-cs2-0 {
1684 pins {
1685 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1686 bias-pull-up;
1687 drive-push-pull;
1688 slew-rate = <1>;
1689 };
1690 };
1691
1692 /omit-if-no-ref/
1693 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
1694 pins {
1695 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1696 };
1697 };
1698
1699 /omit-if-no-ref/
Tom Rini844493d2025-01-26 16:17:47 -0600[diff] [blame]1700 rtc_rsvd_pins_a: rtc-rsvd-0 {
1701 pins {
1702 pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
1703 };
1704 };
1705
1706 /omit-if-no-ref/
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1707 sai2a_pins_a: sai2a-0 {
1708 pins {
1709 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1710 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1711 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1712 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1713 slew-rate = <0>;
1714 drive-push-pull;
1715 bias-disable;
1716 };
1717 };
1718
1719 /omit-if-no-ref/
1720 sai2a_sleep_pins_a: sai2a-sleep-0 {
1721 pins {
1722 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1723 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1724 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1725 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1726 };
1727 };
1728
1729 /omit-if-no-ref/
1730 sai2a_pins_b: sai2a-1 {
1731 pins1 {
1732 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1733 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1734 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1735 slew-rate = <0>;
1736 drive-push-pull;
1737 bias-disable;
1738 };
1739 };
1740
1741 /omit-if-no-ref/
1742 sai2a_sleep_pins_b: sai2a-sleep-1 {
1743 pins {
1744 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1745 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1746 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1747 };
1748 };
1749
1750 /omit-if-no-ref/
1751 sai2a_pins_c: sai2a-2 {
1752 pins {
1753 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1754 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1755 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1756 slew-rate = <0>;
1757 drive-push-pull;
1758 bias-disable;
1759 };
1760 };
1761
1762 /omit-if-no-ref/
1763 sai2a_sleep_pins_c: sai2a-sleep-2 {
1764 pins {
1765 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1766 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1767 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1768 };
1769 };
1770
1771 /omit-if-no-ref/
1772 sai2b_pins_a: sai2b-0 {
1773 pins1 {
1774 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1775 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1776 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1777 slew-rate = <0>;
1778 drive-push-pull;
1779 bias-disable;
1780 };
1781 pins2 {
1782 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1783 bias-disable;
1784 };
1785 };
1786
1787 /omit-if-no-ref/
1788 sai2b_sleep_pins_a: sai2b-sleep-0 {
1789 pins {
1790 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1791 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1792 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1793 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1794 };
1795 };
1796
1797 /omit-if-no-ref/
1798 sai2b_pins_b: sai2b-1 {
1799 pins {
1800 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1801 bias-disable;
1802 };
1803 };
1804
1805 /omit-if-no-ref/
1806 sai2b_sleep_pins_b: sai2b-sleep-1 {
1807 pins {
1808 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1809 };
1810 };
1811
1812 /omit-if-no-ref/
1813 sai2b_pins_c: sai2b-2 {
1814 pins1 {
1815 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1816 bias-disable;
1817 };
1818 };
1819
1820 /omit-if-no-ref/
1821 sai2b_sleep_pins_c: sai2b-sleep-2 {
1822 pins {
1823 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1824 };
1825 };
1826
1827 /omit-if-no-ref/
1828 sai2b_pins_d: sai2b-3 {
1829 pins1 {
1830 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
1831 <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */
1832 <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */
1833 slew-rate = <0>;
1834 drive-push-pull;
1835 bias-disable;
1836 };
1837 pins2 {
1838 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1839 bias-disable;
1840 };
1841 };
1842
1843 /omit-if-no-ref/
1844 sai2b_sleep_pins_d: sai2b-sleep-3 {
1845 pins1 {
1846 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
1847 <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */
1848 <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */
1849 <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1850 };
1851 };
1852
1853 /omit-if-no-ref/
1854 sai4a_pins_a: sai4a-0 {
1855 pins {
1856 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1857 slew-rate = <0>;
1858 drive-push-pull;
1859 bias-disable;
1860 };
1861 };
1862
1863 /omit-if-no-ref/
1864 sai4a_sleep_pins_a: sai4a-sleep-0 {
1865 pins {
1866 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1867 };
1868 };
1869
1870 /omit-if-no-ref/
1871 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1872 pins1 {
1873 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1874 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1875 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1876 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1877 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1878 slew-rate = <1>;
1879 drive-push-pull;
1880 bias-disable;
1881 };
1882 pins2 {
1883 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1884 slew-rate = <2>;
1885 drive-push-pull;
1886 bias-disable;
1887 };
1888 };
1889
1890 /omit-if-no-ref/
1891 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1892 pins1 {
1893 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1894 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1895 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1896 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1897 slew-rate = <1>;
1898 drive-push-pull;
1899 bias-disable;
1900 };
1901 pins2 {
1902 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1903 slew-rate = <2>;
1904 drive-push-pull;
1905 bias-disable;
1906 };
1907 pins3 {
1908 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1909 slew-rate = <1>;
1910 drive-open-drain;
1911 bias-disable;
1912 };
1913 };
1914
1915 /omit-if-no-ref/
1916 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1917 pins1 {
1918 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1919 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1920 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1921 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1922 slew-rate = <1>;
1923 drive-push-pull;
1924 bias-disable;
1925 };
1926 };
1927
1928 /omit-if-no-ref/
1929 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1930 pins {
1931 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1932 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1933 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1934 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1935 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1936 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1937 };
1938 };
1939
1940 /omit-if-no-ref/
1941 sdmmc1_b4_pins_b: sdmmc1-b4-1 {
1942 pins1 {
1943 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1944 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1945 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
1946 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1947 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1948 slew-rate = <1>;
1949 drive-push-pull;
1950 bias-disable;
1951 };
1952 pins2 {
1953 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1954 slew-rate = <2>;
1955 drive-push-pull;
1956 bias-disable;
1957 };
1958 };
1959
1960 /omit-if-no-ref/
1961 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
1962 pins1 {
1963 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1964 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1965 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
1966 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1967 slew-rate = <1>;
1968 drive-push-pull;
1969 bias-disable;
1970 };
1971 pins2 {
1972 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1973 slew-rate = <2>;
1974 drive-push-pull;
1975 bias-disable;
1976 };
1977 pins3 {
1978 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1979 slew-rate = <1>;
1980 drive-open-drain;
1981 bias-disable;
1982 };
1983 };
1984
1985 /omit-if-no-ref/
1986 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
1987 pins {
1988 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1989 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1990 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */
1991 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1992 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1993 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1994 };
1995 };
1996
1997 /omit-if-no-ref/
1998 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1999 pins1 {
2000 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2001 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
2002 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
2003 slew-rate = <1>;
2004 drive-push-pull;
2005 bias-pull-up;
2006 };
2007 pins2 {
2008 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2009 bias-pull-up;
2010 };
2011 };
2012
2013 /omit-if-no-ref/
2014 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
2015 pins1 {
2016 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2017 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
2018 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
2019 slew-rate = <1>;
2020 drive-push-pull;
2021 bias-pull-up;
2022 };
2023 };
2024
2025 /omit-if-no-ref/
2026 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
2027 pins {
2028 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2029 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
2030 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
2031 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2032 };
2033 };
2034
2035 /omit-if-no-ref/
2036 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
2037 pins1 {
2038 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2039 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
2040 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
2041 slew-rate = <1>;
2042 drive-push-pull;
2043 bias-pull-up;
2044 };
2045 pins2 {
2046 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2047 bias-pull-up;
2048 };
2049 };
2050
2051 /omit-if-no-ref/
2052 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
2053 pins {
2054 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2055 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
2056 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
2057 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2058 };
2059 };
2060
2061 /omit-if-no-ref/
2062 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
2063 pins1 {
2064 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2065 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2066 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2067 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
2068 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2069 slew-rate = <1>;
2070 drive-push-pull;
2071 bias-pull-up;
2072 };
2073 pins2 {
2074 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2075 slew-rate = <2>;
2076 drive-push-pull;
2077 bias-pull-up;
2078 };
2079 };
2080
2081 /omit-if-no-ref/
2082 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
2083 pins1 {
2084 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2085 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2086 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2087 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
2088 slew-rate = <1>;
2089 drive-push-pull;
2090 bias-pull-up;
2091 };
2092 pins2 {
2093 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2094 slew-rate = <2>;
2095 drive-push-pull;
2096 bias-pull-up;
2097 };
2098 pins3 {
2099 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2100 slew-rate = <1>;
2101 drive-open-drain;
2102 bias-pull-up;
2103 };
2104 };
2105
2106 /omit-if-no-ref/
2107 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
2108 pins {
2109 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
2110 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
2111 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
2112 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
2113 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
2114 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
2115 };
2116 };
2117
2118 /omit-if-no-ref/
2119 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
2120 pins1 {
2121 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2122 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2123 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2124 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
2125 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2126 slew-rate = <1>;
2127 drive-push-pull;
2128 bias-disable;
2129 };
2130 pins2 {
2131 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2132 slew-rate = <2>;
2133 drive-push-pull;
2134 bias-disable;
2135 };
2136 };
2137
2138 /omit-if-no-ref/
2139 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
2140 pins1 {
2141 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2142 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2143 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2144 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
2145 slew-rate = <1>;
2146 drive-push-pull;
2147 bias-disable;
2148 };
2149 pins2 {
2150 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2151 slew-rate = <2>;
2152 drive-push-pull;
2153 bias-disable;
2154 };
2155 pins3 {
2156 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2157 slew-rate = <1>;
2158 drive-open-drain;
2159 bias-disable;
2160 };
2161 };
2162
2163 /omit-if-no-ref/
2164 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
2165 pins {
2166 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2167 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2168 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2169 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
2170 slew-rate = <1>;
2171 drive-push-pull;
2172 bias-pull-up;
2173 };
2174 };
2175
2176 /omit-if-no-ref/
2177 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
2178 pins {
2179 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2180 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2181 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2182 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
2183 };
2184 };
2185
2186 /omit-if-no-ref/
2187 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
2188 pins {
2189 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2190 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2191 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2192 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2193 slew-rate = <1>;
2194 drive-push-pull;
2195 bias-disable;
2196 };
2197 };
2198
2199 /omit-if-no-ref/
2200 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
2201 pins {
2202 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2203 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2204 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2205 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2206 };
2207 };
2208
2209 /omit-if-no-ref/
2210 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
2211 pins {
2212 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2213 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
2214 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2215 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2216 slew-rate = <1>;
2217 drive-push-pull;
2218 bias-pull-up;
2219 };
2220 };
2221
2222 /omit-if-no-ref/
2223 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
2224 pins {
2225 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2226 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
2227 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2228 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2229 };
2230 };
2231
2232 /omit-if-no-ref/
2233 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
2234 pins {
2235 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2236 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2237 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2238 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
Tom Rini9c8af152024-12-24 12:03:04 -0600[diff] [blame]2239 slew-rate = <1>;
2240 drive-push-pull;
2241 bias-pull-up;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]2242 };
2243 };
2244
2245 /omit-if-no-ref/
2246 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
2247 pins {
2248 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2249 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2250 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2251 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2252 };
2253 };
2254
2255 /omit-if-no-ref/
2256 sdmmc2_d47_pins_e: sdmmc2-d47-4 {
2257 pins {
2258 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2259 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2260 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2261 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
2262 slew-rate = <1>;
2263 drive-push-pull;
2264 bias-pull-up;
2265 };
2266 };
2267
2268 /omit-if-no-ref/
2269 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
2270 pins {
2271 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2272 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2273 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2274 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
2275 };
2276 };
2277
2278 /omit-if-no-ref/
2279 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
2280 pins1 {
2281 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2282 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2283 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
2284 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2285 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
2286 slew-rate = <1>;
2287 drive-push-pull;
2288 bias-pull-up;
2289 };
2290 pins2 {
2291 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2292 slew-rate = <2>;
2293 drive-push-pull;
2294 bias-pull-up;
2295 };
2296 };
2297
2298 /omit-if-no-ref/
2299 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
2300 pins1 {
2301 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2302 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2303 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
2304 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2305 slew-rate = <1>;
2306 drive-push-pull;
2307 bias-pull-up;
2308 };
2309 pins2 {
2310 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2311 slew-rate = <2>;
2312 drive-push-pull;
2313 bias-pull-up;
2314 };
2315 pins3 {
2316 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
2317 slew-rate = <1>;
2318 drive-open-drain;
2319 bias-pull-up;
2320 };
2321 };
2322
2323 /omit-if-no-ref/
2324 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
2325 pins {
2326 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2327 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
2328 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
2329 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2330 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
2331 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
2332 };
2333 };
2334
2335 /omit-if-no-ref/
2336 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
2337 pins1 {
2338 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2339 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2340 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
2341 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2342 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
2343 slew-rate = <1>;
2344 drive-push-pull;
2345 bias-pull-up;
2346 };
2347 pins2 {
2348 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2349 slew-rate = <2>;
2350 drive-push-pull;
2351 bias-pull-up;
2352 };
2353 };
2354
2355 /omit-if-no-ref/
2356 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
2357 pins1 {
2358 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2359 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2360 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
2361 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2362 slew-rate = <1>;
2363 drive-push-pull;
2364 bias-pull-up;
2365 };
2366 pins2 {
2367 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2368 slew-rate = <2>;
2369 drive-push-pull;
2370 bias-pull-up;
2371 };
2372 pins3 {
2373 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
2374 slew-rate = <1>;
2375 drive-open-drain;
2376 bias-pull-up;
2377 };
2378 };
2379
2380 /omit-if-no-ref/
2381 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
2382 pins {
2383 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2384 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
2385 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
2386 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2387 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
2388 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
2389 };
2390 };
2391
2392 /omit-if-no-ref/
2393 spdifrx_pins_a: spdifrx-0 {
2394 pins {
2395 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
2396 bias-disable;
2397 };
2398 };
2399
2400 /omit-if-no-ref/
2401 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
2402 pins {
2403 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
2404 };
2405 };
2406
2407 /omit-if-no-ref/
2408 spi1_pins_b: spi1-1 {
2409 pins1 {
2410 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2411 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
2412 bias-disable;
2413 drive-push-pull;
2414 slew-rate = <1>;
2415 };
2416
2417 pins2 {
2418 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2419 bias-disable;
2420 };
2421 };
2422
2423 /omit-if-no-ref/
2424 spi2_pins_a: spi2-0 {
2425 pins1 {
2426 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
2427 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
2428 bias-disable;
2429 drive-push-pull;
2430 slew-rate = <1>;
2431 };
2432
2433 pins2 {
2434 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2435 bias-disable;
2436 };
2437 };
2438
2439 /omit-if-no-ref/
2440 spi2_pins_b: spi2-1 {
2441 pins1 {
2442 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2443 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
2444 bias-disable;
2445 drive-push-pull;
2446 slew-rate = <1>;
2447 };
2448
2449 pins2 {
2450 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2451 bias-disable;
2452 };
2453 };
2454
2455 /omit-if-no-ref/
2456 spi2_pins_c: spi2-2 {
2457 pins1 {
2458 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2459 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
2460 bias-disable;
2461 drive-push-pull;
2462 };
2463
2464 pins2 {
2465 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2466 bias-pull-down;
2467 };
2468 };
2469
2470 /omit-if-no-ref/
2471 spi4_pins_a: spi4-0 {
2472 pins {
2473 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
2474 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
2475 bias-disable;
2476 drive-push-pull;
2477 slew-rate = <1>;
2478 };
2479 pins2 {
2480 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
2481 bias-disable;
2482 };
2483 };
2484
2485 /omit-if-no-ref/
2486 spi5_pins_a: spi5-0 {
2487 pins1 {
2488 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
2489 <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
2490 bias-disable;
2491 drive-push-pull;
2492 slew-rate = <1>;
2493 };
2494
2495 pins2 {
2496 pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
2497 bias-disable;
2498 };
2499 };
2500
2501 /omit-if-no-ref/
2502 stusb1600_pins_a: stusb1600-0 {
2503 pins {
2504 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
2505 bias-pull-up;
2506 };
2507 };
2508
2509 /omit-if-no-ref/
2510 uart4_pins_a: uart4-0 {
2511 pins1 {
2512 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2513 bias-disable;
2514 drive-push-pull;
2515 slew-rate = <0>;
2516 };
2517 pins2 {
2518 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2519 bias-disable;
2520 };
2521 };
2522
2523 /omit-if-no-ref/
2524 uart4_idle_pins_a: uart4-idle-0 {
2525 pins1 {
2526 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
2527 };
2528 pins2 {
2529 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2530 bias-disable;
2531 };
2532 };
2533
2534 /omit-if-no-ref/
2535 uart4_sleep_pins_a: uart4-sleep-0 {
2536 pins {
2537 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
2538 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
2539 };
2540 };
2541
2542 /omit-if-no-ref/
2543 uart4_pins_b: uart4-1 {
2544 pins1 {
2545 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
2546 bias-disable;
2547 drive-push-pull;
2548 slew-rate = <0>;
2549 };
2550 pins2 {
2551 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2552 bias-disable;
2553 };
2554 };
2555
2556 /omit-if-no-ref/
2557 uart4_pins_c: uart4-2 {
2558 pins1 {
2559 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2560 bias-disable;
2561 drive-push-pull;
2562 slew-rate = <0>;
2563 };
2564 pins2 {
2565 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2566 bias-disable;
2567 };
2568 };
2569
2570 /omit-if-no-ref/
2571 uart4_pins_d: uart4-3 {
2572 pins1 {
2573 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
2574 bias-disable;
2575 drive-push-pull;
2576 slew-rate = <0>;
2577 };
2578 pins2 {
2579 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2580 bias-disable;
2581 };
2582 };
2583
2584 /omit-if-no-ref/
2585 uart4_idle_pins_d: uart4-idle-3 {
2586 pins1 {
2587 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
2588 };
2589 pins2 {
2590 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2591 bias-disable;
2592 };
2593 };
2594
2595 /omit-if-no-ref/
2596 uart4_sleep_pins_d: uart4-sleep-3 {
2597 pins {
2598 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
2599 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
2600 };
2601 };
2602
2603 /omit-if-no-ref/
2604 uart5_pins_a: uart5-0 {
2605 pins1 {
2606 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
2607 bias-disable;
2608 drive-push-pull;
2609 slew-rate = <0>;
2610 };
2611 pins2 {
2612 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
2613 bias-disable;
2614 };
2615 };
2616
2617 /omit-if-no-ref/
2618 uart7_pins_a: uart7-0 {
2619 pins1 {
2620 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2621 bias-disable;
2622 drive-push-pull;
2623 slew-rate = <0>;
2624 };
2625 pins2 {
2626 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2627 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
2628 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
2629 bias-disable;
2630 };
2631 };
2632
2633 /omit-if-no-ref/
2634 uart7_pins_b: uart7-1 {
2635 pins1 {
2636 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2637 bias-disable;
2638 drive-push-pull;
2639 slew-rate = <0>;
2640 };
2641 pins2 {
2642 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2643 bias-disable;
2644 };
2645 };
2646
2647 /omit-if-no-ref/
2648 uart7_pins_c: uart7-2 {
2649 pins1 {
2650 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2651 bias-disable;
2652 drive-push-pull;
2653 slew-rate = <0>;
2654 };
2655 pins2 {
2656 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2657 bias-pull-up;
2658 };
2659 };
2660
2661 /omit-if-no-ref/
2662 uart7_idle_pins_c: uart7-idle-2 {
2663 pins1 {
2664 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2665 };
2666 pins2 {
2667 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2668 bias-pull-up;
2669 };
2670 };
2671
2672 /omit-if-no-ref/
2673 uart7_sleep_pins_c: uart7-sleep-2 {
2674 pins {
2675 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2676 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
2677 };
2678 };
2679
2680 /omit-if-no-ref/
2681 uart8_pins_a: uart8-0 {
2682 pins1 {
2683 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2684 bias-disable;
2685 drive-push-pull;
2686 slew-rate = <0>;
2687 };
2688 pins2 {
2689 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2690 bias-disable;
2691 };
2692 };
2693
2694 /omit-if-no-ref/
2695 uart8_rtscts_pins_a: uart8rtscts-0 {
2696 pins {
2697 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2698 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
2699 bias-disable;
2700 };
2701 };
2702
2703 /omit-if-no-ref/
2704 usart1_pins_a: usart1-0 {
2705 pins1 {
2706 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */
2707 bias-disable;
2708 drive-push-pull;
2709 slew-rate = <0>;
2710 };
2711 pins2 {
2712 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2713 bias-disable;
2714 };
2715 };
2716
2717 /omit-if-no-ref/
2718 usart1_idle_pins_a: usart1-idle-0 {
2719 pins1 {
2720 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2721 <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2722 };
2723 };
2724
2725 /omit-if-no-ref/
2726 usart1_sleep_pins_a: usart1-sleep-0 {
2727 pins {
2728 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2729 <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */
2730 };
2731 };
2732
2733 /omit-if-no-ref/
2734 usart2_pins_a: usart2-0 {
2735 pins1 {
2736 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2737 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2738 bias-disable;
2739 drive-push-pull;
2740 slew-rate = <0>;
2741 };
2742 pins2 {
2743 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2744 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2745 bias-disable;
2746 };
2747 };
2748
2749 /omit-if-no-ref/
2750 usart2_sleep_pins_a: usart2-sleep-0 {
2751 pins {
2752 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2753 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2754 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2755 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2756 };
2757 };
2758
2759 /omit-if-no-ref/
2760 usart2_pins_b: usart2-1 {
2761 pins1 {
2762 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2763 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
2764 bias-disable;
2765 drive-push-pull;
2766 slew-rate = <0>;
2767 };
2768 pins2 {
2769 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2770 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
2771 bias-disable;
2772 };
2773 };
2774
2775 /omit-if-no-ref/
2776 usart2_sleep_pins_b: usart2-sleep-1 {
2777 pins {
2778 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2779 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
2780 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
2781 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
2782 };
2783 };
2784
2785 /omit-if-no-ref/
2786 usart2_pins_c: usart2-2 {
2787 pins1 {
2788 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2789 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2790 bias-disable;
2791 drive-push-pull;
2792 slew-rate = <0>;
2793 };
2794 pins2 {
2795 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2796 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2797 bias-disable;
2798 };
2799 };
2800
2801 /omit-if-no-ref/
2802 usart2_idle_pins_c: usart2-idle-2 {
2803 pins1 {
2804 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2805 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2806 };
2807 pins2 {
2808 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2809 bias-disable;
2810 drive-push-pull;
2811 slew-rate = <0>;
2812 };
2813 pins3 {
2814 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2815 bias-disable;
2816 };
2817 };
2818
2819 /omit-if-no-ref/
2820 usart2_sleep_pins_c: usart2-sleep-2 {
2821 pins {
2822 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2823 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2824 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2825 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2826 };
2827 };
2828
2829 /omit-if-no-ref/
2830 usart3_pins_a: usart3-0 {
2831 pins1 {
2832 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2833 bias-disable;
2834 drive-push-pull;
2835 slew-rate = <0>;
2836 };
2837 pins2 {
2838 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2839 bias-disable;
2840 };
2841 };
2842
2843 /omit-if-no-ref/
2844 usart3_idle_pins_a: usart3-idle-0 {
2845 pins1 {
2846 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */
2847 };
2848 pins2 {
2849 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2850 bias-disable;
2851 };
2852 };
2853
2854 /omit-if-no-ref/
2855 usart3_sleep_pins_a: usart3-sleep-0 {
2856 pins {
2857 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2858 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2859 };
2860 };
2861
2862 /omit-if-no-ref/
2863 usart3_pins_b: usart3-1 {
2864 pins1 {
2865 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2866 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2867 bias-disable;
2868 drive-push-pull;
2869 slew-rate = <0>;
2870 };
2871 pins2 {
2872 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2873 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
2874 bias-pull-up;
2875 };
2876 };
2877
2878 /omit-if-no-ref/
2879 usart3_idle_pins_b: usart3-idle-1 {
2880 pins1 {
2881 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2882 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
2883 };
2884 pins2 {
2885 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2886 bias-disable;
2887 drive-push-pull;
2888 slew-rate = <0>;
2889 };
2890 pins3 {
2891 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2892 bias-pull-up;
2893 };
2894 };
2895
2896 /omit-if-no-ref/
2897 usart3_sleep_pins_b: usart3-sleep-1 {
2898 pins {
2899 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2900 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2901 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2902 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2903 };
2904 };
2905
2906 /omit-if-no-ref/
2907 usart3_pins_c: usart3-2 {
2908 pins1 {
2909 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2910 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2911 bias-disable;
2912 drive-push-pull;
2913 slew-rate = <0>;
2914 };
2915 pins2 {
2916 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2917 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
2918 bias-pull-up;
2919 };
2920 };
2921
2922 /omit-if-no-ref/
2923 usart3_idle_pins_c: usart3-idle-2 {
2924 pins1 {
2925 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2926 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2927 };
2928 pins2 {
2929 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2930 bias-disable;
2931 drive-push-pull;
2932 slew-rate = <0>;
2933 };
2934 pins3 {
2935 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2936 bias-pull-up;
2937 };
2938 };
2939
2940 /omit-if-no-ref/
2941 usart3_sleep_pins_c: usart3-sleep-2 {
2942 pins {
2943 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2944 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2945 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2946 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2947 };
2948 };
2949
2950 /omit-if-no-ref/
2951 usart3_pins_d: usart3-3 {
2952 pins1 {
2953 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2954 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2955 bias-disable;
2956 drive-push-pull;
2957 slew-rate = <0>;
2958 };
2959 pins2 {
2960 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2961 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2962 bias-disable;
2963 };
2964 };
2965
2966 /omit-if-no-ref/
2967 usart3_idle_pins_d: usart3-idle-3 {
2968 pins1 {
2969 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2970 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2971 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2972 };
2973 pins2 {
2974 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2975 bias-disable;
2976 };
2977 };
2978
2979 /omit-if-no-ref/
2980 usart3_sleep_pins_d: usart3-sleep-3 {
2981 pins {
2982 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2983 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2984 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2985 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
2986 };
2987 };
2988
2989 /omit-if-no-ref/
2990 usart3_pins_e: usart3-4 {
2991 pins1 {
2992 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2993 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2994 bias-disable;
2995 drive-push-pull;
2996 slew-rate = <0>;
2997 };
2998 pins2 {
2999 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
3000 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
3001 bias-pull-up;
3002 };
3003 };
3004
3005 /omit-if-no-ref/
3006 usart3_idle_pins_e: usart3-idle-4 {
3007 pins1 {
3008 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3009 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
3010 };
3011 pins2 {
3012 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
3013 bias-disable;
3014 drive-push-pull;
3015 slew-rate = <0>;
3016 };
3017 pins3 {
3018 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
3019 bias-pull-up;
3020 };
3021 };
3022
3023 /omit-if-no-ref/
3024 usart3_sleep_pins_e: usart3-sleep-4 {
3025 pins {
3026 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3027 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
3028 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
3029 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
3030 };
3031 };
3032
3033 /omit-if-no-ref/
3034 usart3_pins_f: usart3-5 {
3035 pins1 {
3036 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
3037 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */
3038 bias-disable;
3039 drive-push-pull;
3040 slew-rate = <0>;
3041 };
3042 pins2 {
3043 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
3044 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
3045 bias-disable;
3046 };
3047 };
3048
3049 /omit-if-no-ref/
3050 usbotg_hs_pins_a: usbotg-hs-0 {
3051 pins {
3052 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
3053 };
3054 };
3055
3056 /omit-if-no-ref/
3057 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
3058 pins {
3059 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
3060 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
3061 };
3062 };
3063};
3064
3065&pinctrl_z {
3066 /omit-if-no-ref/
3067 i2c2_pins_b2: i2c2-0 {
3068 pins {
3069 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
3070 bias-disable;
3071 drive-open-drain;
3072 slew-rate = <0>;
3073 };
3074 };
3075
3076 /omit-if-no-ref/
3077 i2c2_sleep_pins_b2: i2c2-sleep-0 {
3078 pins {
3079 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
3080 };
3081 };
3082
3083 /omit-if-no-ref/
3084 i2c4_pins_a: i2c4-0 {
3085 pins {
3086 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
3087 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
3088 bias-disable;
3089 drive-open-drain;
3090 slew-rate = <0>;
3091 };
3092 };
3093
3094 /omit-if-no-ref/
3095 i2c4_sleep_pins_a: i2c4-sleep-0 {
3096 pins {
3097 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
3098 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
3099 };
3100 };
3101
3102 /omit-if-no-ref/
3103 i2c6_pins_a: i2c6-0 {
3104 pins {
3105 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
3106 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
3107 bias-disable;
3108 drive-open-drain;
3109 slew-rate = <0>;
3110 };
3111 };
3112
3113 /omit-if-no-ref/
3114 i2c6_sleep_pins_a: i2c6-sleep-0 {
3115 pins {
3116 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
3117 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
3118 };
3119 };
3120
3121 /omit-if-no-ref/
3122 spi1_pins_a: spi1-0 {
3123 pins1 {
3124 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
3125 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
3126 bias-disable;
3127 drive-push-pull;
3128 slew-rate = <1>;
3129 };
3130
3131 pins2 {
3132 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
3133 bias-disable;
3134 };
3135 };
3136
3137 /omit-if-no-ref/
3138 spi1_sleep_pins_a: spi1-sleep-0 {
3139 pins {
3140 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
3141 <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */
3142 <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */
3143 };
3144 };
3145
3146 /omit-if-no-ref/
3147 usart1_pins_b: usart1-1 {
3148 pins1 {
3149 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
3150 bias-disable;
3151 drive-push-pull;
3152 slew-rate = <0>;
3153 };
3154 pins2 {
3155 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3156 bias-disable;
3157 };
3158 };
3159
3160 /omit-if-no-ref/
3161 usart1_idle_pins_b: usart1-idle-1 {
3162 pins1 {
3163 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
3164 };
3165 pins2 {
3166 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3167 bias-disable;
3168 };
3169 };
3170
3171 /omit-if-no-ref/
3172 usart1_sleep_pins_b: usart1-sleep-1 {
3173 pins {
3174 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */
3175 <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */
3176 };
3177 };
3178};