Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2021 - All Rights Reserved |
| 4 | * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> |
| 5 | */ |
| 6 | #include <dt-bindings/pinctrl/stm32-pinfunc.h> |
| 7 | |
| 8 | &pinctrl { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 9 | /omit-if-no-ref/ |
| 10 | adc1_pins_a: adc1-pins-0 { |
| 11 | pins { |
| 12 | pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */ |
| 13 | }; |
| 14 | }; |
| 15 | |
| 16 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 17 | adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { |
| 18 | pins { |
| 19 | pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ |
| 20 | <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */ |
| 21 | }; |
| 22 | }; |
| 23 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 24 | /omit-if-no-ref/ |
| 25 | adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { |
| 26 | pins { |
| 27 | pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */ |
| 28 | <STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */ |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | /omit-if-no-ref/ |
| 33 | dcmipp_pins_a: dcmi-0 { |
| 34 | pins1 { |
| 35 | pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */ |
| 36 | <STM32_PINMUX('G', 9, AF13)>,/* DCMI_VSYNC */ |
| 37 | <STM32_PINMUX('B', 7, AF14)>,/* DCMI_PIXCLK */ |
| 38 | <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */ |
| 39 | <STM32_PINMUX('D', 0, AF13)>,/* DCMI_D1 */ |
| 40 | <STM32_PINMUX('G', 10, AF13)>,/* DCMI_D2 */ |
| 41 | <STM32_PINMUX('E', 4, AF13)>,/* DCMI_D3 */ |
| 42 | <STM32_PINMUX('D', 11, AF14)>,/* DCMI_D4 */ |
| 43 | <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */ |
| 44 | <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */ |
| 45 | <STM32_PINMUX('E', 14, AF13)>;/* DCMI_D7 */ |
| 46 | bias-disable; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | /omit-if-no-ref/ |
| 51 | dcmipp_sleep_pins_a: dcmi-sleep-0 { |
| 52 | pins1 { |
| 53 | pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */ |
| 54 | <STM32_PINMUX('G', 9, ANALOG)>,/* DCMI_VSYNC */ |
| 55 | <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_PIXCLK */ |
| 56 | <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */ |
| 57 | <STM32_PINMUX('D', 0, ANALOG)>,/* DCMI_D1 */ |
| 58 | <STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D2 */ |
| 59 | <STM32_PINMUX('E', 4, ANALOG)>,/* DCMI_D3 */ |
| 60 | <STM32_PINMUX('D', 11, ANALOG)>,/* DCMI_D4 */ |
| 61 | <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */ |
| 62 | <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */ |
| 63 | <STM32_PINMUX('E', 14, ANALOG)>;/* DCMI_D7 */ |
| 64 | }; |
| 65 | }; |
| 66 | |
| 67 | /omit-if-no-ref/ |
| 68 | eth1_rgmii_pins_a: eth1-rgmii-0 { |
| 69 | pins1 { |
| 70 | pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ |
| 71 | <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ |
| 72 | <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ |
| 73 | <STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */ |
| 74 | <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ |
| 75 | <STM32_PINMUX('C', 1, AF11)>, /* ETH_RGMII_GTX_CLK */ |
| 76 | <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */ |
| 77 | <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */ |
| 78 | bias-disable; |
| 79 | drive-push-pull; |
| 80 | slew-rate = <2>; |
| 81 | }; |
| 82 | |
| 83 | pins2 { |
| 84 | pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ |
| 85 | <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ |
| 86 | <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */ |
| 87 | <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ |
| 88 | <STM32_PINMUX('A', 7, AF11)>, /* ETH_RGMII_RX_CTL */ |
| 89 | <STM32_PINMUX('D', 7, AF10)>; /* ETH_RGMII_RX_CLK */ |
| 90 | bias-disable; |
| 91 | }; |
| 92 | }; |
| 93 | |
| 94 | /omit-if-no-ref/ |
| 95 | eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 { |
| 96 | pins1 { |
Tom Rini | 9c8af15 | 2024-12-24 12:03:04 -0600 | [diff] [blame] | 97 | pinmux = <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */ |
| 98 | <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */ |
| 99 | bias-disable; |
| 100 | drive-push-pull; |
| 101 | slew-rate = <2>; |
| 102 | }; |
| 103 | |
| 104 | pins2 { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 105 | pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ |
| 106 | <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ |
| 107 | <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ |
| 108 | <STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */ |
| 109 | <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ |
| 110 | <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_RGMII_GTX_CLK */ |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 111 | <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ |
| 112 | <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ |
| 113 | <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */ |
| 114 | <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD1 */ |
| 115 | <STM32_PINMUX('A', 7, ANALOG)>, /* ETH_RGMII_RX_CTL */ |
| 116 | <STM32_PINMUX('D', 7, ANALOG)>; /* ETH_RGMII_RX_CLK */ |
| 117 | }; |
| 118 | }; |
| 119 | |
| 120 | /omit-if-no-ref/ |
| 121 | eth1_rmii_pins_a: eth1-rmii-0 { |
| 122 | pins1 { |
| 123 | pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */ |
| 124 | <STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */ |
| 125 | <STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */ |
| 126 | <STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */ |
| 127 | <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */ |
| 128 | <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */ |
| 129 | bias-disable; |
| 130 | drive-push-pull; |
| 131 | slew-rate = <1>; |
| 132 | }; |
| 133 | |
| 134 | pins2 { |
| 135 | pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */ |
| 136 | <STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */ |
| 137 | <STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */ |
| 138 | bias-disable; |
| 139 | }; |
| 140 | }; |
| 141 | |
| 142 | /omit-if-no-ref/ |
| 143 | eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 { |
| 144 | pins1 { |
| 145 | pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */ |
| 146 | <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */ |
| 147 | <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */ |
| 148 | <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */ |
| 149 | <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ |
| 150 | <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */ |
| 151 | <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */ |
| 152 | <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */ |
| 153 | <STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */ |
| 154 | }; |
| 155 | }; |
| 156 | |
| 157 | /omit-if-no-ref/ |
| 158 | eth2_rgmii_pins_a: eth2-rgmii-0 { |
| 159 | pins1 { |
| 160 | pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RGMII_TXD0 */ |
| 161 | <STM32_PINMUX('G', 11, AF10)>, /* ETH_RGMII_TXD1 */ |
| 162 | <STM32_PINMUX('G', 1, AF10)>, /* ETH_RGMII_TXD2 */ |
| 163 | <STM32_PINMUX('E', 6, AF11)>, /* ETH_RGMII_TXD3 */ |
| 164 | <STM32_PINMUX('F', 6, AF11)>, /* ETH_RGMII_TX_CTL */ |
| 165 | <STM32_PINMUX('G', 3, AF10)>, /* ETH_RGMII_GTX_CLK */ |
| 166 | <STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */ |
| 167 | <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */ |
| 168 | bias-disable; |
| 169 | drive-push-pull; |
| 170 | slew-rate = <2>; |
| 171 | }; |
| 172 | |
| 173 | pins2 { |
| 174 | pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RGMII_RXD0 */ |
| 175 | <STM32_PINMUX('E', 2, AF10)>, /* ETH_RGMII_RXD1 */ |
| 176 | <STM32_PINMUX('H', 6, AF12)>, /* ETH_RGMII_RXD2 */ |
| 177 | <STM32_PINMUX('A', 8, AF11)>, /* ETH_RGMII_RXD3 */ |
| 178 | <STM32_PINMUX('A', 12, AF11)>, /* ETH_RGMII_RX_CTL */ |
| 179 | <STM32_PINMUX('H', 11, AF11)>; /* ETH_RGMII_RX_CLK */ |
| 180 | bias-disable; |
| 181 | }; |
| 182 | }; |
| 183 | |
| 184 | /omit-if-no-ref/ |
| 185 | eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { |
| 186 | pins1 { |
Tom Rini | 9c8af15 | 2024-12-24 12:03:04 -0600 | [diff] [blame] | 187 | pinmux = <STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */ |
| 188 | <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */ |
| 189 | bias-disable; |
| 190 | drive-push-pull; |
| 191 | slew-rate = <2>; |
| 192 | }; |
| 193 | |
| 194 | pins2 { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 195 | pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_TXD0 */ |
| 196 | <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD1 */ |
| 197 | <STM32_PINMUX('G', 1, ANALOG)>, /* ETH_RGMII_TXD2 */ |
| 198 | <STM32_PINMUX('E', 6, ANALOG)>, /* ETH_RGMII_TXD3 */ |
| 199 | <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RGMII_TX_CTL */ |
| 200 | <STM32_PINMUX('G', 3, ANALOG)>, /* ETH_RGMII_GTX_CLK */ |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 201 | <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ |
| 202 | <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD1 */ |
| 203 | <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ |
| 204 | <STM32_PINMUX('A', 8, ANALOG)>, /* ETH_RGMII_RXD3 */ |
| 205 | <STM32_PINMUX('A', 12, ANALOG)>, /* ETH_RGMII_RX_CTL */ |
| 206 | <STM32_PINMUX('H', 11, ANALOG)>; /* ETH_RGMII_RX_CLK */ |
| 207 | }; |
| 208 | }; |
| 209 | |
| 210 | /omit-if-no-ref/ |
| 211 | eth2_rmii_pins_a: eth2-rmii-0 { |
| 212 | pins1 { |
| 213 | pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */ |
| 214 | <STM32_PINMUX('G', 11, AF10)>, /* ETH_RMII_TXD1 */ |
| 215 | <STM32_PINMUX('G', 8, AF13)>, /* ETH_RMII_ETHCK */ |
| 216 | <STM32_PINMUX('F', 6, AF11)>, /* ETH_RMII_TX_EN */ |
| 217 | <STM32_PINMUX('B', 2, AF11)>, /* ETH_MDIO */ |
| 218 | <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */ |
| 219 | bias-disable; |
| 220 | drive-push-pull; |
| 221 | slew-rate = <1>; |
| 222 | }; |
| 223 | |
| 224 | pins2 { |
| 225 | pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RMII_RXD0 */ |
| 226 | <STM32_PINMUX('E', 2, AF10)>, /* ETH_RMII_RXD1 */ |
| 227 | <STM32_PINMUX('A', 12, AF11)>; /* ETH_RMII_CRS_DV */ |
| 228 | bias-disable; |
| 229 | }; |
| 230 | }; |
| 231 | |
| 232 | /omit-if-no-ref/ |
| 233 | eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 { |
| 234 | pins1 { |
| 235 | pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RMII_TXD0 */ |
| 236 | <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RMII_TXD1 */ |
| 237 | <STM32_PINMUX('G', 8, ANALOG)>, /* ETH_RMII_ETHCK */ |
| 238 | <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RMII_TX_EN */ |
| 239 | <STM32_PINMUX('B', 2, ANALOG)>, /* ETH_MDIO */ |
| 240 | <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */ |
| 241 | <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RMII_RXD0 */ |
| 242 | <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RMII_RXD1 */ |
| 243 | <STM32_PINMUX('A', 12, ANALOG)>; /* ETH_RMII_CRS_DV */ |
| 244 | }; |
| 245 | }; |
| 246 | |
| 247 | /omit-if-no-ref/ |
| 248 | goodix_pins_a: goodix-0 { |
| 249 | /* |
| 250 | * touchscreen reset needs to be configured |
| 251 | * via the pinctrl not the driver (a pull-down resistor |
| 252 | * has been soldered onto the reset line which forces |
| 253 | * the touchscreen to reset state). |
| 254 | */ |
| 255 | pins1 { |
| 256 | pinmux = <STM32_PINMUX('H', 2, GPIO)>; |
| 257 | output-high; |
| 258 | bias-pull-up; |
| 259 | }; |
| 260 | /* |
| 261 | * Interrupt line must have a pull-down resistor |
| 262 | * in order to freeze the i2c address at 0x5D |
| 263 | */ |
| 264 | pins2 { |
| 265 | pinmux = <STM32_PINMUX('F', 5, GPIO)>; |
| 266 | bias-pull-down; |
| 267 | }; |
| 268 | }; |
| 269 | |
| 270 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 271 | i2c1_pins_a: i2c1-0 { |
| 272 | pins { |
| 273 | pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ |
| 274 | <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */ |
| 275 | bias-disable; |
| 276 | drive-open-drain; |
| 277 | slew-rate = <0>; |
| 278 | }; |
| 279 | }; |
| 280 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 281 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 282 | i2c1_sleep_pins_a: i2c1-sleep-0 { |
| 283 | pins { |
| 284 | pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ |
| 285 | <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */ |
| 286 | }; |
| 287 | }; |
| 288 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 289 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 290 | i2c5_pins_a: i2c5-0 { |
| 291 | pins { |
| 292 | pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */ |
| 293 | <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */ |
| 294 | bias-disable; |
| 295 | drive-open-drain; |
| 296 | slew-rate = <0>; |
| 297 | }; |
| 298 | }; |
| 299 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 300 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 301 | i2c5_sleep_pins_a: i2c5-sleep-0 { |
| 302 | pins { |
| 303 | pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */ |
| 304 | <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */ |
| 305 | }; |
| 306 | }; |
| 307 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 308 | /omit-if-no-ref/ |
| 309 | i2c5_pins_b: i2c5-1 { |
| 310 | pins { |
| 311 | pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */ |
| 312 | <STM32_PINMUX('E', 13, AF4)>; /* I2C5_SDA */ |
| 313 | bias-disable; |
| 314 | drive-open-drain; |
| 315 | slew-rate = <0>; |
| 316 | }; |
| 317 | }; |
| 318 | |
| 319 | /omit-if-no-ref/ |
| 320 | i2c5_sleep_pins_b: i2c5-sleep-1 { |
| 321 | pins { |
| 322 | pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */ |
| 323 | <STM32_PINMUX('E', 13, ANALOG)>; /* I2C5_SDA */ |
| 324 | }; |
| 325 | }; |
| 326 | |
| 327 | /omit-if-no-ref/ |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 328 | ltdc_pins_a: ltdc-0 { |
| 329 | pins { |
| 330 | pinmux = <STM32_PINMUX('D', 9, AF13)>, /* LCD_CLK */ |
| 331 | <STM32_PINMUX('C', 6, AF14)>, /* LCD_HSYNC */ |
| 332 | <STM32_PINMUX('G', 4, AF11)>, /* LCD_VSYNC */ |
| 333 | <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */ |
| 334 | <STM32_PINMUX('G', 7, AF14)>, /* LCD_R2 */ |
| 335 | <STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */ |
| 336 | <STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */ |
| 337 | <STM32_PINMUX('E', 7, AF14)>, /* LCD_R5 */ |
| 338 | <STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */ |
| 339 | <STM32_PINMUX('E', 9, AF14)>, /* LCD_R7 */ |
| 340 | <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ |
| 341 | <STM32_PINMUX('F', 3, AF14)>, /* LCD_G3 */ |
| 342 | <STM32_PINMUX('D', 5, AF14)>, /* LCD_G4 */ |
| 343 | <STM32_PINMUX('G', 0, AF14)>, /* LCD_G5 */ |
| 344 | <STM32_PINMUX('C', 7, AF14)>, /* LCD_G6 */ |
| 345 | <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */ |
| 346 | <STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */ |
| 347 | <STM32_PINMUX('F', 2, AF14)>, /* LCD_B3 */ |
| 348 | <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */ |
| 349 | <STM32_PINMUX('E', 0, AF14)>, /* LCD_B5 */ |
| 350 | <STM32_PINMUX('B', 6, AF7)>, /* LCD_B6 */ |
| 351 | <STM32_PINMUX('F', 1, AF13)>; /* LCD_B7 */ |
| 352 | bias-disable; |
| 353 | drive-push-pull; |
| 354 | slew-rate = <0>; |
| 355 | }; |
| 356 | }; |
| 357 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 358 | /omit-if-no-ref/ |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 359 | ltdc_sleep_pins_a: ltdc-sleep-0 { |
| 360 | pins { |
| 361 | pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_CLK */ |
| 362 | <STM32_PINMUX('C', 6, ANALOG)>, /* LCD_HSYNC */ |
| 363 | <STM32_PINMUX('G', 4, ANALOG)>, /* LCD_VSYNC */ |
| 364 | <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */ |
| 365 | <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_R2 */ |
| 366 | <STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */ |
| 367 | <STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */ |
| 368 | <STM32_PINMUX('E', 7, ANALOG)>, /* LCD_R5 */ |
| 369 | <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */ |
| 370 | <STM32_PINMUX('E', 9, ANALOG)>, /* LCD_R7 */ |
| 371 | <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ |
| 372 | <STM32_PINMUX('F', 3, ANALOG)>, /* LCD_G3 */ |
| 373 | <STM32_PINMUX('D', 5, ANALOG)>, /* LCD_G4 */ |
| 374 | <STM32_PINMUX('G', 0, ANALOG)>, /* LCD_G5 */ |
| 375 | <STM32_PINMUX('C', 7, ANALOG)>, /* LCD_G6 */ |
| 376 | <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */ |
| 377 | <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */ |
| 378 | <STM32_PINMUX('F', 2, ANALOG)>, /* LCD_B3 */ |
| 379 | <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */ |
| 380 | <STM32_PINMUX('E', 0, ANALOG)>, /* LCD_B5 */ |
| 381 | <STM32_PINMUX('B', 6, ANALOG)>, /* LCD_B6 */ |
| 382 | <STM32_PINMUX('F', 1, ANALOG)>; /* LCD_B7 */ |
| 383 | }; |
| 384 | }; |
| 385 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 386 | /omit-if-no-ref/ |
| 387 | m_can1_pins_a: m-can1-0 { |
| 388 | pins1 { |
| 389 | pinmux = <STM32_PINMUX('G', 10, AF9)>; /* CAN1_TX */ |
| 390 | slew-rate = <1>; |
| 391 | drive-push-pull; |
| 392 | bias-disable; |
| 393 | }; |
| 394 | pins2 { |
| 395 | pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ |
| 396 | bias-disable; |
| 397 | }; |
| 398 | }; |
| 399 | |
| 400 | /omit-if-no-ref/ |
| 401 | m_can1_sleep_pins_a: m_can1-sleep-0 { |
| 402 | pins { |
| 403 | pinmux = <STM32_PINMUX('G', 10, ANALOG)>, /* CAN1_TX */ |
| 404 | <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */ |
| 405 | }; |
| 406 | }; |
| 407 | |
| 408 | /omit-if-no-ref/ |
| 409 | m_can2_pins_a: m-can2-0 { |
| 410 | pins1 { |
| 411 | pinmux = <STM32_PINMUX('G', 0, AF9)>; /* CAN2_TX */ |
| 412 | slew-rate = <1>; |
| 413 | drive-push-pull; |
| 414 | bias-disable; |
| 415 | }; |
| 416 | pins2 { |
| 417 | pinmux = <STM32_PINMUX('E', 0, AF9)>; /* CAN2_RX */ |
| 418 | bias-disable; |
| 419 | }; |
| 420 | }; |
| 421 | |
| 422 | /omit-if-no-ref/ |
| 423 | m_can2_sleep_pins_a: m_can2-sleep-0 { |
| 424 | pins { |
| 425 | pinmux = <STM32_PINMUX('G', 0, ANALOG)>, /* CAN2_TX */ |
| 426 | <STM32_PINMUX('E', 0, ANALOG)>; /* CAN2_RX */ |
| 427 | }; |
| 428 | }; |
| 429 | |
| 430 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 431 | mcp23017_pins_a: mcp23017-0 { |
| 432 | pins { |
| 433 | pinmux = <STM32_PINMUX('G', 12, GPIO)>; |
| 434 | bias-pull-up; |
| 435 | }; |
| 436 | }; |
| 437 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 438 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 439 | pwm3_pins_a: pwm3-0 { |
| 440 | pins { |
| 441 | pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */ |
| 442 | bias-pull-down; |
| 443 | drive-push-pull; |
| 444 | slew-rate = <0>; |
| 445 | }; |
| 446 | }; |
| 447 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 448 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 449 | pwm3_sleep_pins_a: pwm3-sleep-0 { |
| 450 | pins { |
| 451 | pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */ |
| 452 | }; |
| 453 | }; |
| 454 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 455 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 456 | pwm4_pins_a: pwm4-0 { |
| 457 | pins { |
| 458 | pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */ |
| 459 | bias-pull-down; |
| 460 | drive-push-pull; |
| 461 | slew-rate = <0>; |
| 462 | }; |
| 463 | }; |
| 464 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 465 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 466 | pwm4_sleep_pins_a: pwm4-sleep-0 { |
| 467 | pins { |
| 468 | pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */ |
| 469 | }; |
| 470 | }; |
| 471 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 472 | /omit-if-no-ref/ |
| 473 | pwm5_pins_a: pwm5-0 { |
| 474 | pins { |
| 475 | pinmux = <STM32_PINMUX('H', 12, AF2)>; /* TIM5_CH3 */ |
| 476 | bias-pull-down; |
| 477 | drive-push-pull; |
| 478 | slew-rate = <0>; |
| 479 | }; |
| 480 | }; |
| 481 | |
| 482 | /omit-if-no-ref/ |
| 483 | pwm5_sleep_pins_a: pwm5-sleep-0 { |
| 484 | pins { |
| 485 | pinmux = <STM32_PINMUX('H', 12, ANALOG)>; /* TIM5_CH3 */ |
| 486 | }; |
| 487 | }; |
| 488 | |
| 489 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 490 | pwm8_pins_a: pwm8-0 { |
| 491 | pins { |
| 492 | pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */ |
| 493 | bias-pull-down; |
| 494 | drive-push-pull; |
| 495 | slew-rate = <0>; |
| 496 | }; |
| 497 | }; |
| 498 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 499 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 500 | pwm8_sleep_pins_a: pwm8-sleep-0 { |
| 501 | pins { |
| 502 | pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */ |
| 503 | }; |
| 504 | }; |
| 505 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 506 | /omit-if-no-ref/ |
| 507 | pwm13_pins_a: pwm13-0 { |
| 508 | pins { |
| 509 | pinmux = <STM32_PINMUX('A', 6, AF9)>; /* TIM13_CH1 */ |
| 510 | bias-pull-down; |
| 511 | drive-push-pull; |
| 512 | slew-rate = <0>; |
| 513 | }; |
| 514 | }; |
| 515 | |
| 516 | /omit-if-no-ref/ |
| 517 | pwm13_sleep_pins_a: pwm13-sleep-0 { |
| 518 | pins { |
| 519 | pinmux = <STM32_PINMUX('A', 6, ANALOG)>; /* TIM13_CH1 */ |
| 520 | }; |
| 521 | }; |
| 522 | |
| 523 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 524 | pwm14_pins_a: pwm14-0 { |
| 525 | pins { |
| 526 | pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */ |
| 527 | bias-pull-down; |
| 528 | drive-push-pull; |
| 529 | slew-rate = <0>; |
| 530 | }; |
| 531 | }; |
| 532 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 533 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 534 | pwm14_sleep_pins_a: pwm14-sleep-0 { |
| 535 | pins { |
| 536 | pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */ |
| 537 | }; |
| 538 | }; |
| 539 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 540 | /omit-if-no-ref/ |
| 541 | qspi_clk_pins_a: qspi-clk-0 { |
| 542 | pins { |
| 543 | pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */ |
| 544 | bias-disable; |
| 545 | drive-push-pull; |
| 546 | slew-rate = <3>; |
| 547 | }; |
| 548 | }; |
| 549 | |
| 550 | /omit-if-no-ref/ |
| 551 | qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { |
| 552 | pins { |
| 553 | pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */ |
| 554 | }; |
| 555 | }; |
| 556 | |
| 557 | /omit-if-no-ref/ |
| 558 | qspi_bk1_pins_a: qspi-bk1-0 { |
| 559 | pins { |
| 560 | pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ |
| 561 | <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */ |
| 562 | <STM32_PINMUX('D', 11, AF9)>, /* QSPI_BK1_IO2 */ |
| 563 | <STM32_PINMUX('H', 7, AF13)>; /* QSPI_BK1_IO3 */ |
| 564 | bias-disable; |
| 565 | drive-push-pull; |
| 566 | slew-rate = <1>; |
| 567 | }; |
| 568 | }; |
| 569 | |
| 570 | /omit-if-no-ref/ |
| 571 | qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { |
| 572 | pins { |
| 573 | pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */ |
| 574 | <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */ |
| 575 | <STM32_PINMUX('D', 11, ANALOG)>, /* QSPI_BK1_IO2 */ |
| 576 | <STM32_PINMUX('H', 7, ANALOG)>; /* QSPI_BK1_IO3 */ |
| 577 | }; |
| 578 | }; |
| 579 | |
| 580 | /omit-if-no-ref/ |
| 581 | qspi_cs1_pins_a: qspi-cs1-0 { |
| 582 | pins { |
| 583 | pinmux = <STM32_PINMUX('B', 2, AF9)>; /* QSPI_BK1_NCS */ |
| 584 | bias-pull-up; |
| 585 | drive-push-pull; |
| 586 | slew-rate = <1>; |
| 587 | }; |
| 588 | }; |
| 589 | |
| 590 | /omit-if-no-ref/ |
| 591 | qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { |
| 592 | pins { |
| 593 | pinmux = <STM32_PINMUX('B', 2, ANALOG)>; /* QSPI_BK1_NCS */ |
| 594 | }; |
| 595 | }; |
| 596 | |
| 597 | /omit-if-no-ref/ |
Tom Rini | 844493d | 2025-01-26 16:17:47 -0600 | [diff] [blame] | 598 | rtc_rsvd_pins_a: rtc-rsvd-0 { |
| 599 | pins { |
| 600 | pinmux = <STM32_PINMUX('I', 1, ANALOG)>; /* RTC_OUT2_RMP */ |
| 601 | }; |
| 602 | }; |
| 603 | |
| 604 | /omit-if-no-ref/ |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 605 | sai1a_pins_a: sai1a-0 { |
| 606 | pins { |
| 607 | pinmux = <STM32_PINMUX('A', 4, AF12)>, /* SAI1_SCK_A */ |
| 608 | <STM32_PINMUX('D', 6, AF6)>, /* SAI1_SD_A */ |
| 609 | <STM32_PINMUX('E', 11, AF6)>; /* SAI1_FS_A */ |
| 610 | slew-rate = <0>; |
| 611 | drive-push-pull; |
| 612 | bias-disable; |
| 613 | }; |
| 614 | }; |
| 615 | |
| 616 | /omit-if-no-ref/ |
| 617 | sai1a_sleep_pins_a: sai1a-sleep-0 { |
| 618 | pins { |
| 619 | pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* SAI1_SCK_A */ |
| 620 | <STM32_PINMUX('D', 6, ANALOG)>, /* SAI1_SD_A */ |
| 621 | <STM32_PINMUX('E', 11, ANALOG)>; /* SAI1_FS_A */ |
| 622 | }; |
| 623 | }; |
| 624 | |
| 625 | /omit-if-no-ref/ |
| 626 | sai1b_pins_a: sai1b-0 { |
| 627 | pins { |
| 628 | pinmux = <STM32_PINMUX('A', 0, AF6)>; /* SAI1_SD_B */ |
| 629 | bias-disable; |
| 630 | }; |
| 631 | }; |
| 632 | |
| 633 | /omit-if-no-ref/ |
| 634 | sai1b_sleep_pins_a: sai1b-sleep-0 { |
| 635 | pins { |
| 636 | pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* SAI1_SD_B */ |
| 637 | }; |
| 638 | }; |
| 639 | |
| 640 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 641 | sdmmc1_b4_pins_a: sdmmc1-b4-0 { |
| 642 | pins { |
| 643 | pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ |
| 644 | <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ |
| 645 | <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ |
| 646 | <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ |
| 647 | <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ |
| 648 | slew-rate = <1>; |
| 649 | drive-push-pull; |
| 650 | bias-disable; |
| 651 | }; |
| 652 | }; |
| 653 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 654 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 655 | sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { |
| 656 | pins1 { |
| 657 | pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ |
| 658 | <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ |
| 659 | <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ |
| 660 | <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ |
| 661 | slew-rate = <1>; |
| 662 | drive-push-pull; |
| 663 | bias-disable; |
| 664 | }; |
| 665 | pins2 { |
| 666 | pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ |
| 667 | slew-rate = <1>; |
| 668 | drive-open-drain; |
| 669 | bias-disable; |
| 670 | }; |
| 671 | }; |
| 672 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 673 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 674 | sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { |
| 675 | pins { |
| 676 | pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ |
| 677 | <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ |
| 678 | <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ |
| 679 | <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ |
| 680 | <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ |
| 681 | <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ |
| 682 | }; |
| 683 | }; |
| 684 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 685 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 686 | sdmmc1_clk_pins_a: sdmmc1-clk-0 { |
| 687 | pins { |
| 688 | pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ |
| 689 | slew-rate = <1>; |
| 690 | drive-push-pull; |
| 691 | bias-disable; |
| 692 | }; |
| 693 | }; |
| 694 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 695 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 696 | sdmmc2_b4_pins_a: sdmmc2-b4-0 { |
| 697 | pins { |
| 698 | pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ |
| 699 | <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ |
| 700 | <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ |
| 701 | <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */ |
| 702 | <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ |
| 703 | slew-rate = <1>; |
| 704 | drive-push-pull; |
| 705 | bias-pull-up; |
| 706 | }; |
| 707 | }; |
| 708 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 709 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 710 | sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { |
| 711 | pins1 { |
| 712 | pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ |
| 713 | <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ |
| 714 | <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ |
| 715 | <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */ |
| 716 | slew-rate = <1>; |
| 717 | drive-push-pull; |
| 718 | bias-pull-up; |
| 719 | }; |
| 720 | pins2 { |
| 721 | pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ |
| 722 | slew-rate = <1>; |
| 723 | drive-open-drain; |
| 724 | bias-pull-up; |
| 725 | }; |
| 726 | }; |
| 727 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 728 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 729 | sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { |
| 730 | pins { |
| 731 | pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ |
| 732 | <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ |
| 733 | <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ |
| 734 | <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ |
| 735 | <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ |
| 736 | <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ |
| 737 | }; |
| 738 | }; |
| 739 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 740 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 741 | sdmmc2_clk_pins_a: sdmmc2-clk-0 { |
| 742 | pins { |
| 743 | pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */ |
| 744 | slew-rate = <1>; |
| 745 | drive-push-pull; |
| 746 | bias-pull-up; |
| 747 | }; |
| 748 | }; |
| 749 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 750 | /omit-if-no-ref/ |
| 751 | sdmmc2_d47_pins_a: sdmmc2-d47-0 { |
| 752 | pins { |
| 753 | pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */ |
| 754 | <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */ |
| 755 | <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ |
| 756 | <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ |
| 757 | slew-rate = <1>; |
| 758 | drive-push-pull; |
| 759 | bias-pull-up; |
| 760 | }; |
| 761 | }; |
| 762 | |
| 763 | /omit-if-no-ref/ |
| 764 | sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { |
| 765 | pins { |
| 766 | pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC2_D4 */ |
| 767 | <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */ |
| 768 | <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ |
| 769 | <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ |
| 770 | }; |
| 771 | }; |
| 772 | |
| 773 | /omit-if-no-ref/ |
| 774 | spi2_pins_a: spi2-0 { |
| 775 | pins1 { |
| 776 | pinmux = <STM32_PINMUX('B', 10, AF6)>, /* SPI2_SCK */ |
| 777 | <STM32_PINMUX('H', 10, AF6)>; /* SPI2_MOSI */ |
| 778 | bias-disable; |
| 779 | drive-push-pull; |
| 780 | slew-rate = <1>; |
| 781 | }; |
| 782 | |
| 783 | pins2 { |
| 784 | pinmux = <STM32_PINMUX('B', 5, AF5)>; /* SPI2_MISO */ |
| 785 | bias-disable; |
| 786 | }; |
| 787 | }; |
| 788 | |
| 789 | /omit-if-no-ref/ |
| 790 | spi2_sleep_pins_a: spi2-sleep-0 { |
| 791 | pins { |
| 792 | pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* SPI2_SCK */ |
| 793 | <STM32_PINMUX('B', 5, ANALOG)>, /* SPI2_MISO */ |
| 794 | <STM32_PINMUX('H', 10, ANALOG)>; /* SPI2_MOSI */ |
| 795 | }; |
| 796 | }; |
| 797 | |
| 798 | /omit-if-no-ref/ |
| 799 | spi3_pins_a: spi3-0 { |
| 800 | pins1 { |
| 801 | pinmux = <STM32_PINMUX('H', 13, AF6)>, /* SPI3_SCK */ |
| 802 | <STM32_PINMUX('F', 1, AF5)>; /* SPI3_MOSI */ |
| 803 | bias-disable; |
| 804 | drive-push-pull; |
| 805 | slew-rate = <1>; |
| 806 | }; |
| 807 | |
| 808 | pins2 { |
| 809 | pinmux = <STM32_PINMUX('D', 4, AF5)>; /* SPI3_MISO */ |
| 810 | bias-disable; |
| 811 | }; |
| 812 | }; |
| 813 | |
| 814 | /omit-if-no-ref/ |
| 815 | spi3_sleep_pins_a: spi3-sleep-0 { |
| 816 | pins { |
| 817 | pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* SPI3_SCK */ |
| 818 | <STM32_PINMUX('D', 4, ANALOG)>, /* SPI3_MISO */ |
| 819 | <STM32_PINMUX('F', 1, ANALOG)>; /* SPI3_MOSI */ |
| 820 | }; |
| 821 | }; |
| 822 | |
| 823 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 824 | spi5_pins_a: spi5-0 { |
| 825 | pins1 { |
| 826 | pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */ |
| 827 | <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */ |
| 828 | bias-disable; |
| 829 | drive-push-pull; |
| 830 | slew-rate = <1>; |
| 831 | }; |
| 832 | |
| 833 | pins2 { |
| 834 | pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */ |
| 835 | bias-disable; |
| 836 | }; |
| 837 | }; |
| 838 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 839 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 840 | spi5_sleep_pins_a: spi5-sleep-0 { |
| 841 | pins { |
| 842 | pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */ |
| 843 | <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */ |
| 844 | <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */ |
| 845 | }; |
| 846 | }; |
| 847 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 848 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 849 | stm32g0_intn_pins_a: stm32g0-intn-0 { |
| 850 | pins { |
| 851 | pinmux = <STM32_PINMUX('I', 2, GPIO)>; |
| 852 | bias-pull-up; |
| 853 | }; |
| 854 | }; |
| 855 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 856 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 857 | uart4_pins_a: uart4-0 { |
| 858 | pins1 { |
| 859 | pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */ |
| 860 | bias-disable; |
| 861 | drive-push-pull; |
| 862 | slew-rate = <0>; |
| 863 | }; |
| 864 | pins2 { |
| 865 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 866 | bias-disable; |
| 867 | }; |
| 868 | }; |
| 869 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 870 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 871 | uart4_idle_pins_a: uart4-idle-0 { |
| 872 | pins1 { |
| 873 | pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */ |
| 874 | }; |
| 875 | pins2 { |
| 876 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 877 | bias-disable; |
| 878 | }; |
| 879 | }; |
| 880 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 881 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 882 | uart4_sleep_pins_a: uart4-sleep-0 { |
| 883 | pins { |
| 884 | pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */ |
| 885 | <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */ |
| 886 | }; |
| 887 | }; |
| 888 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 889 | /omit-if-no-ref/ |
| 890 | uart4_pins_b: uart4-1 { |
| 891 | pins1 { |
| 892 | pinmux = <STM32_PINMUX('A', 9, AF8)>; /* UART4_TX */ |
| 893 | bias-disable; |
| 894 | drive-push-pull; |
| 895 | slew-rate = <0>; |
| 896 | }; |
| 897 | pins2 { |
| 898 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 899 | bias-pull-up; |
| 900 | }; |
| 901 | }; |
| 902 | |
| 903 | /omit-if-no-ref/ |
| 904 | uart4_idle_pins_b: uart4-idle-1 { |
| 905 | pins1 { |
| 906 | pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* UART4_TX */ |
| 907 | }; |
| 908 | pins2 { |
| 909 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 910 | bias-pull-up; |
| 911 | }; |
| 912 | }; |
| 913 | |
| 914 | /omit-if-no-ref/ |
| 915 | uart4_sleep_pins_b: uart4-sleep-1 { |
| 916 | pins { |
| 917 | pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* UART4_TX */ |
| 918 | <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */ |
| 919 | }; |
| 920 | }; |
| 921 | |
| 922 | /omit-if-no-ref/ |
| 923 | uart7_pins_a: uart7-0 { |
| 924 | pins1 { |
| 925 | pinmux = <STM32_PINMUX('H', 2, AF8)>, /* UART7_TX */ |
| 926 | <STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */ |
| 927 | bias-disable; |
| 928 | drive-push-pull; |
| 929 | slew-rate = <0>; |
| 930 | }; |
| 931 | pins2 { |
| 932 | pinmux = <STM32_PINMUX('E', 10, AF7)>, /* UART7_RX */ |
| 933 | <STM32_PINMUX('G', 7, AF8)>; /* UART7_CTS_NSS */ |
| 934 | bias-disable; |
| 935 | }; |
| 936 | }; |
| 937 | |
| 938 | /omit-if-no-ref/ |
| 939 | uart7_idle_pins_a: uart7-idle-0 { |
| 940 | pins1 { |
| 941 | pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */ |
| 942 | <STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */ |
| 943 | }; |
| 944 | pins2 { |
| 945 | pinmux = <STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */ |
| 946 | bias-disable; |
| 947 | drive-push-pull; |
| 948 | slew-rate = <0>; |
| 949 | }; |
| 950 | pins3 { |
| 951 | pinmux = <STM32_PINMUX('E', 10, AF7)>; /* UART7_RX */ |
| 952 | bias-disable; |
| 953 | }; |
| 954 | }; |
| 955 | |
| 956 | /omit-if-no-ref/ |
| 957 | uart7_sleep_pins_a: uart7-sleep-0 { |
| 958 | pins { |
| 959 | pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */ |
| 960 | <STM32_PINMUX('B', 12, ANALOG)>, /* UART7_RTS */ |
| 961 | <STM32_PINMUX('E', 10, ANALOG)>, /* UART7_RX */ |
| 962 | <STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */ |
| 963 | }; |
| 964 | }; |
| 965 | |
| 966 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 967 | uart8_pins_a: uart8-0 { |
| 968 | pins1 { |
| 969 | pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ |
| 970 | bias-disable; |
| 971 | drive-push-pull; |
| 972 | slew-rate = <0>; |
| 973 | }; |
| 974 | pins2 { |
| 975 | pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */ |
| 976 | bias-pull-up; |
| 977 | }; |
| 978 | }; |
| 979 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 980 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 981 | uart8_idle_pins_a: uart8-idle-0 { |
| 982 | pins1 { |
| 983 | pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */ |
| 984 | }; |
| 985 | pins2 { |
| 986 | pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */ |
| 987 | bias-pull-up; |
| 988 | }; |
| 989 | }; |
| 990 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 991 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 992 | uart8_sleep_pins_a: uart8-sleep-0 { |
| 993 | pins { |
| 994 | pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */ |
| 995 | <STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */ |
| 996 | }; |
| 997 | }; |
| 998 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 999 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1000 | usart1_pins_a: usart1-0 { |
| 1001 | pins1 { |
| 1002 | pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */ |
| 1003 | <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */ |
| 1004 | bias-disable; |
| 1005 | drive-push-pull; |
| 1006 | slew-rate = <0>; |
| 1007 | }; |
| 1008 | pins2 { |
| 1009 | pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */ |
| 1010 | <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */ |
| 1011 | bias-pull-up; |
| 1012 | }; |
| 1013 | }; |
| 1014 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1015 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1016 | usart1_idle_pins_a: usart1-idle-0 { |
| 1017 | pins1 { |
| 1018 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */ |
| 1019 | <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */ |
| 1020 | }; |
| 1021 | pins2 { |
| 1022 | pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */ |
| 1023 | bias-disable; |
| 1024 | drive-push-pull; |
| 1025 | slew-rate = <0>; |
| 1026 | }; |
| 1027 | pins3 { |
| 1028 | pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */ |
| 1029 | bias-pull-up; |
| 1030 | }; |
| 1031 | }; |
| 1032 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1033 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1034 | usart1_sleep_pins_a: usart1-sleep-0 { |
| 1035 | pins { |
| 1036 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */ |
| 1037 | <STM32_PINMUX('C', 2, ANALOG)>, /* USART1_RTS */ |
| 1038 | <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */ |
| 1039 | <STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */ |
| 1040 | }; |
| 1041 | }; |
| 1042 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1043 | /omit-if-no-ref/ |
| 1044 | usart1_pins_b: usart1-1 { |
| 1045 | pins1 { |
| 1046 | pinmux = <STM32_PINMUX('C', 0, AF7)>; /* USART1_TX */ |
| 1047 | bias-disable; |
| 1048 | drive-push-pull; |
| 1049 | slew-rate = <0>; |
| 1050 | }; |
| 1051 | pins2 { |
| 1052 | pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */ |
| 1053 | bias-pull-up; |
| 1054 | }; |
| 1055 | }; |
| 1056 | |
| 1057 | /omit-if-no-ref/ |
| 1058 | usart1_idle_pins_b: usart1-idle-1 { |
| 1059 | pins1 { |
| 1060 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* USART1_TX */ |
| 1061 | }; |
| 1062 | pins2 { |
| 1063 | pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */ |
| 1064 | bias-pull-up; |
| 1065 | }; |
| 1066 | }; |
| 1067 | |
| 1068 | /omit-if-no-ref/ |
| 1069 | usart1_sleep_pins_b: usart1-sleep-1 { |
| 1070 | pins { |
| 1071 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */ |
| 1072 | <STM32_PINMUX('D', 14, ANALOG)>; /* USART1_RX */ |
| 1073 | }; |
| 1074 | }; |
| 1075 | |
| 1076 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1077 | usart2_pins_a: usart2-0 { |
| 1078 | pins1 { |
| 1079 | pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */ |
| 1080 | <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */ |
| 1081 | bias-disable; |
| 1082 | drive-push-pull; |
| 1083 | slew-rate = <0>; |
| 1084 | }; |
| 1085 | pins2 { |
| 1086 | pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */ |
| 1087 | <STM32_PINMUX('E', 11, AF2)>; /* USART2_CTS_NSS */ |
| 1088 | bias-disable; |
| 1089 | }; |
| 1090 | }; |
| 1091 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1092 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1093 | usart2_idle_pins_a: usart2-idle-0 { |
| 1094 | pins1 { |
| 1095 | pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */ |
| 1096 | <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */ |
| 1097 | }; |
| 1098 | pins2 { |
| 1099 | pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */ |
| 1100 | bias-disable; |
| 1101 | drive-push-pull; |
| 1102 | slew-rate = <0>; |
| 1103 | }; |
| 1104 | pins3 { |
| 1105 | pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */ |
| 1106 | bias-disable; |
| 1107 | }; |
| 1108 | }; |
| 1109 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1110 | /omit-if-no-ref/ |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1111 | usart2_sleep_pins_a: usart2-sleep-0 { |
| 1112 | pins { |
| 1113 | pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */ |
| 1114 | <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ |
| 1115 | <STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */ |
| 1116 | <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */ |
| 1117 | }; |
| 1118 | }; |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1119 | |
| 1120 | /omit-if-no-ref/ |
| 1121 | usart2_pins_b: usart2-1 { |
| 1122 | pins1 { |
| 1123 | pinmux = <STM32_PINMUX('F', 11, AF1)>, /* USART2_TX */ |
| 1124 | <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */ |
| 1125 | bias-disable; |
| 1126 | drive-push-pull; |
| 1127 | slew-rate = <0>; |
| 1128 | }; |
| 1129 | pins2 { |
| 1130 | pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */ |
| 1131 | <STM32_PINMUX('E', 15, AF3)>; /* USART2_CTS_NSS */ |
| 1132 | bias-disable; |
| 1133 | }; |
| 1134 | }; |
| 1135 | |
| 1136 | /omit-if-no-ref/ |
| 1137 | usart2_idle_pins_b: usart2-idle-1 { |
| 1138 | pins1 { |
| 1139 | pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */ |
| 1140 | <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */ |
| 1141 | }; |
| 1142 | pins2 { |
| 1143 | pinmux = <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */ |
| 1144 | bias-disable; |
| 1145 | drive-push-pull; |
| 1146 | slew-rate = <0>; |
| 1147 | }; |
| 1148 | pins3 { |
| 1149 | pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */ |
| 1150 | bias-disable; |
| 1151 | }; |
| 1152 | }; |
| 1153 | |
| 1154 | /omit-if-no-ref/ |
| 1155 | usart2_sleep_pins_b: usart2-sleep-1 { |
| 1156 | pins { |
| 1157 | pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */ |
| 1158 | <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */ |
| 1159 | <STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */ |
| 1160 | <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */ |
| 1161 | }; |
| 1162 | }; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1163 | }; |