blob: 386371c816f4d1f2566661e5dd7d02c498ed269b [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright 2011 Freescale Semiconductor, Inc.
4// Copyright 2011 Linaro Ltd.
5
6/dts-v1/;
7#include <dt-bindings/input/input.h>
8#include "imx53.dtsi"
9
10/ {
11 model = "Freescale i.MX53 Smart Mobile Reference Design Board";
12 compatible = "fsl,imx53-smd", "fsl,imx53";
13
14 memory@70000000 {
15 device_type = "memory";
16 reg = <0x70000000 0x40000000>;
17 };
18
19 gpio-keys {
20 compatible = "gpio-keys";
21
22 key-volume-up {
23 label = "Volume Up";
24 gpios = <&gpio2 14 0>;
25 linux,code = <KEY_VOLUMEUP>;
26 };
27
28 key-volume-down {
29 label = "Volume Down";
30 gpios = <&gpio2 15 0>;
31 linux,code = <KEY_VOLUMEDOWN>;
32 };
33 };
34};
35
36&esdhc1 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_esdhc1>;
39 cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
40 wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
41 status = "okay";
42};
43
44&esdhc2 {
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_esdhc2>;
47 non-removable;
48 status = "okay";
49};
50
51&uart3 {
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_uart3>;
54 uart-has-rtscts;
55 status = "okay";
56};
57
58&ecspi1 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_ecspi1>;
61 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>;
62 status = "okay";
63
64 zigbee: mc1323@0 {
65 compatible = "fsl,mc1323";
66 spi-max-frequency = <8000000>;
67 reg = <0>;
68 };
69
70 flash: flash@1 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 compatible = "st,m25p32", "jedec,spi-nor";
74 spi-max-frequency = <20000000>;
75 reg = <1>;
76
77 partition@0 {
78 label = "U-Boot";
79 reg = <0x0 0x40000>;
80 read-only;
81 };
82
83 partition@40000 {
84 label = "Kernel";
85 reg = <0x40000 0x3c0000>;
86 };
87 };
88};
89
90&esdhc3 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_esdhc3>;
93 non-removable;
94 status = "okay";
95};
96
97&iomuxc {
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_hog>;
100
Tom Rini844493d2025-01-26 16:17:47 -0600101 pinctrl_hog: hoggrp {
102 fsl,pins = <
103 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
104 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
105 MX53_PAD_EIM_EB2__GPIO2_30 0x80000000
106 MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
107 MX53_PAD_EIM_D19__GPIO3_19 0x80000000
108 MX53_PAD_KEY_ROW2__GPIO4_11 0x80000000
109 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
110 >;
111 };
Tom Rini53633a82024-02-29 12:33:36 -0500112
Tom Rini844493d2025-01-26 16:17:47 -0600113 pinctrl_ecspi1: ecspi1grp {
114 fsl,pins = <
115 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
116 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
117 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
118 >;
119 };
Tom Rini53633a82024-02-29 12:33:36 -0500120
Tom Rini844493d2025-01-26 16:17:47 -0600121 pinctrl_esdhc1: esdhc1grp {
122 fsl,pins = <
123 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
124 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
125 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
126 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
127 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
128 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
129 >;
130 };
Tom Rini53633a82024-02-29 12:33:36 -0500131
Tom Rini844493d2025-01-26 16:17:47 -0600132 pinctrl_esdhc2: esdhc2grp {
133 fsl,pins = <
134 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
135 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
136 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
137 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
138 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
139 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
140 >;
141 };
Tom Rini53633a82024-02-29 12:33:36 -0500142
Tom Rini844493d2025-01-26 16:17:47 -0600143 pinctrl_esdhc3: esdhc3grp {
144 fsl,pins = <
145 MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
146 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
147 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
148 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
149 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
150 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
151 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
152 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
153 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
154 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
155 >;
156 };
Tom Rini53633a82024-02-29 12:33:36 -0500157
Tom Rini844493d2025-01-26 16:17:47 -0600158 pinctrl_fec: fecgrp {
159 fsl,pins = <
160 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
161 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
162 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
163 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
164 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
165 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
166 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
167 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
168 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
169 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
170 >;
171 };
Tom Rini53633a82024-02-29 12:33:36 -0500172
Tom Rini844493d2025-01-26 16:17:47 -0600173 pinctrl_i2c1: i2c1grp {
174 fsl,pins = <
175 MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000
176 MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000
177 >;
178 };
Tom Rini53633a82024-02-29 12:33:36 -0500179
Tom Rini844493d2025-01-26 16:17:47 -0600180 pinctrl_i2c2: i2c2grp {
181 fsl,pins = <
182 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
183 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
184 >;
185 };
Tom Rini53633a82024-02-29 12:33:36 -0500186
Tom Rini844493d2025-01-26 16:17:47 -0600187 pinctrl_ipu_csi0: ipucsi0grp {
188 fsl,pins = <
189 MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1c4
190 MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1c4
191 MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1c4
192 MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1c4
193 MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1c4
194 MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1c4
195 MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1c4
196 MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1c4
197 MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4
198 MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1e4
199 MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1e4
200 MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4
201 >;
202 };
Tom Rini53633a82024-02-29 12:33:36 -0500203
Tom Rini844493d2025-01-26 16:17:47 -0600204 pinctrl_ov5642: ov5642grp {
205 fsl,pins = <
206 MX53_PAD_NANDF_WP_B__GPIO6_9 0x1e4
207 MX53_PAD_NANDF_RB0__GPIO6_10 0x1e4
208 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
209 >;
210 };
Tom Rini53633a82024-02-29 12:33:36 -0500211
Tom Rini844493d2025-01-26 16:17:47 -0600212 pinctrl_uart1: uart1grp {
213 fsl,pins = <
214 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
215 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
216 >;
217 };
Tom Rini53633a82024-02-29 12:33:36 -0500218
Tom Rini844493d2025-01-26 16:17:47 -0600219 pinctrl_uart2: uart2grp {
220 fsl,pins = <
221 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
222 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
223 >;
224 };
Tom Rini53633a82024-02-29 12:33:36 -0500225
Tom Rini844493d2025-01-26 16:17:47 -0600226 pinctrl_uart3: uart3grp {
227 fsl,pins = <
228 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
229 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
230 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
231 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
232 >;
Tom Rini53633a82024-02-29 12:33:36 -0500233 };
234};
235
236&uart1 {
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_uart1>;
239 status = "okay";
240};
241
242&uart2 {
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_uart2>;
245 status = "okay";
246};
247
248&i2c2 {
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_i2c2>;
251 status = "okay";
252
253 codec: sgtl5000@a {
254 compatible = "fsl,sgtl5000";
255 reg = <0x0a>;
256 };
257
258 magnetometer: mag3110@e {
259 compatible = "fsl,mag3110";
260 reg = <0x0e>;
261 };
262
263 touchkey: mpr121@5a {
264 compatible = "fsl,mpr121";
265 reg = <0x5a>;
266 };
267};
268
269&i2c1 {
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_i2c1>;
272 status = "okay";
273
274 accelerometer: mma8450@1c {
275 compatible = "fsl,mma8450";
276 reg = <0x1c>;
277 };
278
279 camera: ov5642@3c {
280 compatible = "ovti,ov5642";
281 reg = <0x3c>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_ov5642>;
284 assigned-clocks = <&clks IMX5_CLK_SSI_EXT1_SEL>,
285 <&clks IMX5_CLK_SSI_EXT1_COM_SEL>;
286 assigned-clock-parents = <&clks IMX5_CLK_PLL2_SW>,
287 <&clks IMX5_CLK_SSI_EXT1_PODF>;
288 assigned-clock-rates = <0>, <24000000>;
289 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
290 clock-names = "xclk";
291 DVDD-supply = <&ldo9_reg>;
292 AVDD-supply = <&ldo7_reg>;
293 reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;
294 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
295
296 port {
297 ov5642_to_ipu_csi0: endpoint {
298 remote-endpoint = <&ipu_csi0_from_parallel_sensor>;
299 bus-width = <8>;
300 hsync-active = <1>;
301 vsync-active = <1>;
302 };
303 };
304 };
305
306 pmic: dialog@48 {
307 compatible = "dlg,da9053", "dlg,da9052";
308 reg = <0x48>;
309 interrupt-parent = <&gpio7>;
310 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
311
312 regulators {
313 ldo7_reg: ldo7 {
314 regulator-min-microvolt = <1200000>;
315 regulator-max-microvolt = <3600000>;
316 };
317
318 ldo9_reg: ldo9 {
319 regulator-min-microvolt = <1250000>;
320 regulator-max-microvolt = <3650000>;
321 };
322 };
323 };
324};
325
326&fec {
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_fec>;
329 phy-mode = "rmii";
330 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
331 status = "okay";
332};
333
334&ipu_csi0_from_parallel_sensor {
335 remote-endpoint = <&ov5642_to_ipu_csi0>;
336 data-shift = <12>; /* Lines 19:12 used */
337 hsync-active = <1>;
338 vsync-active = <1>;
339};
340
341&ipu_csi0 {
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_ipu_csi0>;
344};