blob: c14eb7280f09e62a3b1fcad5321e319fc9bd7910 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
4 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
5 */
6
7/dts-v1/;
8#include "imx53-tqma53.dtsi"
9
10/ {
11 model = "TQ MBa53 starter kit";
12 compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
13
14 chosen {
15 stdout-path = &uart2;
16 };
17
18 backlight {
19 compatible = "pwm-backlight";
Tom Rini762f85b2024-07-20 11:15:10 -060020 pwms = <&pwm2 0 50000 0>;
Tom Rini53633a82024-02-29 12:33:36 -050021 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
22 default-brightness-level = <10>;
23 enable-gpios = <&gpio7 7 0>;
24 power-supply = <&reg_backlight>;
25 };
26
27 disp1: disp1 {
28 compatible = "fsl,imx-parallel-display";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_disp1_1>;
31 interface-pix-fmt = "rgb24";
32 status = "disabled";
33
34 port {
35 display1_in: endpoint {
36 remote-endpoint = <&ipu_di1_disp1>;
37 };
38 };
39 };
40
41 reg_backlight: regulator-backlight {
42 compatible = "regulator-fixed";
43 regulator-name = "lcd-supply";
44 gpio = <&gpio2 5 0>;
45 startup-delay-us = <5000>;
46 };
47
48 reg_3p2v: regulator-3p2v {
49 compatible = "regulator-fixed";
50 regulator-name = "3P2V";
51 regulator-min-microvolt = <3200000>;
52 regulator-max-microvolt = <3200000>;
53 regulator-always-on;
54 };
55
56 sound {
57 compatible = "tq,imx53-mba53-sgtl5000",
58 "fsl,imx-audio-sgtl5000";
59 model = "imx53-mba53-sgtl5000";
60 ssi-controller = <&ssi2>;
61 audio-codec = <&codec>;
62 audio-routing =
63 "MIC_IN", "Mic Jack",
64 "Mic Jack", "Mic Bias",
65 "Headphone Jack", "HP_OUT";
66 mux-int-port = <2>;
67 mux-ext-port = <5>;
68 };
69};
70
71&ldb {
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_lvds1_1>;
74 status = "disabled";
75};
76
77&iomuxc {
Tom Rini844493d2025-01-26 16:17:47 -060078 pinctrl_lvds1_1: lvds1-1-grp {
79 fsl,pins = <
80 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
81 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
82 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
83 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
84 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
85 >;
86 };
Tom Rini53633a82024-02-29 12:33:36 -050087
Tom Rini844493d2025-01-26 16:17:47 -060088 pinctrl_lvds1_2: lvds1-2-grp {
89 fsl,pins = <
90 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
91 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
92 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
93 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
94 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
95 >;
Tom Rini53633a82024-02-29 12:33:36 -050096 };
97
Tom Rini844493d2025-01-26 16:17:47 -060098 pinctrl_disp1_1: disp1-1-grp {
99 fsl,pins = <
100 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */
101 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */
102 MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */
103 MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */
104 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000
105 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000
106 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000
107 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000
108 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000
109 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000
110 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000
111 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000
112 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000
113 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000
114 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000
115 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000
116 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000
117 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000
118 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000
119 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000
120 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000
121 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000
122 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000
123 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000
124 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000
125 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000
126 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000
127 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000
128 >;
Tom Rini53633a82024-02-29 12:33:36 -0500129 };
130
Tom Rini844493d2025-01-26 16:17:47 -0600131 pinctrl_vga_sync_1: vgasync-1-grp {
132 fsl,pins = <
133 /* VGA_VSYNC, HSYNC with max drive strength */
134 MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6
135 MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6
136 >;
Tom Rini53633a82024-02-29 12:33:36 -0500137 };
138};
139
140&ipu_di1_disp1 {
141 remote-endpoint = <&display1_in>;
142};
143
144&cspi {
145 status = "okay";
146};
147
148&audmux {
149 status = "okay";
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_audmux>;
152};
153
154&i2c2 {
155 codec: sgtl5000@a {
156 compatible = "fsl,sgtl5000";
157 reg = <0x0a>;
158 #sound-dai-cells = <0>;
159 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
160 VDDA-supply = <&reg_3p2v>;
161 VDDIO-supply = <&reg_3p2v>;
162 };
163
164 expander: pca9554@20 {
165 compatible = "pca9554";
166 reg = <0x20>;
167 interrupts = <109>;
168 #gpio-cells = <2>;
169 gpio-controller;
170 };
171
Tom Rini9c8af152024-12-24 12:03:04 -0600172 sensor2: temperature-sensor@49 {
173 compatible = "national,lm75b";
Tom Rini53633a82024-02-29 12:33:36 -0500174 reg = <0x49>;
175 };
176};
177
178&fec {
179 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
180 status = "okay";
181};
182
183&esdhc2 {
184 status = "okay";
185};
186
187&uart3 {
188 status = "okay";
189};
190
191&ecspi1 {
192 status = "okay";
193};
194
195&usbotg {
196 dr_mode = "host";
197 status = "okay";
198};
199
200&usbh1 {
201 status = "okay";
202};
203
204&uart1 {
205 status = "okay";
206};
207
208&ssi2 {
209 status = "okay";
210};
211
212&uart2 {
213 status = "okay";
214};
215
216&can1 {
217 status = "okay";
218};
219
220&can2 {
221 status = "okay";
222};
223
224&i2c3 {
225 status = "okay";
226};
227
228&tve {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_vga_sync_1>;
231 ddc-i2c-bus = <&i2c3>;
232 fsl,tve-mode = "vga";
233 fsl,hsync-pin = <4>;
234 fsl,vsync-pin = <6>;
235 status = "okay";
236};