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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / dts / upstream / src / arm / aspeed / aspeed-bmc-ibm-system1.dts
blob: 360b9ce3c8500bd96301e762355bbd4db8ac991b [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2023 IBM Corp.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/i2c/i2c.h>
8#include <dt-bindings/leds/leds-pca955x.h>
9
10/ {
11 model = "System1";
12 compatible = "ibm,system1-bmc", "aspeed,ast2600";
13
14 aliases {
15 i2c16 = &i2c8mux1chn0;
16 i2c17 = &i2c8mux1chn1;
17 i2c18 = &i2c8mux1chn2;
18 i2c19 = &i2c8mux1chn3;
19 i2c20 = &i2c8mux1chn4;
20 i2c21 = &i2c8mux1chn5;
21 i2c22 = &i2c8mux1chn6;
22 i2c23 = &i2c8mux1chn7;
23 i2c24 = &i2c3mux0chn0;
24 i2c25 = &i2c3mux0chn1;
25 i2c26 = &i2c3mux0chn2;
26 i2c27 = &i2c3mux0chn3;
27 i2c28 = &i2c3mux0chn4;
28 i2c29 = &i2c3mux0chn5;
29 i2c30 = &i2c3mux0chn6;
30 i2c31 = &i2c3mux0chn7;
31 i2c32 = &i2c6mux0chn0;
32 i2c33 = &i2c6mux0chn1;
33 i2c34 = &i2c6mux0chn2;
34 i2c35 = &i2c6mux0chn3;
35 i2c36 = &i2c6mux0chn4;
36 i2c37 = &i2c6mux0chn5;
37 i2c38 = &i2c6mux0chn6;
38 i2c39 = &i2c6mux0chn7;
39 i2c40 = &i2c7mux0chn0;
40 i2c41 = &i2c7mux0chn1;
41 i2c42 = &i2c7mux0chn2;
42 i2c43 = &i2c7mux0chn3;
43 i2c44 = &i2c7mux0chn4;
44 i2c45 = &i2c7mux0chn5;
45 i2c46 = &i2c7mux0chn6;
46 i2c47 = &i2c7mux0chn7;
47 i2c48 = &i2c8mux0chn0;
48 i2c49 = &i2c8mux0chn1;
49 i2c50 = &i2c8mux0chn2;
50 i2c51 = &i2c8mux0chn3;
51 i2c52 = &i2c8mux0chn4;
52 i2c53 = &i2c8mux0chn5;
53 i2c54 = &i2c8mux0chn6;
54 i2c55 = &i2c8mux0chn7;
55 i2c56 = &i2c14mux0chn0;
56 i2c57 = &i2c14mux0chn1;
57 i2c58 = &i2c14mux0chn2;
58 i2c59 = &i2c14mux0chn3;
59 i2c60 = &i2c14mux0chn4;
60 i2c61 = &i2c14mux0chn5;
61 i2c62 = &i2c14mux0chn6;
62 i2c63 = &i2c14mux0chn7;
63 i2c64 = &i2c15mux0chn0;
64 i2c65 = &i2c15mux0chn1;
65 i2c66 = &i2c15mux0chn2;
66 i2c67 = &i2c15mux0chn3;
67 i2c68 = &i2c15mux0chn4;
68 i2c69 = &i2c15mux0chn5;
69 i2c70 = &i2c15mux0chn6;
70 i2c71 = &i2c15mux0chn7;
71 };
72
73 chosen {
74 stdout-path = "uart5:115200n8";
75 };
76
77 memory@80000000 {
78 device_type = "memory";
79 reg = <0x80000000 0x40000000>;
80 };
81
82 reserved-memory {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 ranges;
86
87 eventlog: tcg-event-log@b3d00000 {
88 no-map;
89 reg = <0xb3d00000 0x100000>;
90 };
91
92 ramoops@b3e00000 {
93 compatible = "ramoops";
94 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
95 record-size = <0x8000>;
96 console-size = <0x8000>;
97 ftrace-size = <0x8000>;
98 pmsg-size = <0x8000>;
99 max-reason = <3>; /* KMSG_DUMP_EMERG */
100 };
101
102 /* LPC FW cycle bridge region requires natural alignment */
103 flash_memory: region@b4000000 {
104 no-map;
105 reg = <0xb4000000 0x04000000>; /* 64M */
106 };
107
108 /* VGA region is dictated by hardware strapping */
109 vga_memory: region@bf000000 {
110 no-map;
111 compatible = "shared-dma-pool";
112 reg = <0xbf000000 0x01000000>; /* 16M */
113 };
114 };
115
116 leds {
117 compatible = "gpio-leds";
118
119 led-0 {
120 gpios = <&gpio0 ASPEED_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
121 };
122
123 led-1 {
124 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_HIGH>;
125 };
126
127 led-2 {
128 gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
129 };
130
131 led-3 {
132 gpios = <&gpio0 ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
133 };
134
135 led-4 {
136 gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
137 };
138
139 led-5 {
140 gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
141 };
142
143 led-6 {
144 gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
145 };
146
147 led-7 {
148 gpios = <&pca3 8 GPIO_ACTIVE_LOW>;
149 };
150
151 led-8 {
152 gpios = <&pca3 9 GPIO_ACTIVE_LOW>;
153 };
154
155 led-9 {
156 gpios = <&pca3 10 GPIO_ACTIVE_LOW>;
157 };
158
159 led-a {
160 gpios = <&pca3 11 GPIO_ACTIVE_LOW>;
161 };
162
163 led-b {
164 gpios = <&pca4 4 GPIO_ACTIVE_HIGH>;
165 };
166
167 led-c {
168 gpios = <&pca4 5 GPIO_ACTIVE_HIGH>;
169 };
170
171 led-d {
172 gpios = <&pca4 6 GPIO_ACTIVE_HIGH>;
173 };
174
175 led-e {
176 gpios = <&pca4 7 GPIO_ACTIVE_HIGH>;
177 };
178 };
179
180 gpio-keys-polled {
181 compatible = "gpio-keys-polled";
182 poll-interval = <1000>;
183
184 event-nvme0-presence {
185 label = "nvme0-presence";
186 gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
187 linux,code = <0>;
188 };
189
190 event-nvme1-presence {
191 label = "nvme1-presence";
192 gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
193 linux,code = <1>;
194 };
195
196 event-nvme2-presence {
197 label = "nvme2-presence";
198 gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
199 linux,code = <2>;
200 };
201
202 event-nvme3-presence {
203 label = "nvme3-presence";
204 gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
205 linux,code = <3>;
206 };
207 };
208
209 iio-hwmon {
210 compatible = "iio-hwmon";
211 io-channels = <&p12v_vd 0>, <&p5v_aux_vd 0>,
212 <&p5v_bmc_aux_vd 0>, <&p3v3_aux_vd 0>,
213 <&p3v3_bmc_aux_vd 0>, <&p1v8_bmc_aux_vd 0>,
214 <&adc1 4>, <&adc0 2>, <&adc1 0>,
215 <&p2v5_aux_vd 0>, <&adc1 7>;
216 };
217
218 p12v_vd: voltage-divider1 {
219 compatible = "voltage-divider";
220 io-channels = <&adc1 3>;
221 #io-channel-cells = <1>;
222
223 /*
224 * Scale the system voltage by 1127/127 to fit the ADC range.
225 * Use small nominator to prevent integer overflow.
226 */
227 output-ohms = <15>;
228 full-ohms = <133>;
229 };
230
231 p5v_aux_vd: voltage-divider2 {
232 compatible = "voltage-divider";
233 io-channels = <&adc1 5>;
234 #io-channel-cells = <1>;
235
236 /*
237 * Scale the system voltage by 1365/365 to fit the ADC range.
238 * Use small nominator to prevent integer overflow.
239 */
240 output-ohms = <50>;
241 full-ohms = <187>;
242 };
243
244 p5v_bmc_aux_vd: voltage-divider3 {
245 compatible = "voltage-divider";
246 io-channels = <&adc0 3>;
247 #io-channel-cells = <1>;
248
249 /*
250 * Scale the system voltage by 1365/365 to fit the ADC range.
251 * Use small nominator to prevent integer overflow.
252 */
253 output-ohms = <50>;
254 full-ohms = <187>;
255 };
256
257 p3v3_aux_vd: voltage-divider4 {
258 compatible = "voltage-divider";
259 io-channels = <&adc1 2>;
260 #io-channel-cells = <1>;
261
262 /*
263 * Scale the system voltage by 1698/698 to fit the ADC range.
264 * Use small nominator to prevent integer overflow.
265 */
266 output-ohms = <14>;
267 full-ohms = <34>;
268 };
269
270 p3v3_bmc_aux_vd: voltage-divider5 {
271 compatible = "voltage-divider";
272 io-channels = <&adc0 7>;
273 #io-channel-cells = <1>;
274
275 /*
276 * Scale the system voltage by 1698/698 to fit the ADC range.
277 * Use small nominator to prevent integer overflow.
278 */
279 output-ohms = <14>;
280 full-ohms = <34>;
281 };
282
283 p1v8_bmc_aux_vd: voltage-divider6 {
284 compatible = "voltage-divider";
285 io-channels = <&adc0 6>;
286 #io-channel-cells = <1>;
287
288 /*
289 * Scale the system voltage by 4000/3000 to fit the ADC range.
290 * Use small nominator to prevent integer overflow.
291 */
292 output-ohms = <3>;
293 full-ohms = <4>;
294 };
295
296 p2v5_aux_vd: voltage-divider7 {
297 compatible = "voltage-divider";
298 io-channels = <&adc1 1>;
299 #io-channel-cells = <1>;
300
301 /*
302 * Scale the system voltage by 2100/1100 to fit the ADC range.
303 * Use small nominator to prevent integer overflow.
304 */
305 output-ohms = <11>;
306 full-ohms = <21>;
307 };
308
309 p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux {
310 compatible = "regulator-fixed";
311 regulator-name = "p1v8_bmc_aux";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <1800000>;
314 regulator-always-on;
315 };
316};
317
318&adc0 {
319 status = "okay";
320 vref-supply = <&p1v8_bmc_aux>;
321
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_adc0_default
324 &pinctrl_adc1_default
325 &pinctrl_adc2_default
326 &pinctrl_adc3_default
327 &pinctrl_adc4_default
328 &pinctrl_adc5_default
329 &pinctrl_adc6_default
330 &pinctrl_adc7_default>;
331};
332
333&adc1 {
334 status = "okay";
335 vref-supply = <&p1v8_bmc_aux>;
336 aspeed,battery-sensing;
337
338 aspeed,int-vref-microvolt = <2500000>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&pinctrl_adc8_default
341 &pinctrl_adc9_default
342 &pinctrl_adc10_default
343 &pinctrl_adc11_default
344 &pinctrl_adc12_default
345 &pinctrl_adc13_default
346 &pinctrl_adc14_default
347 &pinctrl_adc15_default>;
348};
349
350&ehci1 {
351 status = "okay";
352};
353
354&uhci {
355 status = "okay";
356};
357
358&gpio0 {
359 gpio-line-names =
360 /*A0-A7*/ "","","","","","","","",
361 /*B0-B7*/ "","","","","bmc-tpm-reset","","","",
362 /*C0-C7*/ "","","","","","","","",
363 /*D0-D7*/ "","","","","","","","",
364 /*E0-E7*/ "","","","","","","","",
365 /*F0-F7*/ "","","","","","","","",
366 /*G0-G7*/ "","","","","","","","",
367 /*H0-H7*/ "","","","","","","","",
368 /*I0-I7*/ "","","","","","","","",
369 /*J0-J7*/ "","","","","","","","",
370 /*K0-K7*/ "","","","","","","","",
371 /*L0-L7*/ "","","","","","","","bmc-ready",
372 /*M0-M7*/ "","","","","","","","",
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]373 /*N0-N7*/ "fpga-debug-enable","","","","","","","",
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]374 /*O0-O7*/ "","","","","","","","",
375 /*P0-P7*/ "","","","","","","","bmc-hb",
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]376 /*Q0-Q7*/ "","","","","","","pch-ready","",
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]377 /*R0-R7*/ "","","","","","","","",
378 /*S0-S7*/ "","","","","","","rear-enc-fault0","rear-enc-id0",
379 /*T0-T7*/ "","","","","","","","",
380 /*U0-U7*/ "","","","","","","","",
381 /*V0-V7*/ "","rtc-battery-voltage-read-enable","","power-chassis-control","","","","",
382 /*W0-W7*/ "","","","","","","","",
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]383 /*X0-X7*/ "fpga-pgood","power-chassis-good","pch-pgood","","","","","",
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]384 /*Y0-Y7*/ "","","","","","","","",
385 /*Z0-Z7*/ "","","","","","","","";
386};
387
388&emmc_controller {
389 status = "okay";
390};
391
392&pinctrl_emmc_default {
393 bias-disable;
394};
395
396&emmc {
397 status = "okay";
398 clk-phase-mmc-hs200 = <180>, <180>;
399};
400
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]401&sgpiom0 {
402 status = "okay";
403 ngpios = <128>;
404 bus-frequency = <1000000>;
405};
406
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]407&ibt {
408 status = "okay";
409};
410
411&uart2 {
412 status = "okay";
413};
414
415&vuart1 {
416 status = "okay";
417};
418
419&vuart2 {
420 status = "okay";
421};
422
423&lpc_ctrl {
424 status = "okay";
425 memory-region = <&flash_memory>;
426};
427
428&mac2 {
429 status = "okay";
430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_rmii3_default>;
432 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
433 <&syscon ASPEED_CLK_MAC3RCLK>;
434 clock-names = "MACCLK", "RCLK";
435 use-ncsi;
436};
437
438&mac3 {
439 status = "okay";
440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_rmii4_default>;
442 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
443 <&syscon ASPEED_CLK_MAC4RCLK>;
444 clock-names = "MACCLK", "RCLK";
445 use-ncsi;
446};
447
448&wdt1 {
449 aspeed,reset-type = "none";
450 aspeed,external-signal;
451 aspeed,ext-push-pull;
452 aspeed,ext-active-high;
453
454 pinctrl-names = "default";
455 pinctrl-0 = <&pinctrl_wdtrst1_default>;
456};
457
458&wdt2 {
459 status = "okay";
460};
461
462&kcs2 {
463 status = "okay";
464 aspeed,lpc-io-reg = <0xca8 0xcac>;
465};
466
467&kcs3 {
468 status = "okay";
469 aspeed,lpc-io-reg = <0xca2>;
470 aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
471};
472
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]473&peci0 {
474 status = "okay";
475};
476
477&lpc_snoop {
478 status = "okay";
479 snoop-ports = <0x80>, <0x81>;
480};
481
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]482&i2c0 {
483 status = "okay";
484
485 eeprom@50 {
486 compatible = "atmel,24c64";
487 reg = <0x50>;
488 };
489
490 regulator@60 {
491 compatible = "maxim,max8952";
492 reg = <0x60>;
493
494 max8952,default-mode = <0>;
495 max8952,dvs-mode-microvolt = <1250000>, <1200000>,
496 <1050000>, <950000>;
497 max8952,sync-freq = <0>;
498 max8952,ramp-speed = <0>;
499
500 regulator-name = "VR_v77_1v4";
501 regulator-min-microvolt = <770000>;
502 regulator-max-microvolt = <1400000>;
503 regulator-always-on;
504 regulator-boot-on;
505 };
506};
507
508&i2c1 {
509 status = "okay";
510
511 regulator@42 {
512 compatible = "infineon,ir38263";
513 reg = <0x42>;
514 };
515
516 led-controller@60 {
517 compatible = "nxp,pca9552";
518 reg = <0x60>;
519 #address-cells = <1>;
520 #size-cells = <0>;
521
522 gpio-controller;
523 #gpio-cells = <2>;
524
525 led@0 {
526 label = "nic1-perst";
527 reg = <0>;
528 retain-state-shutdown;
529 default-state = "keep";
530 type = <PCA955X_TYPE_LED>;
531 };
532
533 led@1 {
534 label = "bmc-perst";
535 reg = <1>;
536 retain-state-shutdown;
537 default-state = "keep";
538 type = <PCA955X_TYPE_LED>;
539 };
540
541 led@2 {
542 label = "reset-M2-SSD1-2-perst";
543 reg = <2>;
544 retain-state-shutdown;
545 default-state = "keep";
546 type = <PCA955X_TYPE_LED>;
547 };
548
549 led@3 {
550 label = "pcie-perst1";
551 reg = <3>;
552 retain-state-shutdown;
553 default-state = "keep";
554 type = <PCA955X_TYPE_LED>;
555 };
556
557 led@4 {
558 label = "pcie-perst2";
559 reg = <4>;
560 retain-state-shutdown;
561 default-state = "keep";
562 type = <PCA955X_TYPE_LED>;
563 };
564
565 led@5 {
566 label = "pcie-perst3";
567 reg = <5>;
568 retain-state-shutdown;
569 default-state = "keep";
570 type = <PCA955X_TYPE_LED>;
571 };
572
573 led@6 {
574 label = "pcie-perst4";
575 reg = <6>;
576 retain-state-shutdown;
577 default-state = "keep";
578 type = <PCA955X_TYPE_LED>;
579 };
580
581 led@7 {
582 label = "pcie-perst5";
583 reg = <7>;
584 retain-state-shutdown;
585 default-state = "keep";
586 type = <PCA955X_TYPE_LED>;
587 };
588
589 led@8 {
590 label = "pcie-perst6";
591 reg = <8>;
592 retain-state-shutdown;
593 default-state = "keep";
594 type = <PCA955X_TYPE_LED>;
595 };
596
597 led@9 {
598 label = "pcie-perst7";
599 reg = <9>;
600 retain-state-shutdown;
601 default-state = "keep";
602 type = <PCA955X_TYPE_LED>;
603 };
604
605 led@10 {
606 label = "pcie-perst8";
607 reg = <10>;
608 retain-state-shutdown;
609 default-state = "keep";
610 type = <PCA955X_TYPE_LED>;
611 };
612
613 led@11 {
614 label = "PV-cp0-sw1stk4-perst";
615 reg = <11>;
616 retain-state-shutdown;
617 default-state = "keep";
618 type = <PCA955X_TYPE_LED>;
619 };
620
621 led@12 {
622 label = "PV-cp0-sw1stk5-perst";
623 reg = <12>;
624 retain-state-shutdown;
625 default-state = "keep";
626 type = <PCA955X_TYPE_LED>;
627 };
628
629 led@13 {
630 label = "pe-cp-drv0-perst";
631 reg = <13>;
632 retain-state-shutdown;
633 default-state = "keep";
634 type = <PCA955X_TYPE_LED>;
635 };
636
637 led@14 {
638 label = "pe-cp-drv1-perst";
639 reg = <14>;
640 retain-state-shutdown;
641 default-state = "keep";
642 type = <PCA955X_TYPE_LED>;
643 };
644
645 led@15 {
646 label = "lom-perst";
647 reg = <15>;
648 retain-state-shutdown;
649 default-state = "keep";
650 type = <PCA955X_TYPE_LED>;
651 };
652 };
653
654 gpio@74 {
655 compatible = "nxp,pca9539";
656 reg = <0x74>;
657
658 gpio-controller;
659 #gpio-cells = <2>;
660
661 gpio-line-names =
662 "PLUG_DETECT_PCIE_J101_N",
663 "PLUG_DETECT_PCIE_J102_N",
664 "PLUG_DETECT_PCIE_J103_N",
665 "PLUG_DETECT_PCIE_J104_N",
666 "PLUG_DETECT_PCIE_J105_N",
667 "PLUG_DETECT_PCIE_J106_N",
668 "PLUG_DETECT_PCIE_J107_N",
669 "PLUG_DETECT_PCIE_J108_N",
670 "PLUG_DETECT_M2_SSD1_N",
671 "PLUG_DETECT_NIC1_N",
672 "SEL_SMB_DIMM_CPU0",
673 "presence-ps2",
674 "presence-ps3",
675 "", "",
676 "PWRBRD_PLUG_DETECT2_N";
677 };
678};
679
680&i2c2 {
681 status = "okay";
682
683 power-supply@58 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]684 compatible = "intel,crps185";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]685 reg = <0x58>;
686 };
687
688 power-supply@59 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]689 compatible = "intel,crps185";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]690 reg = <0x59>;
691 };
692
693 power-supply@5a {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]694 compatible = "intel,crps185";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]695 reg = <0x5a>;
696 };
697
698 power-supply@5b {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]699 compatible = "intel,crps185";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]700 reg = <0x5b>;
701 };
702};
703
704&i2c3 {
705 status = "okay";
706
707 i2c-mux@70 {
708 compatible = "nxp,pca9548";
709 reg = <0x70>;
710 #address-cells = <1>;
711 #size-cells = <0>;
712 i2c-mux-idle-disconnect;
713
714 i2c3mux0chn0: i2c@0 {
715 #address-cells = <1>;
716 #size-cells = <0>;
717 reg = <0>;
718 };
719
720 i2c3mux0chn1: i2c@1 {
721 #address-cells = <1>;
722 #size-cells = <0>;
723 reg = <1>;
724 };
725
726 i2c3mux0chn2: i2c@2 {
727 #address-cells = <1>;
728 #size-cells = <0>;
729 reg = <2>;
730 };
731
732 i2c3mux0chn3: i2c@3 {
733 #address-cells = <1>;
734 #size-cells = <0>;
735 reg = <3>;
736 };
737
738 i2c3mux0chn4: i2c@4 {
739 #address-cells = <1>;
740 #size-cells = <0>;
741 reg = <4>;
742 };
743
744 i2c3mux0chn5: i2c@5 {
745 #address-cells = <1>;
746 #size-cells = <0>;
747 reg = <5>;
748 };
749
750 i2c3mux0chn6: i2c@6 {
751 #address-cells = <1>;
752 #size-cells = <0>;
753 reg = <6>;
754 };
755
756 i2c3mux0chn7: i2c@7 {
757 #address-cells = <1>;
758 #size-cells = <0>;
759 reg = <7>;
760 };
761 };
762};
763
764&i2c4 {
765 status = "okay";
766};
767
768&i2c5 {
769 status = "okay";
770
771 regulator@42 {
772 compatible = "infineon,ir38263";
773 reg = <0x42>;
774 };
775
776 regulator@43 {
777 compatible = "infineon,ir38060";
778 reg = <0x43>;
779 };
780};
781
782&i2c6 {
783 status = "okay";
784
785 fan-controller@52 {
786 compatible = "maxim,max31785a";
787 reg = <0x52>;
788 };
789
790 fan-controller@54 {
791 compatible = "maxim,max31785a";
792 reg = <0x54>;
793 };
794
795 eeprom@55 {
796 compatible = "atmel,24c64";
797 reg = <0x55>;
798 };
799
800 i2c-mux@70 {
801 compatible = "nxp,pca9548";
802 reg = <0x70>;
803 #address-cells = <1>;
804 #size-cells = <0>;
805 i2c-mux-idle-disconnect;
806
807 i2c6mux0chn0: i2c@0 {
808 #address-cells = <1>;
809 #size-cells = <0>;
810 reg = <0>;
811 };
812
813 i2c6mux0chn1: i2c@1 {
814 #address-cells = <1>;
815 #size-cells = <0>;
816 reg = <1>;
817 };
818
819 i2c6mux0chn2: i2c@2 {
820 #address-cells = <1>;
821 #size-cells = <0>;
822 reg = <2>;
823 };
824
825 i2c6mux0chn3: i2c@3 {
826 #address-cells = <1>;
827 #size-cells = <0>;
828 reg = <3>;
829 };
830
831 i2c6mux0chn4: i2c@4 {
832 #address-cells = <1>;
833 #size-cells = <0>;
834 reg = <4>;
835
836 humidity-sensor@40 {
837 compatible = "ti,hdc1080";
838 reg = <0x40>;
839 };
840
841 temperature-sensor@48 {
842 compatible = "ti,tmp275";
843 reg = <0x48>;
844 };
845
846 eeprom@50 {
847 compatible = "atmel,24c32";
848 reg = <0x50>;
849 };
850
851 led-controller@60 {
852 compatible = "nxp,pca9551";
853 reg = <0x60>;
854 #address-cells = <1>;
855 #size-cells = <0>;
856
857 gpio-controller;
858 #gpio-cells = <2>;
859
860 led@0 {
861 label = "enclosure-id-led";
862 reg = <0>;
863 retain-state-shutdown;
864 default-state = "keep";
865 type = <PCA955X_TYPE_LED>;
866 };
867
868 led@1 {
869 label = "attention-led";
870 reg = <1>;
871 retain-state-shutdown;
872 default-state = "keep";
873 type = <PCA955X_TYPE_LED>;
874 };
875
876 led@2 {
877 label = "enclosure-fault-rollup-led";
878 reg = <2>;
879 retain-state-shutdown;
880 default-state = "keep";
881 type = <PCA955X_TYPE_LED>;
882 };
883
884 led@3 {
885 label = "power-on-led";
886 reg = <3>;
887 retain-state-shutdown;
888 default-state = "keep";
889 type = <PCA955X_TYPE_LED>;
890 };
891 };
892
893 temperature-sensor@76 {
894 compatible = "infineon,dps310";
895 reg = <0x76>;
896 };
897 };
898
899 i2c6mux0chn5: i2c@5 {
900 #address-cells = <1>;
901 #size-cells = <0>;
902 reg = <5>;
903 };
904
905 i2c6mux0chn6: i2c@6 {
906 #address-cells = <1>;
907 #size-cells = <0>;
908 reg = <6>;
909 };
910
911 i2c6mux0chn7: i2c@7 {
912 #address-cells = <1>;
913 #size-cells = <0>;
914 reg = <7>;
915 };
916 };
917
918 pca3: gpio@74 {
919 compatible = "nxp,pca9539";
920 reg = <0x74>;
921
922 gpio-controller;
923 #gpio-cells = <2>;
924 };
925
926 pca4: gpio@77 {
927 compatible = "nxp,pca9539";
928 reg = <0x77>;
929
930 gpio-controller;
931 #gpio-cells = <2>;
932
933 gpio-line-names =
934 "PE_NVMED0_EXP_PRSNT_N",
935 "PE_NVMED1_EXP_PRSNT_N",
936 "PE_NVMED2_EXP_PRSNT_N",
937 "PE_NVMED3_EXP_PRSNT_N",
938 "LED_FAULT_NVMED0",
939 "LED_FAULT_NVMED1",
940 "LED_FAULT_NVMED2",
941 "LED_FAULT_NVMED3",
942 "FAN0_PRESENCE_R_N",
943 "FAN1_PRESENCE_R_N",
944 "FAN2_PRESENCE_R_N",
945 "FAN3_PRESENCE_R_N",
946 "FAN4_PRESENCE_R_N",
947 "FAN5_PRESENCE_N",
948 "FAN6_PRESENCE_N",
949 "";
950 };
951};
952
953&i2c7 {
954 status = "okay";
955
956 i2c-mux@70 {
957 compatible = "nxp,pca9548";
958 reg = <0x70>;
959 #address-cells = <1>;
960 #size-cells = <0>;
961 i2c-mux-idle-disconnect;
962
963 i2c7mux0chn0: i2c@0 {
964 #address-cells = <1>;
965 #size-cells = <0>;
966 reg = <0>;
967 };
968
969 i2c7mux0chn1: i2c@1 {
970 #address-cells = <1>;
971 #size-cells = <0>;
972 reg = <1>;
973 };
974
975 i2c7mux0chn2: i2c@2 {
976 #address-cells = <1>;
977 #size-cells = <0>;
978 reg = <2>;
979 };
980
981 i2c7mux0chn3: i2c@3 {
982 #address-cells = <1>;
983 #size-cells = <0>;
984 reg = <3>;
985
986 regulator@58 {
987 compatible = "mps,mp2973";
988 reg = <0x58>;
989 };
990 };
991
992 i2c7mux0chn4: i2c@4 {
993 #address-cells = <1>;
994 #size-cells = <0>;
995 reg = <4>;
996 };
997
998 i2c7mux0chn5: i2c@5 {
999 #address-cells = <1>;
1000 #size-cells = <0>;
1001 reg = <5>;
1002
1003 regulator@40 {
1004 compatible = "infineon,tda38640";
1005 reg = <0x40>;
1006 };
1007 };
1008
1009 i2c7mux0chn6: i2c@6 {
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1012 reg = <6>;
1013 };
1014
1015 i2c7mux0chn7: i2c@7 {
1016 #address-cells = <1>;
1017 #size-cells = <0>;
1018 reg = <7>;
1019 };
1020 };
1021};
1022
1023&i2c8 {
1024 status = "okay";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]1025 bus-frequency = <400000>;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1026
1027 i2c-mux@71 {
1028 compatible = "nxp,pca9548";
1029 reg = <0x71>;
1030 #address-cells = <1>;
1031 #size-cells = <0>;
1032 i2c-mux-idle-disconnect;
1033
1034 i2c8mux0chn0: i2c@0 {
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037 reg = <0>;
1038
1039 regulator@58 {
1040 compatible = "mps,mp2971";
1041 reg = <0x58>;
1042 };
1043 };
1044
1045 i2c8mux0chn1: i2c@1 {
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1048 reg = <1>;
1049
1050 regulator@40 {
1051 compatible = "infineon,tda38640";
1052 reg = <0x40>;
1053 };
1054
1055 regulator@41 {
1056 compatible = "infineon,tda38640";
1057 reg = <0x41>;
1058 };
1059
1060 regulator@58 {
1061 compatible = "mps,mp2971";
1062 reg = <0x58>;
1063 };
1064
1065 regulator@5b {
1066 compatible = "mps,mp2971";
1067 reg = <0x5b>;
1068 };
1069 };
1070
1071 i2c8mux0chn2: i2c@2 {
1072 #address-cells = <1>;
1073 #size-cells = <0>;
1074 reg = <2>;
1075 };
1076
1077 i2c8mux0chn3: i2c@3 {
1078 #address-cells = <1>;
1079 #size-cells = <0>;
1080 reg = <3>;
1081 };
1082
1083 i2c8mux0chn4: i2c@4 {
1084 #address-cells = <1>;
1085 #size-cells = <0>;
1086 reg = <4>;
1087
1088 i2c-mux@70 {
1089 compatible = "nxp,pca9548";
1090 reg = <0x70>;
1091 #address-cells = <1>;
1092 #size-cells = <0>;
1093 i2c-mux-idle-disconnect;
1094
1095 i2c8mux1chn0: i2c@0 {
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1098 reg = <0>;
1099 };
1100
1101 i2c8mux1chn1: i2c@1 {
1102 #address-cells = <1>;
1103 #size-cells = <0>;
1104 reg = <1>;
1105 };
1106
1107 i2c8mux1chn2: i2c@2 {
1108 #address-cells = <1>;
1109 #size-cells = <0>;
1110 reg = <2>;
1111 };
1112
1113 i2c8mux1chn3: i2c@3 {
1114 #address-cells = <1>;
1115 #size-cells = <0>;
1116 reg = <3>;
1117 };
1118
1119 i2c8mux1chn4: i2c@4 {
1120 #address-cells = <1>;
1121 #size-cells = <0>;
1122 reg = <4>;
1123 };
1124
1125 i2c8mux1chn5: i2c@5 {
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1128 reg = <5>;
1129 };
1130
1131 i2c8mux1chn6: i2c@6 {
1132 #address-cells = <1>;
1133 #size-cells = <0>;
1134 reg = <6>;
1135 };
1136
1137 i2c8mux1chn7: i2c@7 {
1138 #address-cells = <1>;
1139 #size-cells = <0>;
1140 reg = <7>;
1141 };
1142 };
1143 };
1144
1145 i2c8mux0chn5: i2c@5 {
1146 #address-cells = <1>;
1147 #size-cells = <0>;
1148 reg = <5>;
1149 };
1150
1151 i2c8mux0chn6: i2c@6 {
1152 #address-cells = <1>;
1153 #size-cells = <0>;
1154 reg = <6>;
1155
1156 temperature-sensor@4c {
Tom Rini9c8af152024-12-24 12:03:04 -0600[diff] [blame]1157 compatible = "ti,tmp432";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1158 reg = <0x4c>;
1159 };
1160 };
1161
1162 i2c8mux0chn7: i2c@7 {
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1165 reg = <7>;
1166
1167 regulator@40 {
1168 compatible = "infineon,ir38060";
1169 reg = <0x40>;
1170 };
1171 };
1172 };
1173};
1174
1175&i2c9 {
1176 status = "okay";
1177
1178 regulator@40 {
1179 compatible = "infineon,ir38263";
1180 reg = <0x40>;
1181 };
1182
1183 regulator@41 {
1184 compatible = "infineon,ir38263";
1185 reg = <0x41>;
1186 };
1187
1188 eeprom@50 {
1189 compatible = "atmel,24c64";
1190 reg = <0x50>;
1191 };
1192
1193 regulator@60 {
1194 compatible = "maxim,max8952";
1195 reg = <0x60>;
1196
1197 max8952,default-mode = <0>;
1198 max8952,dvs-mode-microvolt = <1250000>, <1200000>,
1199 <1050000>, <950000>;
1200 max8952,sync-freq = <0>;
1201 max8952,ramp-speed = <0>;
1202
1203 regulator-name = "VR_v77_1v4";
1204 regulator-min-microvolt = <770000>;
1205 regulator-max-microvolt = <1400000>;
1206 regulator-always-on;
1207 regulator-boot-on;
1208 };
1209};
1210
1211&i2c11 {
1212 status = "okay";
1213
1214 tpm@2e {
1215 compatible = "tcg,tpm-tis-i2c";
1216 reg = <0x2e>;
1217 memory-region = <&eventlog>;
1218 };
1219};
1220
1221&i2c12 {
1222 status = "okay";
1223};
1224
1225&i2c13 {
1226 status = "okay";
1227
1228 regulator@41 {
1229 compatible = "infineon,ir38263";
1230 reg = <0x41>;
1231 };
1232
1233 led-controller@61 {
1234 compatible = "nxp,pca9552";
1235 reg = <0x61>;
1236 #address-cells = <1>;
1237 #size-cells = <0>;
1238
1239 gpio-controller;
1240 #gpio-cells = <2>;
1241
1242 led@0 {
1243 label = "efuse-12v-slots";
1244 reg = <0>;
1245 retain-state-shutdown;
1246 default-state = "keep";
1247 type = <PCA955X_TYPE_LED>;
1248 };
1249
1250 led@1 {
1251 label = "efuse-3p3v-slot";
1252 reg = <1>;
1253 retain-state-shutdown;
1254 default-state = "keep";
1255 type = <PCA955X_TYPE_LED>;
1256 };
1257
1258 led@3 {
1259 label = "nic2-pert";
1260 reg = <3>;
1261 retain-state-shutdown;
1262 default-state = "keep";
1263 type = <PCA955X_TYPE_LED>;
1264 };
1265
1266 led@4 {
1267 label = "pcie-perst9";
1268 reg = <4>;
1269 retain-state-shutdown;
1270 default-state = "keep";
1271 type = <PCA955X_TYPE_LED>;
1272 };
1273
1274 led@5 {
1275 label = "pcie-perst10";
1276 reg = <5>;
1277 retain-state-shutdown;
1278 default-state = "keep";
1279 type = <PCA955X_TYPE_LED>;
1280 };
1281
1282 led@6 {
1283 label = "pcie-perst11";
1284 reg = <6>;
1285 retain-state-shutdown;
1286 default-state = "keep";
1287 type = <PCA955X_TYPE_LED>;
1288 };
1289
1290 led@7 {
1291 label = "pcie-perst12";
1292 reg = <7>;
1293 retain-state-shutdown;
1294 default-state = "keep";
1295 type = <PCA955X_TYPE_LED>;
1296 };
1297
1298 led@8 {
1299 label = "pcie-perst13";
1300 reg = <8>;
1301 retain-state-shutdown;
1302 default-state = "keep";
1303 type = <PCA955X_TYPE_LED>;
1304 };
1305
1306 led@9 {
1307 label = "pcie-perst14";
1308 reg = <9>;
1309 retain-state-shutdown;
1310 default-state = "keep";
1311 type = <PCA955X_TYPE_LED>;
1312 };
1313
1314 led@10 {
1315 label = "pcie-perst15";
1316 reg = <10>;
1317 retain-state-shutdown;
1318 default-state = "keep";
1319 type = <PCA955X_TYPE_LED>;
1320 };
1321
1322 led@11 {
1323 label = "pcie-perst16";
1324 reg = <11>;
1325 retain-state-shutdown;
1326 default-state = "keep";
1327 type = <PCA955X_TYPE_LED>;
1328 };
1329
1330 led@12 {
1331 label = "PV-cp1-sw1stk4-perst";
1332 reg = <12>;
1333 retain-state-shutdown;
1334 default-state = "keep";
1335 type = <PCA955X_TYPE_LED>;
1336 };
1337
1338 led@13 {
1339 label = "PV-cp1-sw1stk5-perst";
1340 reg = <13>;
1341 retain-state-shutdown;
1342 default-state = "keep";
1343 type = <PCA955X_TYPE_LED>;
1344 };
1345
1346 led@14 {
1347 label = "pe-cp-drv2-perst";
1348 reg = <14>;
1349 retain-state-shutdown;
1350 default-state = "keep";
1351 type = <PCA955X_TYPE_LED>;
1352 };
1353
1354 led@15 {
1355 label = "pe-cp-drv3-perst";
1356 reg = <15>;
1357 retain-state-shutdown;
1358 default-state = "keep";
1359 type = <PCA955X_TYPE_LED>;
1360 };
1361 };
1362
1363 gpio@75 {
1364 compatible = "nxp,pca9539";
1365 reg = <0x75>;
1366
1367 gpio-controller;
1368 #gpio-cells = <2>;
1369
1370 gpio-line-names =
1371 "PLUG_DETECT_PCIE_J109_N",
1372 "PLUG_DETECT_PCIE_J110_N",
1373 "PLUG_DETECT_PCIE_J111_N",
1374 "PLUG_DETECT_PCIE_J112_N",
1375 "PLUG_DETECT_PCIE_J113_N",
1376 "PLUG_DETECT_PCIE_J114_N",
1377 "PLUG_DETECT_PCIE_J115_N",
1378 "PLUG_DETECT_PCIE_J116_N",
1379 "PLUG_DETECT_M2_SSD2_N",
1380 "PLUG_DETECT_NIC2_N",
1381 "SEL_SMB_DIMM_CPU1",
1382 "presence-ps0",
1383 "presence-ps1",
1384 "", "",
1385 "PWRBRD_PLUG_DETECT1_N";
1386 };
1387
1388 gpio@76 {
1389 compatible = "nxp,pca9539";
1390 reg = <0x76>;
1391
1392 gpio-controller;
1393 #gpio-cells = <2>;
1394
1395 gpio-line-names =
1396 "SW1_BOOTRCVRYB1_N",
1397 "SW1_BOOTRCVRYB0_N",
1398 "SW2_BOOTRCVRYB1_N",
1399 "SW2_BOOTRCVRYB0_N",
1400 "SW3_4_BOOTRCVRYB1_N",
1401 "SW3_4_BOOTRCVRYB0_N",
1402 "SW5_BOOTRCVRYB1_N",
1403 "SW5_BOOTRCVRYB0_N",
1404 "SW6_BOOTRCVRYB1_N",
1405 "SW6_BOOTRCVRYB0_N",
1406 "SW1_RESET_N",
1407 "SW3_RESET_N",
1408 "SW4_RESET_N",
1409 "SW2_RESET_N",
1410 "SW5_RESET_N",
1411 "SW6_RESET_N";
1412 };
1413};
1414
1415&i2c14 {
1416 status = "okay";
1417
1418 i2c-mux@70 {
1419 compatible = "nxp,pca9548";
1420 reg = <0x70>;
1421 #address-cells = <1>;
1422 #size-cells = <0>;
1423 i2c-mux-idle-disconnect;
1424
1425 i2c14mux0chn0: i2c@0 {
1426 #address-cells = <1>;
1427 #size-cells = <0>;
1428 reg = <0>;
1429 };
1430
1431 i2c14mux0chn1: i2c@1 {
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1434 reg = <1>;
1435 };
1436
1437 i2c14mux0chn2: i2c@2 {
1438 #address-cells = <1>;
1439 #size-cells = <0>;
1440 reg = <2>;
1441 };
1442
1443 i2c14mux0chn3: i2c@3 {
1444 #address-cells = <1>;
1445 #size-cells = <0>;
1446 reg = <3>;
1447
1448 regulator@58 {
1449 compatible = "mps,mp2973";
1450 reg = <0x58>;
1451 };
1452 };
1453
1454 i2c14mux0chn4: i2c@4 {
1455 #address-cells = <1>;
1456 #size-cells = <0>;
1457 reg = <4>;
1458 };
1459
1460 i2c14mux0chn5: i2c@5 {
1461 #address-cells = <1>;
1462 #size-cells = <0>;
1463 reg = <5>;
1464
1465 regulator@40 {
1466 compatible = "infineon,tda38640";
1467 reg = <0x40>;
1468 };
1469 };
1470
1471 i2c14mux0chn6: i2c@6 {
1472 #address-cells = <1>;
1473 #size-cells = <0>;
1474 reg = <6>;
1475 };
1476
1477 i2c14mux0chn7: i2c@7 {
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1480 reg = <7>;
1481 };
1482 };
1483};
1484
1485&i2c15 {
1486 status = "okay";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame]1487 bus-frequency = <400000>;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1488
1489 i2c-mux@71 {
1490 compatible = "nxp,pca9548";
1491 reg = <0x71>;
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1494 i2c-mux-idle-disconnect;
1495
1496 i2c15mux0chn0: i2c@0 {
1497 #address-cells = <1>;
1498 #size-cells = <0>;
1499 reg = <0>;
1500
1501 regulator@58 {
1502 compatible = "mps,mp2971";
1503 reg = <0x58>;
1504 };
1505 };
1506
1507 i2c15mux0chn1: i2c@1 {
1508 #address-cells = <1>;
1509 #size-cells = <0>;
1510 reg = <1>;
1511
1512 regulator@40 {
1513 compatible = "infineon,tda38640";
1514 reg = <0x40>;
1515 };
1516
1517 regulator@41 {
1518 compatible = "infineon,tda38640";
1519 reg = <0x41>;
1520 };
1521
1522 regulator@58 {
1523 compatible = "mps,mp2971";
1524 reg = <0x58>;
1525 };
1526
1527 regulator@5b {
1528 compatible = "mps,mp2971";
1529 reg = <0x5b>;
1530 };
1531 };
1532
1533 i2c15mux0chn2: i2c@2 {
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1536 reg = <2>;
1537 };
1538
1539 i2c15mux0chn3: i2c@3 {
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1542 reg = <3>;
1543 };
1544
1545 i2c15mux0chn4: i2c@4 {
1546 #address-cells = <1>;
1547 #size-cells = <0>;
1548 reg = <4>;
1549
1550 i2c-mux@70 {
1551 compatible = "nxp,pca9548";
1552 reg = <0x70>;
1553 #address-cells = <1>;
1554 #size-cells = <0>;
1555 i2c-mux-idle-disconnect;
1556
1557 i2c15mux1chn0: i2c@0 {
1558 #address-cells = <1>;
1559 #size-cells = <0>;
1560 reg = <0>;
1561 };
1562
1563 i2c15mux1chn1: i2c@1 {
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1566 reg = <1>;
1567 };
1568
1569 i2c15mux1chn2: i2c@2 {
1570 #address-cells = <1>;
1571 #size-cells = <0>;
1572 reg = <2>;
1573 };
1574
1575 i2c15mux1chn3: i2c@3 {
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1578 reg = <3>;
1579 };
1580
1581 i2c15mux1chn4: i2c@4 {
1582 #address-cells = <1>;
1583 #size-cells = <0>;
1584 reg = <4>;
1585 };
1586
1587 i2c15mux1chn5: i2c@5 {
1588 #address-cells = <1>;
1589 #size-cells = <0>;
1590 reg = <5>;
1591 };
1592
1593 i2c15mux1chn6: i2c@6 {
1594 #address-cells = <1>;
1595 #size-cells = <0>;
1596 reg = <6>;
1597 };
1598
1599 i2c15mux1chn7: i2c@7 {
1600 #address-cells = <1>;
1601 #size-cells = <0>;
1602 reg = <7>;
1603 };
1604 };
1605 };
1606
1607 i2c15mux0chn5: i2c@5 {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1610 reg = <5>;
1611 };
1612
1613 i2c15mux0chn6: i2c@6 {
1614 #address-cells = <1>;
1615 #size-cells = <0>;
1616 reg = <6>;
1617
1618 temperature-sensor@4c {
Tom Rini9c8af152024-12-24 12:03:04 -0600[diff] [blame]1619 compatible = "ti,tmp432";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1620 reg = <0x4c>;
1621 };
1622 };
1623
1624 i2c15mux0chn7: i2c@7 {
1625 #address-cells = <1>;
1626 #size-cells = <0>;
1627 reg = <7>;
1628
1629 regulator@40 {
1630 compatible = "infineon,ir38060";
1631 reg = <0x40>;
1632 };
1633
1634 temperature-sensor@4c {
Tom Rini9c8af152024-12-24 12:03:04 -0600[diff] [blame]1635 compatible = "ti,tmp432";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1636 reg = <0x4c>;
1637 };
1638 };
1639 };
1640};